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Searched defs:IADC0_BASE (Results 1 – 21 of 21) sorted by relevance

/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h721 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
723 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21a010f512im32.h721 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
723 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21a010f768im32.h721 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
723 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21a020f1024im32.h723 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
725 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21a020f512im32.h723 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
725 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21a020f768im32.h723 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
725 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21b010f1024im32.h721 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
723 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21b010f768im32.h721 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
723 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21b020f1024im32.h723 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
725 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21b010f512im32.h721 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
723 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21b020f512im32.h723 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
725 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg21b020f768im32.h723 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
725 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Drm21z000f1024im32.h719 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
721 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h767 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
769 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h811 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
813 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32bg27c140f768im32.h816 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
818 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32bg27c320f768gj39.h817 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
819 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32bg27c230f768im40.h831 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
833 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32bg27c140f768im40.h832 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
834 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24b310f1536im48.h826 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
828 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro
Defr32mg24b220f1536im48.h823 #define IADC0_BASE (IADC0_S_BASE) /* IADC0 base address */ macro
825 #define IADC0_BASE (IADC0_NS_BASE) /* IADC0 base address */ macro