/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/ |
D | efm32wg900f256.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg980f128.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg980f256.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg980f64.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg990f128.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg990f256.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg990f64.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg995f128.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg995f256.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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D | efm32wg995f64.h | 369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/ |
D | efr32mg21a010f1024im32.h | 671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21a010f512im32.h | 671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21a010f768im32.h | 671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21a020f1024im32.h | 673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21a020f512im32.h | 673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21a020f768im32.h | 673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21b010f1024im32.h | 671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21b010f768im32.h | 671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21b020f1024im32.h | 673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21b010f512im32.h | 671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21b020f512im32.h | 673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | efr32mg21b020f768im32.h | 673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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D | rm21z000f1024im32.h | 669 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 671 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/ |
D | efr32bg22c224f512im40.h | 707 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 709 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/ |
D | efr32bg27c230f768im32.h | 741 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro 743 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
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