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Searched defs:I2C1_BASE (Results 1 – 25 of 268) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg900f256.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg980f128.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg980f256.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg980f64.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg990f128.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg990f256.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg990f64.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg995f128.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg995f256.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
Defm32wg995f64.h369 #define I2C1_BASE (0x4000A400UL) /**< I2C1 base address */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21a010f1024im32.h671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21a010f512im32.h671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21a010f768im32.h671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21a020f1024im32.h673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21a020f512im32.h673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21a020f768im32.h673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21b010f1024im32.h671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21b010f768im32.h671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21b020f1024im32.h673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21b010f512im32.h671 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
673 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21b020f512im32.h673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Defr32mg21b020f768im32.h673 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
675 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
Drm21z000f1024im32.h669 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
671 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22c224f512im40.h707 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
709 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27c230f768im32.h741 #define I2C1_BASE (I2C1_S_BASE) /* I2C1 base address */ macro
743 #define I2C1_BASE (I2C1_NS_BASE) /* I2C1 base address */ macro

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