/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG21/Include/ |
D | efr32mg21a010f1024im32.h | 571 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 573 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21a010f512im32.h | 571 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 573 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21a010f768im32.h | 571 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 573 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21a020f1024im32.h | 573 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 575 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21a020f512im32.h | 573 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 575 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21a020f768im32.h | 573 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 575 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21b010f1024im32.h | 571 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 573 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21b010f768im32.h | 571 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 573 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21b020f1024im32.h | 573 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 575 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21b010f512im32.h | 571 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 573 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21b020f512im32.h | 573 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 575 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg21b020f768im32.h | 573 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 575 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | rm21z000f1024im32.h | 569 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 571 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG22/Include/ |
D | efr32bg22c224f512im40.h | 607 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 609 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG27/Include/ |
D | efr32bg27c230f768im32.h | 641 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 643 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32bg27c140f768im32.h | 646 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 648 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32bg27c320f768gj39.h | 647 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 649 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32bg27c230f768im40.h | 661 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 663 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32bg27c140f768im40.h | 662 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 664 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG24/Include/ |
D | efr32mg24b310f1536im48.h | 656 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 658 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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D | efr32mg24b220f1536im48.h | 653 #define HFRCO0_BASE (HFRCO0_S_BASE) /* HFRCO0 base address */ macro 655 #define HFRCO0_BASE (HFRCO0_NS_BASE) /* HFRCO0 base address */ macro
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