| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_CMU_FM.h | 73 …__IO uint32_t GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| D | S32K344_CMU_FC.h | 73 …__IO uint32_t GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| D | S32K344_MU.h | 89 __IO uint32_t GCR; /**< General Control Register, offset: 0x114 */ member
|
| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K118_CMU.h | 73 …__IO uint32_t GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| D | S32K116_CMU.h | 73 …__IO uint32_t GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| /hal_nxp-latest/s32/drivers/s32k1/Mcu/include/ |
| D | Clock_Ip_Specific.h | 390 uint32 GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| /hal_nxp-latest/s32/drivers/s32k3/Mcu/include/ |
| D | Clock_Ip_Specific.h | 405 uint32 GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| /hal_nxp-latest/s32/drivers/s32ze/Mcu/include/ |
| D | Clock_Ip_Specific.h | 248 uint8 GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_CMU_FC.h | 73 …__IO uint32_t GCR; /**< Global Configuration Register, offset: 0x0 */ member
|
| D | S32Z2_LINFLEXD.h | 90 __IO uint32_t GCR; /**< Global Control, offset: 0x4C */ member
|
| D | S32Z2_PSI5.h | 80 __IO uint16_t GCR; /**< Global Control Register, offset: 0x2 */ member
|
| D | S32Z2_PSI5_S.h | 92 …__IO uint32_t GCR; /**< PSI5_S Global Control register, offset: 0x4C… member
|
| D | S32Z2_MU.h | 89 …__IO uint32_t GCR; /**< General-purpose Control Register, offset: 0x… member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/upower/ |
| D | upmu.h | 321 MU_GCR_tag GCR; // GCR Register member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/upower/ |
| D | upmu.h | 321 MU_GCR_tag GCR; // GCR Register member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/upower/ |
| D | upmu.h | 321 MU_GCR_tag GCR; // GCR Register member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/upower/ |
| D | upmu.h | 321 MU_GCR_tag GCR; // GCR Register member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/upower/ |
| D | upmu.h | 321 MU_GCR_tag GCR; // GCR Register member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/ |
| D | K32L2B21A.h | 3259 __IO uint32_t GCR; /**< LCD General Control Register, offset: 0x0 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/ |
| D | K32L2B31A.h | 3259 __IO uint32_t GCR; /**< LCD General Control Register, offset: 0x0 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B11A/ |
| D | K32L2B11A.h | 3259 __IO uint32_t GCR; /**< LCD General Control Register, offset: 0x0 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/ |
| D | MCXC444.h | 4075 __IO uint32_t GCR; /**< LCD General Control Register, offset: 0x0 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/ |
| D | MCXC443.h | 4075 __IO uint32_t GCR; /**< LCD General Control Register, offset: 0x0 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/ |
| D | MCXA156.h | 435 …__IO uint32_t GCR[1]; /**< Gain Calculation Result, array offset: 0xF8,… member
23613 __IO uint32_t GCR; /**< Global Control, offset: 0xC */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/ |
| D | MCXA154.h | 435 …__IO uint32_t GCR[1]; /**< Gain Calculation Result, array offset: 0xF8,… member
23613 __IO uint32_t GCR; /**< Global Control, offset: 0xC */ member
|
