Home
last modified time | relevance | path

Searched defs:FCTRL (Results 1 – 25 of 135) sorted by relevance

123456

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_LCU.h86 …__IO uint32_t FCTRL; /**< LC 0 Force Control..LC 2 Force Control, arra… member
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LCU.h86 …__IO uint32_t FCTRL; /**< LC 0 Force Control..LC 2 Force Control, arra… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h394 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
6001 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
6248 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
23409 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h394 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
6001 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
6248 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
23409 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h394 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
6001 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
6248 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
23409 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h394 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
6001 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
6248 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
23409 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h431 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
9056 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
9303 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
30650 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h431 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
9056 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
9303 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
30650 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h431 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
9056 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
9303 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
30650 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h431 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
9060 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
9307 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
31268 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h431 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
9060 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
9307 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
31268 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h431 __IO uint32_t FCTRL; /**< FIFO Control Register, offset: 0xE0 */ member
9060 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
9307 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
31268 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h641 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
16088 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
16346 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
46498 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h623 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
16058 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
16316 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
46468 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h516 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
11909 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
29450 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h655 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24796 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25054 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58097 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
DMCXN546_cm33_core1.h655 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24796 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25054 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58097 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h655 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24796 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25054 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58097 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
DMCXN547_cm33_core1.h655 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24796 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25054 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58097 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h689 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24842 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25100 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58832 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
DMCXN947_cm33_core0.h689 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24842 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25100 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58832 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h689 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24842 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25100 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58832 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
DMCXN946_cm33_core1.h689 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
24842 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
25100 __IO uint32_t FCTRL; /**< Flash Control Register, offset: 0x8 */ member
58832 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h397 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
34414 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h397 …__IO uint32_t FCTRL[2]; /**< FIFO Control Register, array offset: 0xE0, a… member
34414 __IO uint16_t FCTRL; /**< Fault Control Register, offset: 0x18C */ member

123456