/hal_nxp-3.6.0/s32/drivers/s32k1/BaseNXP/header/ |
D | S32K142_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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D | S32K144_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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D | S32K146_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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D | S32K144W_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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D | S32K116_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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D | S32K118_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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D | S32K142W_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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D | S32K148_LPSPI.h | 88 …__IO uint32_t FCR; /**< The FIFO Control register contains the RXWAT… member
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/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_LPSPI.h | 93 __IO uint32_t FCR; /**< FIFO Control, offset: 0x58 */ member
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D | S32K344_MU.h | 85 __IO uint32_t FCR; /**< Flag Control Register, offset: 0x100 */ member
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/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_CTU.h | 96 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x70 */ member
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D | S32Z2_MU.h | 85 __IO uint32_t FCR; /**< Flag Control Register, offset: 0x100 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE15Z4/ |
D | MKE15Z4.h | 4910 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14Z4/ |
D | MKE14Z4.h | 4909 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/K32L3A60/ |
D | K32L3A60_cm0plus.h | 8870 __IO uint32_t FCR; /**< DAC FIFO Control Register, offset: 0x10 */ member 10499 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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D | K32L3A60_cm4.h | 9505 __IO uint32_t FCR; /**< DAC FIFO Control Register, offset: 0x10 */ member 11134 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE12Z7/ |
D | MKE12Z7.h | 7897 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16Z4/ |
D | MKE16Z4.h | 4908 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE13Z7/ |
D | MKE13Z7.h | 7899 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE17Z7/ |
D | MKE17Z7.h | 7901 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE15Z7/ |
D | MKE15Z7.h | 7475 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14Z7/ |
D | MKE14Z7.h | 7473 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE14F16/ |
D | MKE14F16.h | 10081 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE16F16/ |
D | MKE16F16.h | 11080 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MKE18F16/ |
D | MKE18F16.h | 11085 __IO uint32_t FCR; /**< FIFO Control Register, offset: 0x58 */ member
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