| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/ |
| D | core_armv8mbl.h | 560 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
612 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
827 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
933 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| D | core_cm23.h | 560 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
612 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
902 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1008 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| D | core_cm0plus.h | 474 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
527 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_sc000.h | 485 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
538 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_cm35p.h | 956 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1108 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1469 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1581 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| D | core_armv8mml.h | 956 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1108 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1394 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1506 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| D | core_cm33.h | 956 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1108 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1469 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1581 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| D | core_cm3.h | 703 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
843 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1153 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_sc300.h | 688 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
828 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1138 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_cm4.h | 761 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
901 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1211 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| D | core_armv81mml.h | 1037 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1204 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1547 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1662 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/ |
| D | core_cm0plus.h | 474 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
527 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
|
| D | core_cm4.h | 766 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
906 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1216 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_FXOSC.h | 73 __IO uint32_t CTRL; /**< FXOSC Control Register, offset: 0x0 */ member
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| D | S32K344_CRC.h | 75 __IO uint32_t CTRL; /**< CRC Control register, offset: 0x8 */ member
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_FXOSC.h | 73 __IO uint32_t CTRL; /**< FXOSC Control Register, offset: 0x0 */ member
|
| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K142W_EWM.h | 73 __IO uint8_t CTRL; /**< Control Register, offset: 0x0 */ member
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| D | S32K142_EWM.h | 73 __IO uint8_t CTRL; /**< Control Register, offset: 0x0 */ member
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| D | S32K144W_EWM.h | 73 __IO uint8_t CTRL; /**< Control Register, offset: 0x0 */ member
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| D | S32K144_EWM.h | 73 __IO uint8_t CTRL; /**< Control Register, offset: 0x0 */ member
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| D | S32K148_EWM.h | 73 __IO uint8_t CTRL; /**< Control Register, offset: 0x0 */ member
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| D | S32K146_EWM.h | 73 __IO uint8_t CTRL; /**< Control Register, offset: 0x0 */ member
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| D | S32K142_CRC.h | 87 __IO uint32_t CTRL; /**< CRC Control register, offset: 0x8 */ member
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| D | S32K142W_CRC.h | 87 __IO uint32_t CTRL; /**< CRC Control register, offset: 0x8 */ member
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| D | S32K144W_CRC.h | 87 __IO uint32_t CTRL; /**< CRC Control register, offset: 0x8 */ member
|
