1# STM32 IWDG configuration
2
3# Copyright (c) 2016 Open-RnD Sp. z o.o.
4# Copyright (c) 2017 RnDity Sp. z o.o.
5# Copyright (c) 2019 Centaur Analytics, Inc
6# SPDX-License-Identifier: Apache-2.0
7
8menuconfig IWDG_STM32
9	bool "Independent Watchdog (IWDG) Driver for STM32 family of MCUs"
10	default y
11	depends on DT_HAS_ST_STM32_WATCHDOG_ENABLED
12	select HAS_WDT_DISABLE_AT_BOOT
13	select HAS_WDT_NO_CALLBACKS
14	help
15	  Enable IWDG driver for STM32 line of MCUs
16
17config IWDG_STM32_INITIAL_TIMEOUT
18	int "Value for IWDG timeout in ms"
19	depends on IWDG_STM32
20	default 100
21	range 1 26214
22	help
23	  Set initial timeout value for IWDG in ms if enabled at boot.
24
25	  The min timeout supported is 1 ms. The max timeout depends on the
26	  MCU's LSI clock frequency and can be calculated with:
27
28	    max. prescaler value (256) * max. reload ticks (4096) / LSI freq.
29
30	  Limiting maximum timeout to a safe value of 26214 ms here, which was
31	  calculated for highest LSI frequency among STM32 MCUs of 40 kHz.
32
33config WWDG_STM32
34	bool "System Window Watchdog (WWDG) Driver for STM32 family of MCUs"
35	default y
36	depends on DT_HAS_ST_STM32_WINDOW_WATCHDOG_ENABLED
37	help
38	  Enable WWDG driver for STM32 line of MCUs
39