| /trusted-firmware-a-latest/plat/renesas/common/include/ |
| D | platform_def.h | 115 #define BL2_BASE U(0xE6304000) macro
118 #define BL2_BASE U(0xE6344000) macro
121 #define BL2_BASE U(0xE6304000) macro
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| /trusted-firmware-a-latest/plat/brcm/board/stingray/include/ |
| D | platform_def.h | 112 #define BL2_BASE QSPI_BASE_ADDR macro
118 #define BL2_BASE NAND_BASE_ADDR macro
124 #define BL2_BASE (BL1_RW_LIMIT + PAGE_SIZE) macro
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| /trusted-firmware-a-latest/plat/hisilicon/poplar/include/ |
| D | poplar_layout.h | 125 #define BL2_BASE (LLOADER_TEXT_BASE + BL2_OFFSET) macro
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| /trusted-firmware-a-latest/bl2/ |
| D | bl2.ld.S | 21 . = BL2_BASE; define
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| D | bl2_el3.ld.S | 45 . = BL2_BASE; define
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| /trusted-firmware-a-latest/plat/st/stm32mp2/include/ |
| D | platform_def.h | 60 #define BL2_BASE STM32MP_BL2_BASE macro
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| /trusted-firmware-a-latest/plat/socionext/uniphier/include/ |
| D | platform_def.h | 53 #define BL2_BASE (UNIPHIER_MEM_BASE + UNIPHIER_BL2_OFFSET) macro
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| /trusted-firmware-a-latest/plat/hisilicon/hikey/include/ |
| D | hikey_layout.h | 63 #define BL2_BASE (BL1_RO_BASE) /* 0xf980_1000 */ macro
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| /trusted-firmware-a-latest/plat/intel/soc/n5x/include/ |
| D | socfpga_plat_def.h | 68 #define BL2_BASE (0xffe00000) macro
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| /trusted-firmware-a-latest/plat/intel/soc/stratix10/include/ |
| D | socfpga_plat_def.h | 66 #define BL2_BASE (0xffe00000) macro
|
| /trusted-firmware-a-latest/plat/hisilicon/hikey960/include/ |
| D | platform_def.h | 61 #define BL2_BASE (0x1AC00000) macro
|
| /trusted-firmware-a-latest/include/plat/marvell/armada/a3k/common/ |
| D | marvell_def.h | 160 #define BL2_BASE (BL31_BASE - PLAT_MARVELL_MAX_BL2_SIZE) macro
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| /trusted-firmware-a-latest/plat/intel/soc/agilex/include/ |
| D | socfpga_plat_def.h | 67 #define BL2_BASE (0xffe00000) macro
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| /trusted-firmware-a-latest/include/plat/marvell/armada/a8k/common/ |
| D | marvell_def.h | 196 #define BL2_BASE (BL31_BASE - PLAT_MARVELL_MAX_BL2_SIZE) macro
|
| /trusted-firmware-a-latest/plat/st/stm32mp1/include/ |
| D | platform_def.h | 50 #define BL2_BASE STM32MP_BL2_BASE macro
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| /trusted-firmware-a-latest/plat/intel/soc/agilex5/include/ |
| D | socfpga_plat_def.h | 85 #define BL2_BASE (0x00000000) macro
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| /trusted-firmware-a-latest/include/plat/nuvoton/common/ |
| D | npcm845x_arm_def.h | 435 #define BL2_BASE (ARM_TRUSTED_SRAM_BASE + \ macro
442 #define BL2_BASE (BL1_RW_BASE - PLAT_ARM_MAX_BL2_SIZE) macro
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| /trusted-firmware-a-latest/plat/imx/imx7/picopi/include/ |
| D | platform_def.h | 118 #define BL2_BASE BL2_RAM_BASE macro
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| /trusted-firmware-a-latest/plat/imx/imx7/warp7/include/ |
| D | platform_def.h | 121 #define BL2_BASE BL2_RAM_BASE macro
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| /trusted-firmware-a-latest/include/plat/arm/common/ |
| D | arm_def.h | 591 #define BL2_BASE (ARM_TRUSTED_SRAM_BASE + \ macro
600 #define BL2_BASE (BL1_RW_BASE - PLAT_ARM_MAX_BL2_SIZE) macro
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| /trusted-firmware-a-latest/plat/rpi/rpi3/include/ |
| D | platform_def.h | 182 #define BL2_BASE (BL2_LIMIT - PLAT_MAX_BL2_SIZE) macro
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| /trusted-firmware-a-latest/plat/socionext/synquacer/include/ |
| D | platform_def.h | 64 #define BL2_BASE 0x04000000 macro
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| /trusted-firmware-a-latest/plat/arm/board/fvp_ve/include/ |
| D | platform_def.h | 218 #define BL2_BASE (BL1_RW_BASE - FVP_VE_MAX_BL2_SIZE) macro
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| /trusted-firmware-a-latest/plat/arm/board/a5ds/include/ |
| D | platform_def.h | 233 #define BL2_BASE (BL1_RW_BASE - A5DS_MAX_BL2_SIZE) macro
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| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mm/include/ |
| D | platform_def.h | 43 #define BL2_BASE U(0x920000) macro
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