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Searched defs:ADC_CFGR1_AWDCH_2 (Results 1 – 25 of 35) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h692 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f030x8.h708 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f031x6.h702 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f030xc.h724 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f038xx.h701 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f070x6.h737 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f070xb.h760 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f058xx.h807 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f051x8.h808 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l010x8.h675 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l010xb.h680 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l011xx.h687 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l021xx.h708 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l010x4.h667 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l010x6.h673 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l041xx.h717 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l081xx.h774 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l031xx.h696 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l051xx.h731 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l071xx.h753 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l052xx.h840 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l072xx.h867 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l062xx.h861 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l063xx.h877 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l053xx.h856 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro

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