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/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore.h101 #define XCHAL__4(a,b,c,d, x, ...) x argument
102 #define XCHAL__5(a,b,c,d,e, x, ...) x argument
103 #define XCHAL__6(a,b,c,d,e,f, x, ...) x argument
104 #define XCHAL__7(a,b,c,d,e,f,g, x, ...) x argument
105 #define XCHAL__8(a,b,c,d,e,f,g,h, x, ...) x argument
106 #define XCHAL__9(a,b,c,d,e,f,g,h,i, x, ...) x argument
107 #define XCHAL__10(a,b,c,d,e,f,g,h,i,j, x, ...) x argument
108 #define XCHAL__11(a,b,c,d,e,f,g,h,i,j,k, x, ...) x argument
109 #define XCHAL__12(a,b,c,d,e,f,g,h,i,j,k,l, x, ...) x argument
110 #define XCHAL__13(a,b,c,d,e,f,g,h,i,j,k,l,m, x, ...) x argument
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