Lines Matching refs:DMAx
431 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
433 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); in LL_DMA_EnableChannel()
451 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
453 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN); in LL_DMA_DisableChannel()
471 __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledChannel() argument
473 return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_IsEnabledChannel()
507 __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat… in LL_DMA_ConfigTransfer() argument
509 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_ConfigTransfer()
534 __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t … in LL_DMA_SetDataTransferDirection() argument
536 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_SetDataTransferDirection()
559 __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetDataTransferDirection() argument
561 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_GetDataTransferDirection()
585 __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode) in LL_DMA_SetMode() argument
587 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_CIRC, in LL_DMA_SetMode()
608 __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetMode() argument
610 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_GetMode()
632 __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOr… in LL_DMA_SetPeriphIncMode() argument
634 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PINC, in LL_DMA_SetPeriphIncMode()
655 __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetPeriphIncMode() argument
657 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_GetPeriphIncMode()
679 __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOr… in LL_DMA_SetMemoryIncMode() argument
681 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MINC, in LL_DMA_SetMemoryIncMode()
702 __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetMemoryIncMode() argument
704 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_GetMemoryIncMode()
727 __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2M… in LL_DMA_SetPeriphSize() argument
729 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PSIZE, in LL_DMA_SetPeriphSize()
751 __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetPeriphSize() argument
753 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_GetPeriphSize()
776 __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2M… in LL_DMA_SetMemorySize() argument
778 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_MSIZE, in LL_DMA_SetMemorySize()
800 __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetMemorySize() argument
802 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_GetMemorySize()
826 __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t P… in LL_DMA_SetChannelPriorityLevel() argument
828 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_PL, in LL_DMA_SetChannelPriorityLevel()
851 __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetChannelPriorityLevel() argument
853 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_GetChannelPriorityLevel()
875 __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData) in LL_DMA_SetDataLength() argument
877 MODIFY_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR, in LL_DMA_SetDataLength()
898 __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetDataLength() argument
900 return (READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CNDTR, in LL_DMA_GetDataLength()
928 __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddres… in LL_DMA_ConfigAddresses() argument
934 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, SrcAddress); in LL_DMA_ConfigAddresses()
935 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, DstAddress); in LL_DMA_ConfigAddresses()
940 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, SrcAddress); in LL_DMA_ConfigAddresses()
941 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, DstAddress); in LL_DMA_ConfigAddresses()
963 __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd… in LL_DMA_SetMemoryAddress() argument
965 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); in LL_DMA_SetMemoryAddress()
986 __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAd… in LL_DMA_SetPeriphAddress() argument
988 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, PeriphAddress); in LL_DMA_SetPeriphAddress()
1007 __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetMemoryAddress() argument
1009 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); in LL_DMA_GetMemoryAddress()
1028 __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetPeriphAddress() argument
1030 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR)); in LL_DMA_GetPeriphAddress()
1051 __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd… in LL_DMA_SetM2MSrcAddress() argument
1053 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, MemoryAddress); in LL_DMA_SetM2MSrcAddress()
1074 __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd… in LL_DMA_SetM2MDstAddress() argument
1076 WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress); in LL_DMA_SetM2MDstAddress()
1095 __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetM2MSrcAddress() argument
1097 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR)); in LL_DMA_GetM2MSrcAddress()
1116 __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetM2MDstAddress() argument
1118 return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR)); in LL_DMA_GetM2MDstAddress()
1138 __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request) in LL_DMA_SetPeriphRequest() argument
1140 …MODIFY_REG(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID, Reque… in LL_DMA_SetPeriphRequest()
1159 __STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetPeriphRequest() argument
1161 …return (READ_BIT(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID)… in LL_DMA_GetPeriphRequest()
1178 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI1() argument
1180 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI1()
1189 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI2() argument
1191 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI2()
1200 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI3() argument
1202 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI3()
1211 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI4() argument
1213 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI4()
1222 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI5() argument
1224 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI5()
1233 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI6() argument
1235 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI6()
1244 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI7() argument
1246 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI7()
1255 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI8(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_GI8() argument
1257 return ((READ_BIT(DMAx->ISR, DMA_ISR_GIF8) == (DMA_ISR_GIF8)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_GI8()
1266 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC1() argument
1268 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC1()
1277 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC2() argument
1279 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC2()
1288 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC3() argument
1290 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC3()
1299 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC4() argument
1301 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC4()
1310 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC5() argument
1312 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC5()
1321 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC6() argument
1323 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC6()
1332 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC7() argument
1334 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC7()
1343 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC8(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TC8() argument
1345 return ((READ_BIT(DMAx->ISR, DMA_ISR_TCIF8) == (DMA_ISR_TCIF8)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TC8()
1354 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT1() argument
1356 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT1()
1365 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT2() argument
1367 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT2()
1376 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT3() argument
1378 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT3()
1387 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT4() argument
1389 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT4()
1398 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT5() argument
1400 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT5()
1409 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT6() argument
1411 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT6()
1420 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT7() argument
1422 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT7()
1431 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT8(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_HT8() argument
1433 return ((READ_BIT(DMAx->ISR, DMA_ISR_HTIF8) == (DMA_ISR_HTIF8)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_HT8()
1442 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE1() argument
1444 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE1()
1453 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE2() argument
1455 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE2()
1464 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE3() argument
1466 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE3()
1475 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE4() argument
1477 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE4()
1486 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE5() argument
1488 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE5()
1497 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE6() argument
1499 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE6()
1508 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE7() argument
1510 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE7()
1519 __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE8(DMA_TypeDef *DMAx) in LL_DMA_IsActiveFlag_TE8() argument
1521 return ((READ_BIT(DMAx->ISR, DMA_ISR_TEIF8) == (DMA_ISR_TEIF8)) ? 1UL : 0UL); in LL_DMA_IsActiveFlag_TE8()
1530 __STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI1() argument
1532 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1541 __STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI2() argument
1543 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1552 __STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI3() argument
1554 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1563 __STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI4() argument
1565 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1574 __STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI5() argument
1576 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1585 __STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI6() argument
1587 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1596 __STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI7() argument
1598 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1607 __STATIC_INLINE void LL_DMA_ClearFlag_GI8(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_GI8() argument
1609 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF8); in LL_DMA_ClearFlag_GI8()
1618 __STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC1() argument
1620 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1629 __STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC2() argument
1631 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1640 __STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC3() argument
1642 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
1651 __STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC4() argument
1653 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF4); in LL_DMA_ClearFlag_TC4()
1662 __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC5() argument
1664 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF5); in LL_DMA_ClearFlag_TC5()
1673 __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC6() argument
1675 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF6); in LL_DMA_ClearFlag_TC6()
1684 __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC7() argument
1686 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF7); in LL_DMA_ClearFlag_TC7()
1695 __STATIC_INLINE void LL_DMA_ClearFlag_TC8(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TC8() argument
1697 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF8); in LL_DMA_ClearFlag_TC8()
1706 __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT1() argument
1708 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF1); in LL_DMA_ClearFlag_HT1()
1717 __STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT2() argument
1719 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF2); in LL_DMA_ClearFlag_HT2()
1728 __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT3() argument
1730 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF3); in LL_DMA_ClearFlag_HT3()
1739 __STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT4() argument
1741 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF4); in LL_DMA_ClearFlag_HT4()
1750 __STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT5() argument
1752 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF5); in LL_DMA_ClearFlag_HT5()
1761 __STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT6() argument
1763 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF6); in LL_DMA_ClearFlag_HT6()
1772 __STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT7() argument
1774 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF7); in LL_DMA_ClearFlag_HT7()
1783 __STATIC_INLINE void LL_DMA_ClearFlag_HT8(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_HT8() argument
1785 WRITE_REG(DMAx->IFCR, DMA_IFCR_CHTIF8); in LL_DMA_ClearFlag_HT8()
1794 __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE1() argument
1796 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF1); in LL_DMA_ClearFlag_TE1()
1805 __STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE2() argument
1807 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF2); in LL_DMA_ClearFlag_TE2()
1816 __STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE3() argument
1818 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF3); in LL_DMA_ClearFlag_TE3()
1827 __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE4() argument
1829 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF4); in LL_DMA_ClearFlag_TE4()
1838 __STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE5() argument
1840 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF5); in LL_DMA_ClearFlag_TE5()
1849 __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE6() argument
1851 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF6); in LL_DMA_ClearFlag_TE6()
1860 __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE7() argument
1862 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF7); in LL_DMA_ClearFlag_TE7()
1871 __STATIC_INLINE void LL_DMA_ClearFlag_TE8(DMA_TypeDef *DMAx) in LL_DMA_ClearFlag_TE8() argument
1873 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTEIF8); in LL_DMA_ClearFlag_TE8()
1898 __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableIT_TC() argument
1900 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); in LL_DMA_EnableIT_TC()
1918 __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableIT_HT() argument
1920 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
1938 __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableIT_TE() argument
1940 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE); in LL_DMA_EnableIT_TE()
1958 __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableIT_TC() argument
1960 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE); in LL_DMA_DisableIT_TC()
1978 __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableIT_HT() argument
1980 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
1998 __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableIT_TE() argument
2000 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE); in LL_DMA_DisableIT_TE()
2018 __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledIT_TC() argument
2020 return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_IsEnabledIT_TC()
2039 __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledIT_HT() argument
2041 return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_IsEnabledIT_HT()
2060 __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_IsEnabledIT_TE() argument
2062 return ((READ_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, in LL_DMA_IsEnabledIT_TE()
2075 ErrorStatus LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct);
2076 ErrorStatus LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel);