Lines Matching refs:SPIx

630 __STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx)  in LL_SPI_Enable()  argument
632 SET_BIT(SPIx->CR1, SPI_CR1_SPE); in LL_SPI_Enable()
642 __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx) in LL_SPI_Disable() argument
644 CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); in LL_SPI_Disable()
653 __STATIC_INLINE uint32_t LL_SPI_IsEnabled(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabled() argument
655 return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL); in LL_SPI_IsEnabled()
665 __STATIC_INLINE void LL_SPI_EnableIOSwap(SPI_TypeDef *SPIx) in LL_SPI_EnableIOSwap() argument
667 SET_BIT(SPIx->CFG2, SPI_CFG2_IOSWP); in LL_SPI_EnableIOSwap()
677 __STATIC_INLINE void LL_SPI_DisableIOSwap(SPI_TypeDef *SPIx) in LL_SPI_DisableIOSwap() argument
679 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_IOSWP); in LL_SPI_DisableIOSwap()
688 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIOSwap(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIOSwap() argument
690 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_IOSWP) == (SPI_CFG2_IOSWP)) ? 1UL : 0UL); in LL_SPI_IsEnabledIOSwap()
700 __STATIC_INLINE void LL_SPI_EnableGPIOControl(SPI_TypeDef *SPIx) in LL_SPI_EnableGPIOControl() argument
702 SET_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_EnableGPIOControl()
712 __STATIC_INLINE void LL_SPI_DisableGPIOControl(SPI_TypeDef *SPIx) in LL_SPI_DisableGPIOControl() argument
714 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR); in LL_SPI_DisableGPIOControl()
723 __STATIC_INLINE uint32_t LL_SPI_IsEnabledGPIOControl(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledGPIOControl() argument
725 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_AFCNTR) == (SPI_CFG2_AFCNTR)) ? 1UL : 0UL); in LL_SPI_IsEnabledGPIOControl()
738 __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode) in LL_SPI_SetMode() argument
740 MODIFY_REG(SPIx->CFG2, SPI_CFG2_MASTER, Mode); in LL_SPI_SetMode()
751 __STATIC_INLINE uint32_t LL_SPI_GetMode(const SPI_TypeDef *SPIx) in LL_SPI_GetMode() argument
753 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_MASTER)); in LL_SPI_GetMode()
779 __STATIC_INLINE void LL_SPI_SetMasterSSIdleness(SPI_TypeDef *SPIx, uint32_t MasterSSIdleness) in LL_SPI_SetMasterSSIdleness() argument
781 MODIFY_REG(SPIx->CFG2, SPI_CFG2_MSSI, MasterSSIdleness); in LL_SPI_SetMasterSSIdleness()
806 __STATIC_INLINE uint32_t LL_SPI_GetMasterSSIdleness(const SPI_TypeDef *SPIx) in LL_SPI_GetMasterSSIdleness() argument
808 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_MSSI)); in LL_SPI_GetMasterSSIdleness()
834 __STATIC_INLINE void LL_SPI_SetInterDataIdleness(SPI_TypeDef *SPIx, uint32_t MasterInterDataIdlenes… in LL_SPI_SetInterDataIdleness() argument
836 MODIFY_REG(SPIx->CFG2, SPI_CFG2_MIDI, MasterInterDataIdleness); in LL_SPI_SetInterDataIdleness()
861 __STATIC_INLINE uint32_t LL_SPI_GetInterDataIdleness(const SPI_TypeDef *SPIx) in LL_SPI_GetInterDataIdleness() argument
863 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_MIDI)); in LL_SPI_GetInterDataIdleness()
874 __STATIC_INLINE void LL_SPI_SetTransferSize(SPI_TypeDef *SPIx, uint32_t Count) in LL_SPI_SetTransferSize() argument
876 MODIFY_REG(SPIx->CR2, SPI_CR2_TSIZE, Count); in LL_SPI_SetTransferSize()
886 __STATIC_INLINE uint32_t LL_SPI_GetTransferSize(const SPI_TypeDef *SPIx) in LL_SPI_GetTransferSize() argument
888 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_TSIZE)); in LL_SPI_GetTransferSize()
899 __STATIC_INLINE void LL_SPI_EnableIOLock(SPI_TypeDef *SPIx) in LL_SPI_EnableIOLock() argument
901 SET_BIT(SPIx->CR1, SPI_CR1_IOLOCK); in LL_SPI_EnableIOLock()
910 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIOLock(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIOLock() argument
912 return ((READ_BIT(SPIx->CR1, SPI_CR1_IOLOCK) == (SPI_CR1_IOLOCK)) ? 1UL : 0UL); in LL_SPI_IsEnabledIOLock()
924 __STATIC_INLINE void LL_SPI_SetTxCRCInitPattern(SPI_TypeDef *SPIx, uint32_t TXCRCInitAll) in LL_SPI_SetTxCRCInitPattern() argument
926 MODIFY_REG(SPIx->CR1, SPI_CR1_TCRCINI, TXCRCInitAll); in LL_SPI_SetTxCRCInitPattern()
937 __STATIC_INLINE uint32_t LL_SPI_GetTxCRCInitPattern(const SPI_TypeDef *SPIx) in LL_SPI_GetTxCRCInitPattern() argument
939 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_TCRCINI)); in LL_SPI_GetTxCRCInitPattern()
951 __STATIC_INLINE void LL_SPI_SetRxCRCInitPattern(SPI_TypeDef *SPIx, uint32_t RXCRCInitAll) in LL_SPI_SetRxCRCInitPattern() argument
953 MODIFY_REG(SPIx->CR1, SPI_CR1_RCRCINI, RXCRCInitAll); in LL_SPI_SetRxCRCInitPattern()
964 __STATIC_INLINE uint32_t LL_SPI_GetRxCRCInitPattern(const SPI_TypeDef *SPIx) in LL_SPI_GetRxCRCInitPattern() argument
966 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_RCRCINI)); in LL_SPI_GetRxCRCInitPattern()
979 __STATIC_INLINE void LL_SPI_SetInternalSSLevel(SPI_TypeDef *SPIx, uint32_t SSLevel) in LL_SPI_SetInternalSSLevel() argument
981 MODIFY_REG(SPIx->CR1, SPI_CR1_SSI, SSLevel); in LL_SPI_SetInternalSSLevel()
992 __STATIC_INLINE uint32_t LL_SPI_GetInternalSSLevel(const SPI_TypeDef *SPIx) in LL_SPI_GetInternalSSLevel() argument
994 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_SSI)); in LL_SPI_GetInternalSSLevel()
1003 __STATIC_INLINE void LL_SPI_EnableFullSizeCRC(SPI_TypeDef *SPIx) in LL_SPI_EnableFullSizeCRC() argument
1005 SET_BIT(SPIx->CR1, SPI_CR1_CRC33_17); in LL_SPI_EnableFullSizeCRC()
1014 __STATIC_INLINE void LL_SPI_DisableFullSizeCRC(SPI_TypeDef *SPIx) in LL_SPI_DisableFullSizeCRC() argument
1016 CLEAR_BIT(SPIx->CR1, SPI_CR1_CRC33_17); in LL_SPI_DisableFullSizeCRC()
1025 __STATIC_INLINE uint32_t LL_SPI_IsEnabledFullSizeCRC(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledFullSizeCRC() argument
1027 return ((READ_BIT(SPIx->CR1, SPI_CR1_CRC33_17) == (SPI_CR1_CRC33_17)) ? 1UL : 0UL); in LL_SPI_IsEnabledFullSizeCRC()
1036 __STATIC_INLINE void LL_SPI_SuspendMasterTransfer(SPI_TypeDef *SPIx) in LL_SPI_SuspendMasterTransfer() argument
1038 SET_BIT(SPIx->CR1, SPI_CR1_CSUSP); in LL_SPI_SuspendMasterTransfer()
1047 __STATIC_INLINE void LL_SPI_StartMasterTransfer(SPI_TypeDef *SPIx) in LL_SPI_StartMasterTransfer() argument
1049 SET_BIT(SPIx->CR1, SPI_CR1_CSTART); in LL_SPI_StartMasterTransfer()
1058 __STATIC_INLINE uint32_t LL_SPI_IsActiveMasterTransfer(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveMasterTransfer() argument
1060 return ((READ_BIT(SPIx->CR1, SPI_CR1_CSTART) == (SPI_CR1_CSTART)) ? 1UL : 0UL); in LL_SPI_IsActiveMasterTransfer()
1069 __STATIC_INLINE void LL_SPI_EnableMasterRxAutoSuspend(SPI_TypeDef *SPIx) in LL_SPI_EnableMasterRxAutoSuspend() argument
1071 SET_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_EnableMasterRxAutoSuspend()
1080 __STATIC_INLINE void LL_SPI_DisableMasterRxAutoSuspend(SPI_TypeDef *SPIx) in LL_SPI_DisableMasterRxAutoSuspend() argument
1082 CLEAR_BIT(SPIx->CR1, SPI_CR1_MASRX); in LL_SPI_DisableMasterRxAutoSuspend()
1091 __STATIC_INLINE uint32_t LL_SPI_IsEnabledMasterRxAutoSuspend(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledMasterRxAutoSuspend() argument
1093 return ((READ_BIT(SPIx->CR1, SPI_CR1_MASRX) == (SPI_CR1_MASRX)) ? 1UL : 0UL); in LL_SPI_IsEnabledMasterRxAutoSuspend()
1106 __STATIC_INLINE void LL_SPI_SetUDRConfiguration(SPI_TypeDef *SPIx, uint32_t UDRConfig) in LL_SPI_SetUDRConfiguration() argument
1108 MODIFY_REG(SPIx->CFG1, SPI_CFG1_UDRCFG, UDRConfig); in LL_SPI_SetUDRConfiguration()
1119 __STATIC_INLINE uint32_t LL_SPI_GetUDRConfiguration(const SPI_TypeDef *SPIx) in LL_SPI_GetUDRConfiguration() argument
1121 return (uint32_t)(READ_BIT(SPIx->CFG1, SPI_CFG1_UDRCFG)); in LL_SPI_GetUDRConfiguration()
1135 __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) in LL_SPI_SetStandard() argument
1137 MODIFY_REG(SPIx->CFG2, SPI_CFG2_SP, Standard); in LL_SPI_SetStandard()
1148 __STATIC_INLINE uint32_t LL_SPI_GetStandard(const SPI_TypeDef *SPIx) in LL_SPI_GetStandard() argument
1150 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_SP)); in LL_SPI_GetStandard()
1164 __STATIC_INLINE void LL_SPI_SetClockPhase(SPI_TypeDef *SPIx, uint32_t ClockPhase) in LL_SPI_SetClockPhase() argument
1166 MODIFY_REG(SPIx->CFG2, SPI_CFG2_CPHA, ClockPhase); in LL_SPI_SetClockPhase()
1177 __STATIC_INLINE uint32_t LL_SPI_GetClockPhase(const SPI_TypeDef *SPIx) in LL_SPI_GetClockPhase() argument
1179 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_CPHA)); in LL_SPI_GetClockPhase()
1193 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_SPI_SetClockPolarity() argument
1195 MODIFY_REG(SPIx->CFG2, SPI_CFG2_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
1206 __STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(const SPI_TypeDef *SPIx) in LL_SPI_GetClockPolarity() argument
1208 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_CPOL)); in LL_SPI_GetClockPolarity()
1222 __STATIC_INLINE void LL_SPI_SetNSSPolarity(SPI_TypeDef *SPIx, uint32_t NSSPolarity) in LL_SPI_SetNSSPolarity() argument
1224 MODIFY_REG(SPIx->CFG2, SPI_CFG2_SSIOP, NSSPolarity); in LL_SPI_SetNSSPolarity()
1235 __STATIC_INLINE uint32_t LL_SPI_GetNSSPolarity(const SPI_TypeDef *SPIx) in LL_SPI_GetNSSPolarity() argument
1237 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_SSIOP)); in LL_SPI_GetNSSPolarity()
1259 __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t Baudrate) in LL_SPI_SetBaudRatePrescaler() argument
1261 MODIFY_REG(SPIx->CFG1, (SPI_CFG1_MBR | SPI_CFG1_BPASS), Baudrate); in LL_SPI_SetBaudRatePrescaler()
1280 __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(const SPI_TypeDef *SPIx) in LL_SPI_GetBaudRatePrescaler() argument
1282 return (uint32_t)(READ_BIT(SPIx->CFG1, (SPI_CFG1_MBR | SPI_CFG1_BPASS))); in LL_SPI_GetBaudRatePrescaler()
1296 __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder) in LL_SPI_SetTransferBitOrder() argument
1298 MODIFY_REG(SPIx->CFG2, SPI_CFG2_LSBFRST, BitOrder); in LL_SPI_SetTransferBitOrder()
1309 __STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(const SPI_TypeDef *SPIx) in LL_SPI_GetTransferBitOrder() argument
1311 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_LSBFRST)); in LL_SPI_GetTransferBitOrder()
1329 __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection) in LL_SPI_SetTransferDirection() argument
1331 MODIFY_REG(SPIx->CR1, SPI_CR1_HDDIR, TransferDirection & SPI_CR1_HDDIR); in LL_SPI_SetTransferDirection()
1332 MODIFY_REG(SPIx->CFG2, SPI_CFG2_COMM, TransferDirection & SPI_CFG2_COMM); in LL_SPI_SetTransferDirection()
1347 __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(const SPI_TypeDef *SPIx) in LL_SPI_GetTransferDirection() argument
1349 uint32_t Hddir = READ_BIT(SPIx->CR1, SPI_CR1_HDDIR); in LL_SPI_GetTransferDirection()
1350 uint32_t Comm = READ_BIT(SPIx->CFG2, SPI_CFG2_COMM); in LL_SPI_GetTransferDirection()
1364 __STATIC_INLINE void LL_SPI_SetHalfDuplexDirection(SPI_TypeDef *SPIx, uint32_t HalfDuplexDirection) in LL_SPI_SetHalfDuplexDirection() argument
1366 MODIFY_REG(SPIx->CR1, SPI_CR1_HDDIR, HalfDuplexDirection & SPI_CR1_HDDIR); in LL_SPI_SetHalfDuplexDirection()
1378 __STATIC_INLINE uint32_t LL_SPI_GetHalfDuplexDirection(const SPI_TypeDef *SPIx) in LL_SPI_GetHalfDuplexDirection() argument
1380 return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_HDDIR) | SPI_CFG2_COMM); in LL_SPI_GetHalfDuplexDirection()
1420 __STATIC_INLINE void LL_SPI_SetDataWidth(SPI_TypeDef *SPIx, uint32_t DataWidth) in LL_SPI_SetDataWidth() argument
1422 MODIFY_REG(SPIx->CFG1, SPI_CFG1_DSIZE, DataWidth); in LL_SPI_SetDataWidth()
1460 __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(const SPI_TypeDef *SPIx) in LL_SPI_GetDataWidth() argument
1462 return (uint32_t)(READ_BIT(SPIx->CFG1, SPI_CFG1_DSIZE)); in LL_SPI_GetDataWidth()
1489 __STATIC_INLINE void LL_SPI_SetFIFOThreshold(SPI_TypeDef *SPIx, uint32_t Threshold) in LL_SPI_SetFIFOThreshold() argument
1491 MODIFY_REG(SPIx->CFG1, SPI_CFG1_FTHLV, Threshold); in LL_SPI_SetFIFOThreshold()
1516 __STATIC_INLINE uint32_t LL_SPI_GetFIFOThreshold(const SPI_TypeDef *SPIx) in LL_SPI_GetFIFOThreshold() argument
1518 return (uint32_t)(READ_BIT(SPIx->CFG1, SPI_CFG1_FTHLV)); in LL_SPI_GetFIFOThreshold()
1528 __STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx) in LL_SPI_EnableCRC() argument
1530 SET_BIT(SPIx->CFG1, SPI_CFG1_CRCEN); in LL_SPI_EnableCRC()
1539 __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx) in LL_SPI_DisableCRC() argument
1541 CLEAR_BIT(SPIx->CFG1, SPI_CFG1_CRCEN); in LL_SPI_DisableCRC()
1550 __STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledCRC() argument
1552 return ((READ_BIT(SPIx->CFG1, SPI_CFG1_CRCEN) == SPI_CFG1_CRCEN) ? 1UL : 0UL); in LL_SPI_IsEnabledCRC()
1592 __STATIC_INLINE void LL_SPI_SetCRCWidth(SPI_TypeDef *SPIx, uint32_t CRCLength) in LL_SPI_SetCRCWidth() argument
1594 MODIFY_REG(SPIx->CFG1, SPI_CFG1_CRCSIZE, CRCLength); in LL_SPI_SetCRCWidth()
1632 __STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(const SPI_TypeDef *SPIx) in LL_SPI_GetCRCWidth() argument
1634 return (uint32_t)(READ_BIT(SPIx->CFG1, SPI_CFG1_CRCSIZE)); in LL_SPI_GetCRCWidth()
1650 __STATIC_INLINE void LL_SPI_SetNSSMode(SPI_TypeDef *SPIx, uint32_t NSS) in LL_SPI_SetNSSMode() argument
1652 MODIFY_REG(SPIx->CFG2, SPI_CFG2_SSM | SPI_CFG2_SSOE, NSS); in LL_SPI_SetNSSMode()
1665 __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(const SPI_TypeDef *SPIx) in LL_SPI_GetNSSMode() argument
1667 return (uint32_t)(READ_BIT(SPIx->CFG2, SPI_CFG2_SSM | SPI_CFG2_SSOE)); in LL_SPI_GetNSSMode()
1678 __STATIC_INLINE void LL_SPI_EnableNSSPulseMgt(SPI_TypeDef *SPIx) in LL_SPI_EnableNSSPulseMgt() argument
1680 SET_BIT(SPIx->CFG2, SPI_CFG2_SSOM); in LL_SPI_EnableNSSPulseMgt()
1691 __STATIC_INLINE void LL_SPI_DisableNSSPulseMgt(SPI_TypeDef *SPIx) in LL_SPI_DisableNSSPulseMgt() argument
1693 CLEAR_BIT(SPIx->CFG2, SPI_CFG2_SSOM); in LL_SPI_DisableNSSPulseMgt()
1702 __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledNSSPulse() argument
1704 return ((READ_BIT(SPIx->CFG2, SPI_CFG2_SSOM) == SPI_CFG2_SSOM) ? 1UL : 0UL); in LL_SPI_IsEnabledNSSPulse()
1721 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXP(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_RXP() argument
1723 return ((READ_BIT(SPIx->SR, SPI_SR_RXP) == (SPI_SR_RXP)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_RXP()
1732 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXP(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_TXP() argument
1734 return ((READ_BIT(SPIx->SR, SPI_SR_TXP) == (SPI_SR_TXP)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_TXP()
1743 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_DXP(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_DXP() argument
1745 return ((READ_BIT(SPIx->SR, SPI_SR_DXP) == (SPI_SR_DXP)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_DXP()
1754 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_EOT(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_EOT() argument
1756 return ((READ_BIT(SPIx->SR, SPI_SR_EOT) == (SPI_SR_EOT)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_EOT()
1765 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXTF(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_TXTF() argument
1767 return ((READ_BIT(SPIx->SR, SPI_SR_TXTF) == (SPI_SR_TXTF)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_TXTF()
1776 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_UDR(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_UDR() argument
1778 return ((READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_UDR()
1787 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_CRCERR() argument
1789 return ((READ_BIT(SPIx->SR, SPI_SR_CRCE) == (SPI_SR_CRCE)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_CRCERR()
1798 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_MODF() argument
1800 return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_MODF()
1809 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_OVR() argument
1811 return ((READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_OVR()
1820 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_FRE() argument
1822 return ((READ_BIT(SPIx->SR, SPI_SR_TIFRE) == (SPI_SR_TIFRE)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_FRE()
1831 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_SUSP(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_SUSP() argument
1833 return ((READ_BIT(SPIx->SR, SPI_SR_SUSP) == (SPI_SR_SUSP)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_SUSP()
1842 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXC(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_TXC() argument
1844 return ((READ_BIT(SPIx->SR, SPI_SR_TXC) == (SPI_SR_TXC)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_TXC()
1853 __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXWNE(const SPI_TypeDef *SPIx) in LL_SPI_IsActiveFlag_RXWNE() argument
1855 return ((READ_BIT(SPIx->SR, SPI_SR_RXWNE) == (SPI_SR_RXWNE)) ? 1UL : 0UL); in LL_SPI_IsActiveFlag_RXWNE()
1864 __STATIC_INLINE uint32_t LL_SPI_GetRemainingDataFrames(const SPI_TypeDef *SPIx) in LL_SPI_GetRemainingDataFrames() argument
1866 return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_CTSIZE) >> SPI_SR_CTSIZE_Pos); in LL_SPI_GetRemainingDataFrames()
1879 __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOPackingLevel(const SPI_TypeDef *SPIx) in LL_SPI_GetRxFIFOPackingLevel() argument
1881 return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_RXPLVL)); in LL_SPI_GetRxFIFOPackingLevel()
1890 __STATIC_INLINE void LL_SPI_ClearFlag_EOT(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_EOT() argument
1892 SET_BIT(SPIx->IFCR, SPI_IFCR_EOTC); in LL_SPI_ClearFlag_EOT()
1901 __STATIC_INLINE void LL_SPI_ClearFlag_TXTF(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_TXTF() argument
1903 SET_BIT(SPIx->IFCR, SPI_IFCR_TXTFC); in LL_SPI_ClearFlag_TXTF()
1912 __STATIC_INLINE void LL_SPI_ClearFlag_UDR(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_UDR() argument
1914 SET_BIT(SPIx->IFCR, SPI_IFCR_UDRC); in LL_SPI_ClearFlag_UDR()
1923 __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_OVR() argument
1925 SET_BIT(SPIx->IFCR, SPI_IFCR_OVRC); in LL_SPI_ClearFlag_OVR()
1934 __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_CRCERR() argument
1936 SET_BIT(SPIx->IFCR, SPI_IFCR_CRCEC); in LL_SPI_ClearFlag_CRCERR()
1945 __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_MODF() argument
1947 SET_BIT(SPIx->IFCR, SPI_IFCR_MODFC); in LL_SPI_ClearFlag_MODF()
1956 __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_FRE() argument
1958 SET_BIT(SPIx->IFCR, SPI_IFCR_TIFREC); in LL_SPI_ClearFlag_FRE()
1967 __STATIC_INLINE void LL_SPI_ClearFlag_SUSP(SPI_TypeDef *SPIx) in LL_SPI_ClearFlag_SUSP() argument
1969 SET_BIT(SPIx->IFCR, SPI_IFCR_SUSPC); in LL_SPI_ClearFlag_SUSP()
1986 __STATIC_INLINE void LL_SPI_EnableIT_RXP(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_RXP() argument
1988 SET_BIT(SPIx->IER, SPI_IER_RXPIE); in LL_SPI_EnableIT_RXP()
1997 __STATIC_INLINE void LL_SPI_EnableIT_TXP(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_TXP() argument
1999 SET_BIT(SPIx->IER, SPI_IER_TXPIE); in LL_SPI_EnableIT_TXP()
2008 __STATIC_INLINE void LL_SPI_EnableIT_DXP(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_DXP() argument
2010 SET_BIT(SPIx->IER, SPI_IER_DXPIE); in LL_SPI_EnableIT_DXP()
2019 __STATIC_INLINE void LL_SPI_EnableIT_EOT(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_EOT() argument
2021 SET_BIT(SPIx->IER, SPI_IER_EOTIE); in LL_SPI_EnableIT_EOT()
2030 __STATIC_INLINE void LL_SPI_EnableIT_TXTF(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_TXTF() argument
2032 SET_BIT(SPIx->IER, SPI_IER_TXTFIE); in LL_SPI_EnableIT_TXTF()
2041 __STATIC_INLINE void LL_SPI_EnableIT_UDR(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_UDR() argument
2043 SET_BIT(SPIx->IER, SPI_IER_UDRIE); in LL_SPI_EnableIT_UDR()
2052 __STATIC_INLINE void LL_SPI_EnableIT_OVR(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_OVR() argument
2054 SET_BIT(SPIx->IER, SPI_IER_OVRIE); in LL_SPI_EnableIT_OVR()
2063 __STATIC_INLINE void LL_SPI_EnableIT_CRCERR(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_CRCERR() argument
2065 SET_BIT(SPIx->IER, SPI_IER_CRCEIE); in LL_SPI_EnableIT_CRCERR()
2074 __STATIC_INLINE void LL_SPI_EnableIT_FRE(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_FRE() argument
2076 SET_BIT(SPIx->IER, SPI_IER_TIFREIE); in LL_SPI_EnableIT_FRE()
2085 __STATIC_INLINE void LL_SPI_EnableIT_MODF(SPI_TypeDef *SPIx) in LL_SPI_EnableIT_MODF() argument
2087 SET_BIT(SPIx->IER, SPI_IER_MODFIE); in LL_SPI_EnableIT_MODF()
2096 __STATIC_INLINE void LL_SPI_DisableIT_RXP(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_RXP() argument
2098 CLEAR_BIT(SPIx->IER, SPI_IER_RXPIE); in LL_SPI_DisableIT_RXP()
2107 __STATIC_INLINE void LL_SPI_DisableIT_TXP(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_TXP() argument
2109 CLEAR_BIT(SPIx->IER, SPI_IER_TXPIE); in LL_SPI_DisableIT_TXP()
2118 __STATIC_INLINE void LL_SPI_DisableIT_DXP(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_DXP() argument
2120 CLEAR_BIT(SPIx->IER, SPI_IER_DXPIE); in LL_SPI_DisableIT_DXP()
2129 __STATIC_INLINE void LL_SPI_DisableIT_EOT(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_EOT() argument
2131 CLEAR_BIT(SPIx->IER, SPI_IER_EOTIE); in LL_SPI_DisableIT_EOT()
2140 __STATIC_INLINE void LL_SPI_DisableIT_TXTF(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_TXTF() argument
2142 CLEAR_BIT(SPIx->IER, SPI_IER_TXTFIE); in LL_SPI_DisableIT_TXTF()
2151 __STATIC_INLINE void LL_SPI_DisableIT_UDR(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_UDR() argument
2153 CLEAR_BIT(SPIx->IER, SPI_IER_UDRIE); in LL_SPI_DisableIT_UDR()
2162 __STATIC_INLINE void LL_SPI_DisableIT_OVR(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_OVR() argument
2164 CLEAR_BIT(SPIx->IER, SPI_IER_OVRIE); in LL_SPI_DisableIT_OVR()
2173 __STATIC_INLINE void LL_SPI_DisableIT_CRCERR(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_CRCERR() argument
2175 CLEAR_BIT(SPIx->IER, SPI_IER_CRCEIE); in LL_SPI_DisableIT_CRCERR()
2184 __STATIC_INLINE void LL_SPI_DisableIT_FRE(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_FRE() argument
2186 CLEAR_BIT(SPIx->IER, SPI_IER_TIFREIE); in LL_SPI_DisableIT_FRE()
2195 __STATIC_INLINE void LL_SPI_DisableIT_MODF(SPI_TypeDef *SPIx) in LL_SPI_DisableIT_MODF() argument
2197 CLEAR_BIT(SPIx->IER, SPI_IER_MODFIE); in LL_SPI_DisableIT_MODF()
2206 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXP(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_RXP() argument
2208 return ((READ_BIT(SPIx->IER, SPI_IER_RXPIE) == (SPI_IER_RXPIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_RXP()
2217 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXP(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_TXP() argument
2219 return ((READ_BIT(SPIx->IER, SPI_IER_TXPIE) == (SPI_IER_TXPIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_TXP()
2228 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_DXP(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_DXP() argument
2230 return ((READ_BIT(SPIx->IER, SPI_IER_DXPIE) == (SPI_IER_DXPIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_DXP()
2239 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_EOT(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_EOT() argument
2241 return ((READ_BIT(SPIx->IER, SPI_IER_EOTIE) == (SPI_IER_EOTIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_EOT()
2250 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXTF(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_TXTF() argument
2252 return ((READ_BIT(SPIx->IER, SPI_IER_TXTFIE) == (SPI_IER_TXTFIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_TXTF()
2261 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_UDR(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_UDR() argument
2263 return ((READ_BIT(SPIx->IER, SPI_IER_UDRIE) == (SPI_IER_UDRIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_UDR()
2272 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_OVR(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_OVR() argument
2274 return ((READ_BIT(SPIx->IER, SPI_IER_OVRIE) == (SPI_IER_OVRIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_OVR()
2283 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_CRCERR(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_CRCERR() argument
2285 return ((READ_BIT(SPIx->IER, SPI_IER_CRCEIE) == (SPI_IER_CRCEIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_CRCERR()
2294 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_FRE(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_FRE() argument
2296 return ((READ_BIT(SPIx->IER, SPI_IER_TIFREIE) == (SPI_IER_TIFREIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_FRE()
2305 __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_MODF(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledIT_MODF() argument
2307 return ((READ_BIT(SPIx->IER, SPI_IER_MODFIE) == (SPI_IER_MODFIE)) ? 1UL : 0UL); in LL_SPI_IsEnabledIT_MODF()
2324 __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx) in LL_SPI_EnableDMAReq_RX() argument
2326 SET_BIT(SPIx->CFG1, SPI_CFG1_RXDMAEN); in LL_SPI_EnableDMAReq_RX()
2335 __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx) in LL_SPI_DisableDMAReq_RX() argument
2337 CLEAR_BIT(SPIx->CFG1, SPI_CFG1_RXDMAEN); in LL_SPI_DisableDMAReq_RX()
2346 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledDMAReq_RX() argument
2348 return ((READ_BIT(SPIx->CFG1, SPI_CFG1_RXDMAEN) == (SPI_CFG1_RXDMAEN)) ? 1UL : 0UL); in LL_SPI_IsEnabledDMAReq_RX()
2357 __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx) in LL_SPI_EnableDMAReq_TX() argument
2359 SET_BIT(SPIx->CFG1, SPI_CFG1_TXDMAEN); in LL_SPI_EnableDMAReq_TX()
2368 __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx) in LL_SPI_DisableDMAReq_TX() argument
2370 CLEAR_BIT(SPIx->CFG1, SPI_CFG1_TXDMAEN); in LL_SPI_DisableDMAReq_TX()
2379 __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabledDMAReq_TX() argument
2381 return ((READ_BIT(SPIx->CFG1, SPI_CFG1_TXDMAEN) == (SPI_CFG1_TXDMAEN)) ? 1UL : 0UL); in LL_SPI_IsEnabledDMAReq_TX()
2389 __STATIC_INLINE uint32_t LL_SPI_DMA_GetTxRegAddr(const SPI_TypeDef *SPIx) in LL_SPI_DMA_GetTxRegAddr() argument
2391 return (uint32_t) &(SPIx->TXDR); in LL_SPI_DMA_GetTxRegAddr()
2400 __STATIC_INLINE uint32_t LL_SPI_DMA_GetRxRegAddr(const SPI_TypeDef *SPIx) in LL_SPI_DMA_GetRxRegAddr() argument
2402 return (uint32_t) &(SPIx->RXDR); in LL_SPI_DMA_GetRxRegAddr()
2418 __STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx) /* Derogation MISRAC2012-Rule-8.13 */ in LL_SPI_ReceiveData8() argument
2420 return (*((__IO uint8_t *)&SPIx->RXDR)); in LL_SPI_ReceiveData8()
2429 __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx) /* Derogation MISRAC2012-Rule-8.13… in LL_SPI_ReceiveData16() argument
2432 __IO uint16_t *spirxdr = (__IO uint16_t *)(&(SPIx->RXDR)); in LL_SPI_ReceiveData16()
2435 return (*((__IO uint16_t *)&SPIx->RXDR)); in LL_SPI_ReceiveData16()
2445 __STATIC_INLINE uint32_t LL_SPI_ReceiveData32(SPI_TypeDef *SPIx) /* Derogation MISRAC2012-Rule-8.13… in LL_SPI_ReceiveData32() argument
2447 return (*((__IO uint32_t *)&SPIx->RXDR)); in LL_SPI_ReceiveData32()
2457 __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData) in LL_SPI_TransmitData8() argument
2459 *((__IO uint8_t *)&SPIx->TXDR) = TxData; in LL_SPI_TransmitData8()
2469 __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) in LL_SPI_TransmitData16() argument
2472 __IO uint16_t *spitxdr = ((__IO uint16_t *)&SPIx->TXDR); in LL_SPI_TransmitData16()
2475 *((__IO uint16_t *)&SPIx->TXDR) = TxData; in LL_SPI_TransmitData16()
2486 __STATIC_INLINE void LL_SPI_TransmitData32(SPI_TypeDef *SPIx, uint32_t TxData) in LL_SPI_TransmitData32() argument
2488 *((__IO uint32_t *)&SPIx->TXDR) = TxData; in LL_SPI_TransmitData32()
2498 __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly) in LL_SPI_SetCRCPolynomial() argument
2500 WRITE_REG(SPIx->CRCPOLY, CRCPoly); in LL_SPI_SetCRCPolynomial()
2509 __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(const SPI_TypeDef *SPIx) in LL_SPI_GetCRCPolynomial() argument
2511 return (uint32_t)(READ_REG(SPIx->CRCPOLY)); in LL_SPI_GetCRCPolynomial()
2521 __STATIC_INLINE void LL_SPI_SetUDRPattern(SPI_TypeDef *SPIx, uint32_t Pattern) in LL_SPI_SetUDRPattern() argument
2523 WRITE_REG(SPIx->UDRDR, Pattern); in LL_SPI_SetUDRPattern()
2532 __STATIC_INLINE uint32_t LL_SPI_GetUDRPattern(const SPI_TypeDef *SPIx) in LL_SPI_GetUDRPattern() argument
2534 return (uint32_t)(READ_REG(SPIx->UDRDR)); in LL_SPI_GetUDRPattern()
2543 __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(const SPI_TypeDef *SPIx) in LL_SPI_GetRxCRC() argument
2545 return (uint32_t)(READ_REG(SPIx->RXCRC)); in LL_SPI_GetRxCRC()
2554 __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(const SPI_TypeDef *SPIx) in LL_SPI_GetTxCRC() argument
2556 return (uint32_t)(READ_REG(SPIx->TXCRC)); in LL_SPI_GetTxCRC()
2573 __STATIC_INLINE void LL_SPI_Enable_SelectedTrigger(SPI_TypeDef *SPIx) in LL_SPI_Enable_SelectedTrigger() argument
2575 SET_BIT(SPIx->AUTOCR, SPI_AUTOCR_TRIGEN); in LL_SPI_Enable_SelectedTrigger()
2584 __STATIC_INLINE void LL_SPI_Disable_SelectedTrigger(SPI_TypeDef *SPIx) in LL_SPI_Disable_SelectedTrigger() argument
2586 CLEAR_BIT(SPIx->AUTOCR, SPI_AUTOCR_TRIGEN); in LL_SPI_Disable_SelectedTrigger()
2595 __STATIC_INLINE uint32_t LL_SPI_IsEnabled_SelectedTrigger(const SPI_TypeDef *SPIx) in LL_SPI_IsEnabled_SelectedTrigger() argument
2597 return ((READ_BIT(SPIx->AUTOCR, SPI_AUTOCR_TRIGEN) == (SPI_AUTOCR_TRIGEN)) ? 1UL : 0UL); in LL_SPI_IsEnabled_SelectedTrigger()
2609 __STATIC_INLINE void LL_SPI_SetTriggerPolarity(SPI_TypeDef *SPIx, uint32_t Polarity) in LL_SPI_SetTriggerPolarity() argument
2611 MODIFY_REG(SPIx->AUTOCR, SPI_AUTOCR_TRIGPOL, Polarity); in LL_SPI_SetTriggerPolarity()
2622 __STATIC_INLINE uint32_t LL_SPI_GetTriggerPolarity(const SPI_TypeDef *SPIx) in LL_SPI_GetTriggerPolarity() argument
2624 return (uint32_t)(READ_BIT(SPIx->AUTOCR, SPI_AUTOCR_TRIGPOL)); in LL_SPI_GetTriggerPolarity()
2658 __STATIC_INLINE void LL_SPI_SetSelectedTrigger(SPI_TypeDef *SPIx, uint32_t Trigger) in LL_SPI_SetSelectedTrigger() argument
2660 MODIFY_REG(SPIx->AUTOCR, SPI_AUTOCR_TRIGSEL, (Trigger & SPI_AUTOCR_TRIGSEL_Msk)); in LL_SPI_SetSelectedTrigger()
2693 __STATIC_INLINE uint32_t LL_SPI_GetSelectedTrigger(const SPI_TypeDef *SPIx) in LL_SPI_GetSelectedTrigger() argument
2696 if (IS_LL_SPI_GRP2_INSTANCE(SPIx)) in LL_SPI_GetSelectedTrigger()
2698 return (uint32_t)((READ_BIT(SPIx->AUTOCR, SPI_AUTOCR_TRIGSEL) | LL_SPI_TRIG_GRP2)); in LL_SPI_GetSelectedTrigger()
2702 return (uint32_t)((READ_BIT(SPIx->AUTOCR, SPI_AUTOCR_TRIGSEL) | LL_SPI_TRIG_GRP1)); in LL_SPI_GetSelectedTrigger()
2705 return (uint32_t)((READ_BIT(SPIx->AUTOCR, SPI_AUTOCR_TRIGSEL) | LL_SPI_TRIG_GRP1)); in LL_SPI_GetSelectedTrigger()
2718 ErrorStatus LL_SPI_DeInit(const SPI_TypeDef *SPIx);
2719 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct);