Lines Matching refs:RCC
34 #if defined(RCC)
1170 #define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
1177 #define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
1470 SET_BIT(RCC->CR, RCC_CR_CSSON); in LL_RCC_HSE_EnableCSS()
1480 SET_BIT(RCC->CR, RCC_CR_HSEBYP); in LL_RCC_HSE_EnableBypass()
1490 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); in LL_RCC_HSE_DisableBypass()
1500 SET_BIT(RCC->CR, RCC_CR_HSEON); in LL_RCC_HSE_Enable()
1510 CLEAR_BIT(RCC->CR, RCC_CR_HSEON); in LL_RCC_HSE_Disable()
1520 return ((READ_BIT(RCC->CR, RCC_CR_HSERDY) == RCC_CR_HSERDY) ? 1UL : 0UL); in LL_RCC_HSE_IsReady()
1534 MODIFY_REG(RCC->CR, RCC_CR_HSEEXT, HSEMode); in LL_RCC_HSE_SetClockMode()
1546 return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSEEXT)); in LL_RCC_HSE_GetClockMode()
1565 SET_BIT(RCC->CR, RCC_CR_HSIKERON); in LL_RCC_HSI_EnableInStopMode()
1575 CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON); in LL_RCC_HSI_DisableInStopMode()
1585 return ((READ_BIT(RCC->CR, RCC_CR_HSIKERON) == RCC_CR_HSIKERON) ? 1UL : 0UL); in LL_RCC_HSI_IsEnabledInStopMode()
1595 SET_BIT(RCC->CR, RCC_CR_HSION); in LL_RCC_HSI_Enable()
1605 CLEAR_BIT(RCC->CR, RCC_CR_HSION); in LL_RCC_HSI_Disable()
1615 return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL); in LL_RCC_HSI_IsReady()
1627 return (uint32_t)(READ_BIT(RCC->ICSCR3, RCC_ICSCR3_HSICAL) >> RCC_ICSCR3_HSICAL_Pos); in LL_RCC_HSI_GetCalibration()
1641 MODIFY_REG(RCC->ICSCR3, RCC_ICSCR3_HSITRIM, Value << RCC_ICSCR3_HSITRIM_Pos); in LL_RCC_HSI_SetCalibTrimming()
1651 return (uint32_t)(READ_BIT(RCC->ICSCR3, RCC_ICSCR3_HSITRIM) >> RCC_ICSCR3_HSITRIM_Pos); in LL_RCC_HSI_GetCalibTrimming()
1669 SET_BIT(RCC->CR, RCC_CR_HSI48ON); in LL_RCC_HSI48_Enable()
1679 CLEAR_BIT(RCC->CR, RCC_CR_HSI48ON); in LL_RCC_HSI48_Disable()
1689 return ((READ_BIT(RCC->CR, RCC_CR_HSI48RDY) == RCC_CR_HSI48RDY) ? 1UL : 0UL); in LL_RCC_HSI48_IsReady()
1699 return (uint32_t)(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48CAL) >> RCC_CRRCR_HSI48CAL_Pos); in LL_RCC_HSI48_GetCalibration()
1717 SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); in LL_RCC_LSE_Enable()
1727 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); in LL_RCC_LSE_Disable()
1737 SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); in LL_RCC_LSE_EnableBypass()
1747 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); in LL_RCC_LSE_DisableBypass()
1763 MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive); in LL_RCC_LSE_SetDriveCapability()
1777 return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSEDRV)); in LL_RCC_LSE_GetDriveCapability()
1787 SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON); in LL_RCC_LSE_EnableCSS()
1799 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON); in LL_RCC_LSE_DisableCSS()
1809 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RCC_BDCR_LSERDY) ? 1UL : 0UL); in LL_RCC_LSE_IsReady()
1819 SET_BIT(RCC->BDCR, RCC_BDCR_LSESYSEN); in LL_RCC_LSE_EnablePropagation()
1829 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSESYSRDY) == RCC_BDCR_LSESYSRDY) ? 1UL : 0UL); in LL_RCC_LSESYS_IsReady()
1839 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSESYSEN); in LL_RCC_LSE_DisablePropagation()
1849 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSESYSRDY) == RCC_BDCR_LSESYSRDY) ? 1UL : 0UL); in LL_RCC_LSE_IsPropagationReady()
1859 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSECSSD) == RCC_BDCR_LSECSSD) ? 1UL : 0UL); in LL_RCC_LSE_IsCSSDetected()
1871 SET_BIT(RCC->BDCR, RCC_BDCR_LSEGFON); in LL_RCC_LSE_EnableGlitchFilter()
1882 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEGFON); in LL_RCC_LSE_DisableGlitchFilter()
1892 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSEGFON) == RCC_BDCR_LSEGFON) ? 1UL : 0UL); in LL_RCC_LSE_IsGlitchFilterEnabled()
1910 SET_BIT(RCC->BDCR, RCC_BDCR_LSION); in LL_RCC_LSI_Enable()
1920 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSION); in LL_RCC_LSI_Disable()
1930 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSIRDY) == RCC_BDCR_LSIRDY) ? 1UL : 0UL); in LL_RCC_LSI_IsReady()
1943 MODIFY_REG(RCC->BDCR, RCC_BDCR_LSIPREDIV, LSIPrescaler); in LL_RCC_LSI_SetPrescaler()
1955 return (READ_BIT(RCC->BDCR, RCC_BDCR_LSIPREDIV)); in LL_RCC_LSI_GetPrescaler()
1973 SET_BIT(RCC->CR, RCC_CR_MSIKON); in LL_RCC_MSIK_Enable()
1983 CLEAR_BIT(RCC->CR, RCC_CR_MSIKON); in LL_RCC_MSIK_Disable()
1993 return ((READ_BIT(RCC->CR, RCC_CR_MSIKRDY) == RCC_CR_MSIKRDY) ? 1UL : 0UL); in LL_RCC_MSIK_IsReady()
2011 SET_BIT(RCC->CR, RCC_CR_SHSION); in LL_RCC_SHSI_Enable()
2021 CLEAR_BIT(RCC->CR, RCC_CR_SHSION); in LL_RCC_SHSI_Disable()
2031 return ((READ_BIT(RCC->CR, RCC_CR_SHSIRDY) == RCC_CR_SHSIRDY) ? 1UL : 0UL); in LL_RCC_SHSI_IsReady()
2052 SET_BIT(RCC->CR, RCC_CR_MSISON); in LL_RCC_MSIS_Enable()
2063 CLEAR_BIT(RCC->CR, RCC_CR_MSISON); in LL_RCC_MSIS_Disable()
2074 return ((READ_BIT(RCC->CR, RCC_CR_MSISRDY) == RCC_CR_MSISRDY) ? 1UL : 0UL); in LL_RCC_MSIS_IsReady()
2089 SET_BIT(RCC->CR, RCC_CR_MSIPLLEN); in LL_RCC_MSI_EnablePLLMode()
2101 CLEAR_BIT(RCC->CR, RCC_CR_MSIPLLEN); in LL_RCC_MSI_DisablePLLMode()
2111 return ((READ_BIT(RCC->CR, RCC_CR_MSIPLLEN) == RCC_CR_MSIPLLEN) ? 1UL : 0UL); in LL_RCC_IsEnabledPLLMode()
2124 MODIFY_REG(RCC->CR, RCC_CR_MSIPLLSEL, Source); in LL_RCC_SetMSIPLLMode()
2136 return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_MSIPLLSEL)); in LL_RCC_GetMSIPLLMode()
2146 SET_BIT(RCC->CR, RCC_CR_MSIPLLFAST); in LL_RCC_Enable_MSIPLLFAST()
2156 CLEAR_BIT(RCC->CR, RCC_CR_MSIPLLFAST); in LL_RCC_Disable_MSIPLLFAST()
2166 return ((READ_BIT(RCC->CR, RCC_CR_MSIPLLFAST) == RCC_CR_MSIPLLFAST) ? 1UL : 0UL); in LL_RCC_MSI_IsEnabledMSIPLLFAST()
2180 MODIFY_REG(RCC->ICSCR1, RCC_ICSCR1_MSIBIAS, BiasMode); in LL_RCC_MSI_SetMSIBiasMode()
2193 return (uint32_t)(READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIBIAS)); in LL_RCC_MSI_GetMSIBiasMode()
2204 SET_BIT(RCC->CR, RCC_CR_MSIKERON); in LL_RCC_MSIK_EnableInStopMode()
2214 CLEAR_BIT(RCC->CR, RCC_CR_MSIKERON); in LL_RCC_MSIK_DisableInStopMode()
2224 return ((READ_BIT(RCC->CR, RCC_CR_MSIKERON) == RCC_CR_MSIKERON) ? 1UL : 0UL); in LL_RCC_MSIK_IsEnabledInStopMode()
2237 SET_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIRGSEL); in LL_RCC_MSI_EnableRangeSelection()
2247 return ((READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIRGSEL) == RCC_ICSCR1_MSIRGSEL) ? 1UL : 0UL); in LL_RCC_MSI_IsEnabledRangeSelect()
2274 MODIFY_REG(RCC->ICSCR1, RCC_ICSCR1_MSISRANGE, Range); in LL_RCC_MSIS_SetRange()
2301 return (uint32_t)(READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSISRANGE)); in LL_RCC_MSIS_GetRange()
2318 MODIFY_REG(RCC->CSR, RCC_CSR_MSISSRANGE, Range); in LL_RCC_MSIS_SetRangeAfterStandby()
2334 return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_MSISSRANGE)); in LL_RCC_MSIS_GetRangeAfterStandby()
2352 …MODIFY_REG(RCC->ICSCR2, (RCC_ICSCR2_MSITRIM0 >> Oscillator), Value << (RCC_ICSCR2_MSITRIM0_Pos - … in LL_RCC_MSI_SetCalibTrimming()
2367 return (uint32_t)(READ_BIT(RCC->ICSCR2, in LL_RCC_MSI_GetCalibTrimming()
2385 …return (uint32_t)(READ_BIT(RCC->ICSCR1, (RCC_ICSCR1_MSICAL0 >> Oscillator)) >> (RCC_ICSCR1_MSICAL0… in LL_RCC_MSI_GetCalibration()
2420 MODIFY_REG(RCC->ICSCR1, RCC_ICSCR1_MSIKRANGE, Range); in LL_RCC_MSIK_SetRange()
2446 return (uint32_t)(READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIKRANGE)); in LL_RCC_MSIK_GetRange()
2462 MODIFY_REG(RCC->CSR, RCC_CSR_MSIKSRANGE, Range); in LL_RCC_MSIK_SetRangeAfterStandby()
2477 return (uint32_t)(READ_BIT(RCC->CSR, RCC_CSR_MSIKSRANGE)); in LL_RCC_MSIK_GetRangeAfterStandby()
2494 SET_BIT(RCC->BDCR, RCC_BDCR_LSCOEN); in LL_RCC_LSCO_Enable()
2504 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN); in LL_RCC_LSCO_Disable()
2517 MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL, Source); in LL_RCC_LSCO_SetSource()
2529 return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSCOSEL)); in LL_RCC_LSCO_GetSource()
2552 MODIFY_REG(RCC->CFGR1, RCC_CFGR1_SW, Source); in LL_RCC_SetSysClkSource()
2566 return (uint32_t)(READ_BIT(RCC->CFGR1, RCC_CFGR1_SWS)); in LL_RCC_GetSysClkSource()
2586 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_HPRE, Prescaler); in LL_RCC_SetAHBPrescaler()
2600 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL, SystickSource); in LL_RCC_SetSystickClockSource()
2616 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE1, Prescaler); in LL_RCC_SetAPB1Prescaler()
2632 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE2, Prescaler); in LL_RCC_SetAPB2Prescaler()
2648 MODIFY_REG(RCC->CFGR3, RCC_CFGR3_PPRE3, Prescaler); in LL_RCC_SetAPB3Prescaler()
2665 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PPRE_DPHY, Prescaler); in LL_RCC_SetDPHYPrescaler()
2685 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_HPRE)); in LL_RCC_GetAHBPrescaler()
2698 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_SYSTICKSEL)); in LL_RCC_GetSystickClockSource()
2713 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PPRE1)); in LL_RCC_GetAPB1Prescaler()
2728 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PPRE2)); in LL_RCC_GetAPB2Prescaler()
2743 return (uint32_t)(READ_BIT(RCC->CFGR3, RCC_CFGR3_PPRE3)); in LL_RCC_GetAPB3Prescaler()
2759 return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PPRE_DPHY)); in LL_RCC_GetDPHYPrescaler()
2773 MODIFY_REG(RCC->CFGR1, RCC_CFGR1_STOPWUCK, Clock); in LL_RCC_SetClkAfterWakeFromStop()
2785 return (uint32_t)(READ_BIT(RCC->CFGR1, RCC_CFGR1_STOPWUCK)); in LL_RCC_GetClkAfterWakeFromStop()
2798 MODIFY_REG(RCC->CFGR1, RCC_CFGR1_STOPKERWUCK, Clock); in LL_RCC_SetKerClkAfterWakeFromStop()
2810 return (uint32_t)(READ_BIT(RCC->CFGR1, RCC_CFGR1_STOPKERWUCK)); in LL_RCC_GetKerClkAfterWakeFromStop()
2845 MODIFY_REG(RCC->CFGR1, RCC_CFGR1_MCOSEL | RCC_CFGR1_MCOPRE, MCOxSource | MCOxPrescaler); in LL_RCC_ConfigMCO()
2908 MODIFY_REG(RCC->CCIPR1, UARTxSource >> 16U, (UARTxSource & 0x0000FFFFU)); in LL_RCC_SetUARTClockSource()
2924 MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_LPUART1SEL, LPUARTxSource); in LL_RCC_SetLPUARTClockSource()
3028 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_FDCANSEL, FDCANxSource); in LL_RCC_SetFDCANClockSource()
3053 MODIFY_REG(RCC->CCIPR2, (SAIxSource >> 16U), (SAIxSource & 0x0000FFFFU)); in LL_RCC_SetSAIClockSource()
3066 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL, SDMMCxSource); in LL_RCC_SetSDMMCKernelClockSource()
3081 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ICLKSEL, SDMMCxSource); in LL_RCC_SetSDMMCClockSource()
3095 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_RNGSEL, RNGxSource); in LL_RCC_SetRNGClockSource()
3111 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_USBPHYCSEL, Source); in LL_RCC_SetUSBPHYClockSource()
3127 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ICLKSEL, USBxSource); in LL_RCC_SetUSBClockSource()
3144 MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_ADCDACSEL, ADCxDAC1Source); in LL_RCC_SetADCDACClockSource()
3157 MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_DAC1SEL, Source); in LL_RCC_SetDAC1ClockSource()
3173 MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_ADF1SEL, Source); in LL_RCC_SetADF1ClockSource()
3189 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_MDF1SEL, Source); in LL_RCC_SetMDF1ClockSource()
3204 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_OCTOSPISEL, Source); in LL_RCC_SetOCTOSPIClockSource()
3220 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_HSPISEL, Source); in LL_RCC_SetHSPIClockSource()
3235 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_SAESSEL, Source); in LL_RCC_SetSAESClockSource()
3250 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_DSIHOSTSEL, Source); in LL_RCC_SetDSIClockSource()
3265 MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_LTDCSEL, Source); in LL_RCC_SetLTDCClockSource()
3325 return (uint32_t)(READ_BIT(RCC->CCIPR1, UARTx) | (UARTx << 16U)); in LL_RCC_GetUARTClockSource()
3341 return (uint32_t)(READ_BIT(RCC->CCIPR3, LPUARTx)); in LL_RCC_GetLPUARTClockSource()
3454 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL, TIMICSource); in LL_RCC_SetTIMICClockSource()
3470 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_TIMICSEL)); in LL_RCC_GetTIMICClockSource()
3485 return (uint32_t)(READ_BIT(RCC->CCIPR1, FDCANx)); in LL_RCC_GetFDCANClockSource()
3511 return (uint32_t)(READ_BIT(RCC->CCIPR2, SAIx) | (SAIx << 16U)); in LL_RCC_GetSAIClockSource()
3525 return (uint32_t)(READ_BIT(RCC->CCIPR2, SDMMCx)); in LL_RCC_GetSDMMCKernelClockSource()
3541 return (uint32_t)(READ_BIT(RCC->CCIPR1, SDMMCx)); in LL_RCC_GetSDMMCClockSource()
3556 return (uint32_t)(READ_BIT(RCC->CCIPR2, RNGx)); in LL_RCC_GetRNGClockSource()
3573 return (uint32_t)(READ_BIT(RCC->CCIPR2, USBPHYx)); in LL_RCC_GetUSBPHYClockSource()
3590 return (uint32_t)(READ_BIT(RCC->CCIPR1, USBx)); in LL_RCC_GetUSBClockSource()
3607 return (uint32_t)(READ_BIT(RCC->CCIPR3, ADCxDAC1)); in LL_RCC_GetADCDACClockSource()
3624 return (uint32_t)(READ_BIT(RCC->CCIPR3, ADF1x)); in LL_RCC_GetADF1ClockSource()
3638 return (uint32_t)(READ_BIT(RCC->CCIPR3, DAC1x)); in LL_RCC_GetDAC1ClockSource()
3655 return (uint32_t)(READ_BIT(RCC->CCIPR2, MDF1x)); in LL_RCC_GetMDF1ClockSource()
3671 return (uint32_t)(READ_BIT(RCC->CCIPR2, OCTOSPIx)); in LL_RCC_GetOCTOSPIClockSource()
3688 return (uint32_t)(READ_BIT(RCC->CCIPR2, HSPIx)); in LL_RCC_GetHSPIClockSource()
3707 return (uint32_t)(READ_BIT(RCC->CCIPR2, SAESx)); in LL_RCC_GetSAESClockSource()
3723 return (uint32_t)(READ_BIT(RCC->CCIPR2, DSIx)); in LL_RCC_GetDSIClockSource()
3739 return (uint32_t)(READ_BIT(RCC->CCIPR2, LTDCx)); in LL_RCC_GetLTDCClockSource()
3762 MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source); in LL_RCC_SetRTCClockSource()
3776 return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL)); in LL_RCC_GetRTCClockSource()
3786 SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN); in LL_RCC_EnableRTC()
3796 CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN); in LL_RCC_DisableRTC()
3806 return ((READ_BIT(RCC->BDCR, RCC_BDCR_RTCEN) == RCC_BDCR_RTCEN) ? 1UL : 0UL); in LL_RCC_IsEnabledRTC()
3816 SET_BIT(RCC->BDCR, RCC_BDCR_BDRST); in LL_RCC_ForceBackupDomainReset()
3826 CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST); in LL_RCC_ReleaseBackupDomainReset()
3845 SET_BIT(RCC->CR, RCC_CR_PLL1ON); in LL_RCC_PLL1_Enable()
3857 CLEAR_BIT(RCC->CR, RCC_CR_PLL1ON); in LL_RCC_PLL1_Disable()
3868 return ((READ_BIT(RCC->CR, RCC_CR_PLL1RDY) == RCC_CR_PLL1RDY) ? 1UL : 0UL); in LL_RCC_PLL1_IsReady()
3892 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC | RCC_PLL1CFGR_PLL1M, Source | \ in LL_RCC_PLL1_ConfigDomain_SYS()
3894 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1R, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SYS()
3920 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC | RCC_PLL1CFGR_PLL1M, Source | \ in LL_RCC_PLL1_ConfigDomain_SAI()
3922 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1P, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_SAI()
3948 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC | RCC_PLL1CFGR_PLL1M, Source | \ in LL_RCC_PLL1_ConfigDomain_48M()
3950 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N | RCC_PLL1DIVR_PLL1Q, ((PLLN - 1UL) << \ in LL_RCC_PLL1_ConfigDomain_48M()
3968 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC, PLL1Source); in LL_RCC_PLL1_SetMainSource()
3983 return (uint32_t)(READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1SRC)); in LL_RCC_PLL1_GetMainSource()
3994 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N, (PLL1N - 1UL) << RCC_PLL1DIVR_PLL1N_Pos); in LL_RCC_PLL1_SetN()
4005 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1N) >> RCC_PLL1DIVR_PLL1N_Pos) + 1UL); in LL_RCC_PLL1_GetN()
4017 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P, (PLL1P - 1UL) << RCC_PLL1DIVR_PLL1P_Pos); in LL_RCC_PLL1_SetP()
4029 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1P) >> RCC_PLL1DIVR_PLL1P_Pos) + 1UL); in LL_RCC_PLL1_GetP()
4041 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q, (PLL1Q - 1UL) << RCC_PLL1DIVR_PLL1Q_Pos); in LL_RCC_PLL1_SetQ()
4053 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1Q) >> RCC_PLL1DIVR_PLL1Q_Pos) + 1UL); in LL_RCC_PLL1_GetQ()
4065 MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R, (PLL1R - 1UL) << RCC_PLL1DIVR_PLL1R_Pos); in LL_RCC_PLL1_SetR()
4077 return (uint32_t)((READ_BIT(RCC->PLL1DIVR, RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1UL); in LL_RCC_PLL1_GetR()
4088 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1M, (PLL1M - 1UL) << RCC_PLL1CFGR_PLL1M_Pos); in LL_RCC_PLL1_SetDivider()
4099 return (uint32_t)((READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1M) >> RCC_PLL1CFGR_PLL1M_Pos) + 1UL); in LL_RCC_PLL1_GetDivider()
4110 SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1PEN); in LL_RCC_PLL1_EnableDomain_SAI()
4125 CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1PEN); in LL_RCC_PLL1_DisableDomain_SAI()
4136 return ((READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1PEN) == (RCC_PLL1CFGR_PLL1PEN)) ? 1UL : 0UL); in LL_RCC_PLL1_IsEnabledDomain_SAI()
4147 SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1QEN); in LL_RCC_PLL1_EnableDomain_48M()
4161 CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1QEN); in LL_RCC_PLL1_DisableDomain_48M()
4172 return ((READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1QEN) == (RCC_PLL1CFGR_PLL1QEN)) ? 1UL : 0UL); in LL_RCC_PLL1_IsEnabledDomain_48M()
4183 SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1REN); in LL_RCC_PLL1_EnableDomain_SYS()
4198 CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1REN); in LL_RCC_PLL1_DisableDomain_SYS()
4209 return ((READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1REN) == (RCC_PLL1CFGR_PLL1REN)) ? 1UL : 0UL); in LL_RCC_PLL1_IsEnabledDomain_SYS()
4220 SET_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Enable()
4231 …return ((READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN) == RCC_PLL1CFGR_PLL1FRACEN) ? 1UL : 0UL); in LL_RCC_PLL1FRACN_IsEnabled()
4242 CLEAR_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1FRACEN); in LL_RCC_PLL1FRACN_Disable()
4253 MODIFY_REG(RCC->PLL1FRACR, RCC_PLL1FRACR_PLL1FRACN, FRACN << RCC_PLL1FRACR_PLL1FRACN_Pos); in LL_RCC_PLL1_SetFRACN()
4264 …return (uint32_t)(READ_BIT(RCC->PLL1FRACR, RCC_PLL1FRACR_PLL1FRACN) >> RCC_PLL1FRACR_PLL1FRACN_Po… in LL_RCC_PLL1_GetFRACN()
4279 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1RGE, InputRange); in LL_RCC_PLL1_SetVCOInputRange()
4299 MODIFY_REG(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1MBOOST, BoostDiv); in LL_RCC_SetPll1EPodPrescaler()
4318 return (uint32_t)(READ_BIT(RCC->PLL1CFGR, RCC_PLL1CFGR_PLL1MBOOST)); in LL_RCC_GetPll1EPodPrescaler()
4336 SET_BIT(RCC->CR, RCC_CR_PLL2ON); in LL_RCC_PLL2_Enable()
4346 CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON); in LL_RCC_PLL2_Disable()
4356 return ((READ_BIT(RCC->CR, RCC_CR_PLL2RDY) == RCC_CR_PLL2RDY) ? 1UL : 0UL); in LL_RCC_PLL2_IsReady()
4379 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC | RCC_PLL2CFGR_PLL2M, Source | \ in LL_RCC_PLL2_ConfigDomain_48M()
4381 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N | RCC_PLL2DIVR_PLL2Q, ((PLLN - 1UL) << \ in LL_RCC_PLL2_ConfigDomain_48M()
4406 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC | RCC_PLL2CFGR_PLL2M, Source | \ in LL_RCC_PLL2_ConfigDomain_SAI()
4408 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N | RCC_PLL2DIVR_PLL2P, ((PLLN - 1UL) << \ in LL_RCC_PLL2_ConfigDomain_SAI()
4433 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC | RCC_PLL2CFGR_PLL2M, Source | \ in LL_RCC_PLL2_ConfigDomain_ADC()
4435 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N | RCC_PLL2DIVR_PLL2R, ((PLLN - 1UL) << \ in LL_RCC_PLL2_ConfigDomain_ADC()
4452 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC, PLL2Source); in LL_RCC_PLL2_SetSource()
4466 return (uint32_t)(READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2SRC)); in LL_RCC_PLL2_GetSource()
4476 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N, (PLL2N - 1UL) << RCC_PLL2DIVR_PLL2N_Pos); in LL_RCC_PLL2_SetN()
4486 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N) >> RCC_PLL2DIVR_PLL2N_Pos) + 1UL); in LL_RCC_PLL2_GetN()
4498 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2P, (PLL2P - 1UL) << RCC_PLL2DIVR_PLL2P_Pos); in LL_RCC_PLL2_SetP()
4509 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2P) >> RCC_PLL2DIVR_PLL2P_Pos) + 1UL); in LL_RCC_PLL2_GetP()
4521 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q, (PLL2Q - 1UL) << RCC_PLL2DIVR_PLL2Q_Pos); in LL_RCC_PLL2_SetQ()
4532 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + 1UL); in LL_RCC_PLL2_GetQ()
4543 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2R, (PLL2R - 1UL) << RCC_PLL2DIVR_PLL2R_Pos); in LL_RCC_PLL2_SetR()
4554 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + 1UL); in LL_RCC_PLL2_GetR()
4564 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2M, (PLL2M - 1UL) << RCC_PLL2CFGR_PLL2M_Pos); in LL_RCC_PLL2_SetDivider()
4574 return (uint32_t)((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2M) >> RCC_PLL2CFGR_PLL2M_Pos) + 1UL); in LL_RCC_PLL2_GetDivider()
4584 SET_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2PEN); in LL_RCC_PLL2_EnableDomain_SAI()
4596 CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2PEN); in LL_RCC_PLL2_DisableDomain_SAI()
4606 return ((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2PEN) == (RCC_PLL2CFGR_PLL2PEN)) ? 1UL : 0UL); in LL_RCC_PLL2_IsEnabledDomain_SAI()
4616 SET_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2QEN); in LL_RCC_PLL2_EnableDomain_48M()
4628 CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2QEN); in LL_RCC_PLL2_DisableDomain_48M()
4638 return ((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2QEN) == (RCC_PLL2CFGR_PLL2QEN)) ? 1UL : 0UL); in LL_RCC_PLL2_IsEnabledDomain_48M()
4648 SET_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN); in LL_RCC_PLL2_EnableDomain_ADC()
4660 CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN); in LL_RCC_PLL2_DisableDomain_ADC()
4670 return ((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN) == (RCC_PLL2CFGR_PLL2REN)) ? 1UL : 0UL); in LL_RCC_PLL2_IsEnabledDomain_ADC()
4680 SET_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2FRACEN); in LL_RCC_PLL2FRACN_Enable()
4690 …return ((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2FRACEN) == RCC_PLL2CFGR_PLL2FRACEN) ? 1UL : 0UL); in LL_RCC_PLL2FRACN_IsEnabled()
4700 CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2FRACEN); in LL_RCC_PLL2FRACN_Disable()
4710 MODIFY_REG(RCC->PLL2FRACR, RCC_PLL2FRACR_PLL2FRACN, FRACN << RCC_PLL2FRACR_PLL2FRACN_Pos); in LL_RCC_PLL2_SetFRACN()
4720 …return (uint32_t)(READ_BIT(RCC->PLL2FRACR, RCC_PLL2FRACR_PLL2FRACN) >> RCC_PLL2FRACR_PLL2FRACN_Po… in LL_RCC_PLL2_GetFRACN()
4734 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2RGE, InputRange); in LL_RCC_PLL2_SetVCOInputRange()
4752 SET_BIT(RCC->CR, RCC_CR_PLL3ON); in LL_RCC_PLL3_Enable()
4762 CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON); in LL_RCC_PLL3_Disable()
4772 return ((READ_BIT(RCC->CR, RCC_CR_PLL3RDY) == RCC_CR_PLL3RDY) ? 1UL : 0UL); in LL_RCC_PLL3_IsReady()
4795 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \ in LL_RCC_PLL3_ConfigDomain_SAI()
4797 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3N | RCC_PLL3DIVR_PLL3P, ((PLLN - 1UL) << \ in LL_RCC_PLL3_ConfigDomain_SAI()
4823 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \ in LL_RCC_PLL3_ConfigDomain_48M()
4825 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3N | RCC_PLL3DIVR_PLL3Q, ((PLLN - 1UL) << \ in LL_RCC_PLL3_ConfigDomain_48M()
4853 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \ in LL_RCC_PLL3_ConfigDomain_HSPI_LTDC()
4855 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3N | RCC_PLL3DIVR_PLL3R, ((PLLN - 1UL) << \ in LL_RCC_PLL3_ConfigDomain_HSPI_LTDC()
4874 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC, PLLSource); in LL_RCC_PLL3_SetSource()
4888 return (uint32_t)(READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC)); in LL_RCC_PLL3_GetSource()
4898 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3N, (PLL3N - 1UL) << RCC_PLL3DIVR_PLL3N_Pos); in LL_RCC_PLL3_SetN()
4908 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3N) >> RCC_PLL3DIVR_PLL3N_Pos) + 1UL); in LL_RCC_PLL3_GetN()
4920 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3P, (PLL3P - 1UL) << RCC_PLL3DIVR_PLL3P_Pos); in LL_RCC_PLL3_SetP()
4931 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3P) >> RCC_PLL3DIVR_PLL3P_Pos) + 1UL); in LL_RCC_PLL3_GetP()
4943 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3Q, (PLL3Q - 1UL) << RCC_PLL3DIVR_PLL3Q_Pos); in LL_RCC_PLL3_SetQ()
4954 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3Q) >> RCC_PLL3DIVR_PLL3Q_Pos) + 1UL); in LL_RCC_PLL3_GetQ()
4965 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3R, (PLL3R - 1UL) << RCC_PLL3DIVR_PLL3R_Pos); in LL_RCC_PLL3_SetR()
4976 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3R) >> RCC_PLL3DIVR_PLL3R_Pos) + 1UL); in LL_RCC_PLL3_GetR()
4986 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3M, (PLL3M - 1UL) << RCC_PLL3CFGR_PLL3M_Pos); in LL_RCC_PLL3_SetDivider()
4996 return (uint32_t)((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3M) >> RCC_PLL3CFGR_PLL3M_Pos) + 1UL); in LL_RCC_PLL3_GetDivider()
5006 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3_EnableDomain_SAI()
5018 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3_DisableDomain_SAI()
5028 return ((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN) == (RCC_PLL3CFGR_PLL3PEN)) ? 1UL : 0UL); in LL_RCC_PLL3_IsEnabledDomain_SAI()
5038 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3QEN); in LL_RCC_PLL3_EnableDomain_48M()
5050 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3QEN); in LL_RCC_PLL3_DisableDomain_48M()
5060 return ((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3QEN) == (RCC_PLL3CFGR_PLL3QEN)) ? 1UL : 0UL); in LL_RCC_PLL3_IsEnabledDomain_48M()
5072 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3REN); in LL_RCC_PLL3_EnableDomain_HSPI_LTDC()
5084 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3REN); in LL_RCC_PLL3_DisableDomain_HSPI_LTDC()
5094 return ((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3REN) == (RCC_PLL3CFGR_PLL3REN)) ? 1UL : 0UL); in LL_RCC_PLL3_IsEnabledDomain_HSPI_LTDC()
5107 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3FRACEN); in LL_RCC_PLL3FRACN_Enable()
5117 …return ((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3FRACEN) == RCC_PLL3CFGR_PLL3FRACEN) ? 1UL : 0UL); in LL_RCC_PLL3FRACN_IsEnabled()
5127 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3FRACEN); in LL_RCC_PLL3FRACN_Disable()
5137 MODIFY_REG(RCC->PLL3FRACR, RCC_PLL3FRACR_PLL3FRACN, FRACN << RCC_PLL3FRACR_PLL3FRACN_Pos); in LL_RCC_PLL3_SetFRACN()
5147 …return (uint32_t)(READ_BIT(RCC->PLL3FRACR, RCC_PLL3FRACR_PLL3FRACN) >> RCC_PLL3FRACR_PLL3FRACN_Po… in LL_RCC_PLL3_GetFRACN()
5161 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3RGE, InputRange); in LL_RCC_PLL3_SetVCOInputRange()
5180 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_EnableSecPrivilegedMode()
5190 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_DisableSecPrivilegedMode()
5202 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV) == RCC_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledSecPrivilegedMode()
5212 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_EnableNSecPrivilegedMode()
5222 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_DisableNSecPrivilegedMode()
5232 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV) == RCC_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledNSecPrivilegedMode()
5248 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_EnablePrivilegedMode()
5250 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_EnablePrivilegedMode()
5265 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_DisablePrivilegedMode()
5267 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_DisablePrivilegedMode()
5282 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV) == RCC_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledPrivilegedMode()
5284 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV) == RCC_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledPrivilegedMode()
5303 SET_BIT(RCC->CICR, RCC_CICR_LSIRDYC); in LL_RCC_ClearFlag_LSIRDY()
5313 SET_BIT(RCC->CICR, RCC_CICR_LSERDYC); in LL_RCC_ClearFlag_LSERDY()
5323 SET_BIT(RCC->CICR, RCC_CICR_MSISRDYC); in LL_RCC_ClearFlag_MSIRDY()
5333 SET_BIT(RCC->CICR, RCC_CICR_HSIRDYC); in LL_RCC_ClearFlag_HSIRDY()
5343 SET_BIT(RCC->CICR, RCC_CICR_HSERDYC); in LL_RCC_ClearFlag_HSERDY()
5354 SET_BIT(RCC->CICR, RCC_CICR_HSI48RDYC); in LL_RCC_ClearFlag_HSI48RDY()
5364 SET_BIT(RCC->CICR, RCC_CICR_PLL1RDYC); in LL_RCC_ClearFlag_PLL1RDY()
5374 SET_BIT(RCC->CICR, RCC_CICR_PLL2RDYC); in LL_RCC_ClearFlag_PLL2RDY()
5384 SET_BIT(RCC->CICR, RCC_CICR_PLL3RDYC); in LL_RCC_ClearFlag_PLL3RDY()
5394 SET_BIT(RCC->CICR, RCC_CICR_CSSC); in LL_RCC_ClearFlag_HSECSS()
5404 SET_BIT(RCC->CICR, RCC_CICR_MSIKRDYC); in LL_RCC_ClearFlag_MSIKRDY()
5415 SET_BIT(RCC->CICR, RCC_CICR_SHSIRDYC); in LL_RCC_ClearFlag_SHSIRDY()
5427 return ((READ_BIT(RCC->CIFR, RCC_CIFR_LSIRDYF) == RCC_CIFR_LSIRDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_LSIRDY()
5437 return ((READ_BIT(RCC->CIFR, RCC_CIFR_LSERDYF) == RCC_CIFR_LSERDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_LSERDY()
5447 return ((READ_BIT(RCC->CIFR, RCC_CIFR_MSISRDYF) == RCC_CIFR_MSISRDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_MSIRDY()
5457 return ((READ_BIT(RCC->CIFR, RCC_CIFR_HSIRDYF) == RCC_CIFR_HSIRDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_HSIRDY()
5467 return ((READ_BIT(RCC->CIFR, RCC_CIFR_HSERDYF) == RCC_CIFR_HSERDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_HSERDY()
5477 return ((READ_BIT(RCC->CIFR, RCC_CIFR_HSI48RDYF) == RCC_CIFR_HSI48RDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_HSI48RDY()
5486 return ((READ_BIT(RCC->CIFR, RCC_CIFR_PLL1RDYF) == RCC_CIFR_PLL1RDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_PLL1RDY()
5496 return ((READ_BIT(RCC->CIFR, RCC_CIFR_PLL2RDYF) == RCC_CIFR_PLL2RDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_PLL2RDY()
5506 return ((READ_BIT(RCC->CIFR, RCC_CIFR_PLL3RDYF) == RCC_CIFR_PLL3RDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_PLL3RDY()
5516 return ((READ_BIT(RCC->CIFR, RCC_CIFR_CSSF) == RCC_CIFR_CSSF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_HSECSS()
5526 return ((READ_BIT(RCC->CIFR, RCC_CIFR_MSIKRDYF) == RCC_CIFR_MSIKRDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_MSIKRDY()
5537 return ((READ_BIT(RCC->CIFR, RCC_CIFR_SHSIRDYF) == RCC_CIFR_SHSIRDYF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_SHSIRDY()
5548 return ((READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == RCC_CSR_IWDGRSTF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_IWDGRST()
5558 return ((READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == RCC_CSR_LPWRRSTF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_LPWRRST()
5568 return ((READ_BIT(RCC->CSR, RCC_CSR_OBLRSTF) == RCC_CSR_OBLRSTF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_OBLRST()
5578 return ((READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == RCC_CSR_PINRSTF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_PINRST()
5588 return ((READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == RCC_CSR_SFTRSTF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_SFTRST()
5598 return ((READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == RCC_CSR_WWDGRSTF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_WWDGRST()
5608 return ((READ_BIT(RCC->CSR, RCC_CSR_BORRSTF) == RCC_CSR_BORRSTF) ? 1UL : 0UL); in LL_RCC_IsActiveFlag_BORRST()
5618 SET_BIT(RCC->CSR, RCC_CSR_RMVF); in LL_RCC_ClearResetFlags()
5636 SET_BIT(RCC->CIER, RCC_CIER_LSIRDYIE); in LL_RCC_EnableIT_LSIRDY()
5646 SET_BIT(RCC->CIER, RCC_CIER_LSERDYIE); in LL_RCC_EnableIT_LSERDY()
5656 SET_BIT(RCC->CIER, RCC_CIER_MSISRDYIE); in LL_RCC_EnableIT_MSIRDY()
5666 SET_BIT(RCC->CIER, RCC_CIER_HSIRDYIE); in LL_RCC_EnableIT_HSIRDY()
5676 SET_BIT(RCC->CIER, RCC_CIER_HSERDYIE); in LL_RCC_EnableIT_HSERDY()
5686 SET_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE); in LL_RCC_EnableIT_HSI48RDY()
5696 SET_BIT(RCC->CIER, RCC_CIER_PLL1RDYIE); in LL_RCC_EnableIT_PLL1RDY()
5706 SET_BIT(RCC->CIER, RCC_CIER_PLL2RDYIE); in LL_RCC_EnableIT_PLL2RDY()
5716 SET_BIT(RCC->CIER, RCC_CIER_PLL3RDYIE); in LL_RCC_EnableIT_PLL3RDY()
5726 SET_BIT(RCC->CIER, RCC_CIER_MSIKRDYIE); in LL_RCC_EnableIT_MSIKRDY()
5737 SET_BIT(RCC->CIER, RCC_CIER_SHSIRDYIE); in LL_RCC_EnableIT_SHSIRDY()
5748 CLEAR_BIT(RCC->CIER, RCC_CIER_LSIRDYIE); in LL_RCC_DisableIT_LSIRDY()
5758 CLEAR_BIT(RCC->CIER, RCC_CIER_LSERDYIE); in LL_RCC_DisableIT_LSERDY()
5768 CLEAR_BIT(RCC->CIER, RCC_CIER_MSISRDYIE); in LL_RCC_DisableIT_MSIRDY()
5778 CLEAR_BIT(RCC->CIER, RCC_CIER_HSIRDYIE); in LL_RCC_DisableIT_HSIRDY()
5788 CLEAR_BIT(RCC->CIER, RCC_CIER_HSERDYIE); in LL_RCC_DisableIT_HSERDY()
5798 CLEAR_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE); in LL_RCC_DisableIT_HSI48RDY()
5808 CLEAR_BIT(RCC->CIER, RCC_CIER_PLL1RDYIE); in LL_RCC_DisableIT_PLL1RDY()
5818 CLEAR_BIT(RCC->CIER, RCC_CIER_PLL2RDYIE); in LL_RCC_DisableIT_PLL2RDY()
5828 CLEAR_BIT(RCC->CIER, RCC_CIER_PLL3RDYIE); in LL_RCC_DisableIT_PLL3RDY()
5838 CLEAR_BIT(RCC->CIER, RCC_CIER_MSIKRDYIE); in LL_RCC_DisableIT_MSIKRDY()
5849 CLEAR_BIT(RCC->CIER, RCC_CIER_SHSIRDYIE); in LL_RCC_DisableIT_SHSIRDY()
5860 return ((READ_BIT(RCC->CIER, RCC_CIER_LSIRDYIE) == RCC_CIER_LSIRDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_LSIRDY()
5870 return ((READ_BIT(RCC->CIER, RCC_CIER_LSERDYIE) == RCC_CIER_LSERDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_LSERDY()
5880 return ((READ_BIT(RCC->CIER, RCC_CIER_MSISRDYIE) == RCC_CIER_MSISRDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_MSIRDY()
5890 return ((READ_BIT(RCC->CIER, RCC_CIER_HSIRDYIE) == RCC_CIER_HSIRDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_HSIRDY()
5900 return ((READ_BIT(RCC->CIER, RCC_CIER_HSERDYIE) == RCC_CIER_HSERDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_HSERDY()
5910 return ((READ_BIT(RCC->CIER, RCC_CIER_HSI48RDYIE) == RCC_CIER_HSI48RDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_HSI48RDY()
5919 return ((READ_BIT(RCC->CIER, RCC_CIER_PLL1RDYIE) == RCC_CIER_PLL1RDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_PLL1RDY()
5929 return ((READ_BIT(RCC->CIER, RCC_CIER_PLL2RDYIE) == RCC_CIER_PLL2RDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_PLL2RDY()
5939 return ((READ_BIT(RCC->CIER, RCC_CIER_PLL3RDYIE) == RCC_CIER_PLL3RDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_PLL3RDY()
5949 return ((READ_BIT(RCC->CIER, RCC_CIER_MSIKRDYIE) == RCC_CIER_MSIKRDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_MSIKRDY()
5960 return ((READ_BIT(RCC->CIER, RCC_CIER_SHSIRDYIE) == RCC_CIER_SHSIRDYIE) ? 1UL : 0UL); in LL_RCC_IsEnabledIT_SHSIRDY()
6008 WRITE_REG(RCC->SECCFGR, SecureConfig); in LL_RCC_ConfigSecure()
6047 return (uint32_t)(READ_BIT(RCC->SECCFGR, RCC_SECURE_MASK)); in LL_RCC_GetConfigSecure()