502   SET_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Enable()
516   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Disable()
527   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)) ? 1UL : 0UL);  in LL_I2C_IsEnabled()
548 …MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_P…  in LL_I2C_ConfigFilters()
565   MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);  in LL_I2C_SetDigitalFilter()
576   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);  in LL_I2C_GetDigitalFilter()
588   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_EnableAnalogFilter()
600   SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_DisableAnalogFilter()
611   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAnalogFilter()
622   SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_EnableDMAReq_TX()
633   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_DisableDMAReq_TX()
644   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_TX()
655   SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_EnableDMAReq_RX()
666   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_DisableDMAReq_RX()
677   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_RX()
717   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_EnableClockStretching()
729   SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_DisableClockStretching()
740   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)) ? 1UL : 0UL);  in LL_I2C_IsEnabledClockStretching()
751   SET_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_EnableSlaveByteControl()
762   CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_DisableSlaveByteControl()
773   return ((READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSlaveByteControl()
787   SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_EnableWakeUpFromStop()
800   CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_DisableWakeUpFromStop()
813   return ((READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledWakeUpFromStop()
825   SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_EnableGeneralCall()
837   CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_DisableGeneralCall()
848   return ((READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledGeneralCall()
860   SET_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_EnableFastModePlus()
872   CLEAR_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_DisableFastModePlus()
883   return ((READ_BIT(I2Cx->CR1, I2C_CR1_FMP) == (I2C_CR1_FMP)) ? 1UL : 0UL);  in LL_I2C_IsEnabledFastModePlus()
894   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_EnableAutoClearFlag_ADDR()
905   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_DisableAutoClearFlag_ADDR()
916   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR) == (I2C_CR1_ADDRACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_ADDR()
927   SET_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_EnableAutoClearFlag_STOP()
938   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_DisableAutoClearFlag_STOP()
949   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR) == (I2C_CR1_STOPFACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_STOP()
1170   MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);  in LL_I2C_SetMode()
1188   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN));  in LL_I2C_GetMode()
1206   SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_EnableSMBusAlert()
1224   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_DisableSMBusAlert()
1237   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusAlert()
1250   SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_EnableSMBusPEC()
1263   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_DisableSMBusPEC()
1276   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusPEC()
1461   SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_EnableIT_TX()
1472   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_DisableIT_TX()
1483   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TX()
1494   SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_EnableIT_RX()
1505   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_DisableIT_RX()
1516   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_RX()
1527   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_EnableIT_ADDR()
1538   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_DisableIT_ADDR()
1549   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ADDR()
1560   SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_EnableIT_NACK()
1571   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_DisableIT_NACK()
1582   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_NACK()
1593   SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_EnableIT_STOP()
1604   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_DisableIT_STOP()
1615   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_STOP()
1629   SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_EnableIT_TC()
1643   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_DisableIT_TC()
1654   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TC()
1674   SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_EnableIT_ERR()
1694   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_DisableIT_ERR()
1705   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ERR()