352       if ((hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START) == DMA2D_BGPFCCR_START)  in HAL_DMA2D_DeInit()
381   hdma2d->Instance->BGPFCCR  =    0U;  in HAL_DMA2D_DeInit()
1024     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_EnableCLUT()
1067     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTStartLoad()
1071     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTStartLoad()
1122     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTStartLoad_IT()
1129     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTStartLoad_IT()
1185     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTLoad()
1189     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTLoad()
1242     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_CLUTLoad_IT()
1249     SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);  in HAL_DMA2D_CLUTLoad_IT()
1283 …const __IO uint32_t *reg =  &(hdma2d->Instance->BGPFCCR);  /* by default, point at background regi…  in HAL_DMA2D_CLUTLoading_Abort()
1341 …const __IO uint32_t *reg =  &(hdma2d->Instance->BGPFCCR);  /* by default, point at background regi…  in HAL_DMA2D_CLUTLoading_Suspend()
1410       if ((hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START) == DMA2D_BGPFCCR_START)  in HAL_DMA2D_CLUTLoading_Resume()
1502   layer_start |= hdma2d->Instance->BGPFCCR & DMA2D_BGPFCCR_START;  in HAL_DMA2D_PollForTransfer()
1849     MODIFY_REG(hdma2d->Instance->BGPFCCR, regMask, regValue);  in HAL_DMA2D_ConfigLayer()
1922     MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),  in HAL_DMA2D_ConfigCLUT()