423   SET_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Enable()
437   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);  in LL_I2C_Disable()
448   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)) ? 1UL : 0UL);  in LL_I2C_IsEnabled()
469 …MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_P…  in LL_I2C_ConfigFilters()
486   MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);  in LL_I2C_SetDigitalFilter()
497   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);  in LL_I2C_GetDigitalFilter()
509   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_EnableAnalogFilter()
521   SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);  in LL_I2C_DisableAnalogFilter()
532   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAnalogFilter()
543   SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_EnableDMAReq_TX()
554   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);  in LL_I2C_DisableDMAReq_TX()
565   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_TX()
576   SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_EnableDMAReq_RX()
587   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);  in LL_I2C_DisableDMAReq_RX()
598   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledDMAReq_RX()
638   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_EnableClockStretching()
650   SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);  in LL_I2C_DisableClockStretching()
661   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)) ? 1UL : 0UL);  in LL_I2C_IsEnabledClockStretching()
672   SET_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_EnableSlaveByteControl()
683   CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);  in LL_I2C_DisableSlaveByteControl()
694   return ((READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSlaveByteControl()
708   SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_EnableWakeUpFromStop()
721   CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);  in LL_I2C_DisableWakeUpFromStop()
734   return ((READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledWakeUpFromStop()
746   SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_EnableGeneralCall()
758   CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);  in LL_I2C_DisableGeneralCall()
769   return ((READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledGeneralCall()
781   SET_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_EnableFastModePlus()
793   CLEAR_BIT(I2Cx->CR1, I2C_CR1_FMP);  in LL_I2C_DisableFastModePlus()
804   return ((READ_BIT(I2Cx->CR1, I2C_CR1_FMP) == (I2C_CR1_FMP)) ? 1UL : 0UL);  in LL_I2C_IsEnabledFastModePlus()
815   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_EnableAutoClearFlag_ADDR()
826   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR);  in LL_I2C_DisableAutoClearFlag_ADDR()
837   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRACLR) == (I2C_CR1_ADDRACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_ADDR()
848   SET_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_EnableAutoClearFlag_STOP()
859   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR);  in LL_I2C_DisableAutoClearFlag_STOP()
870   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPFACLR) == (I2C_CR1_STOPFACLR)) ? 1UL : 0UL);  in LL_I2C_IsEnabledAutoClearFlag_STOP()
1091   MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);  in LL_I2C_SetMode()
1109   return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN));  in LL_I2C_GetMode()
1127   SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_EnableSMBusAlert()
1145   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);  in LL_I2C_DisableSMBusAlert()
1158   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusAlert()
1171   SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_EnableSMBusPEC()
1184   CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);  in LL_I2C_DisableSMBusPEC()
1197   return ((READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)) ? 1UL : 0UL);  in LL_I2C_IsEnabledSMBusPEC()
1382   SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_EnableIT_TX()
1393   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);  in LL_I2C_DisableIT_TX()
1404   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TX()
1415   SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_EnableIT_RX()
1426   CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);  in LL_I2C_DisableIT_RX()
1437   return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_RX()
1448   SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_EnableIT_ADDR()
1459   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);  in LL_I2C_DisableIT_ADDR()
1470   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ADDR()
1481   SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_EnableIT_NACK()
1492   CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);  in LL_I2C_DisableIT_NACK()
1503   return ((READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_NACK()
1514   SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_EnableIT_STOP()
1525   CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);  in LL_I2C_DisableIT_STOP()
1536   return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_STOP()
1550   SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_EnableIT_TC()
1564   CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);  in LL_I2C_DisableIT_TC()
1575   return ((READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_TC()
1595   SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_EnableIT_ERR()
1615   CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);  in LL_I2C_DisableIT_ERR()
1626   return ((READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)) ? 1UL : 0UL);  in LL_I2C_IsEnabledIT_ERR()