4191 …                                                 const HRTIM_FaultBlankingCfgTypeDef *pFaultBlkCfg)  in HAL_HRTIM_FaultBlankingConfigAndEnable()  argument
4195   assert_param(IS_HRTIM_FAULTBLANKNGMODE(pFaultBlkCfg->BlankingSource));  in HAL_HRTIM_FaultBlankingConfigAndEnable()
4213                  ((pFaultBlkCfg->BlankingSource << HRTIM_FLTINR3_FLT1BLKS_Pos) |  in HAL_HRTIM_FaultBlankingConfigAndEnable()
4221                  ((pFaultBlkCfg->BlankingSource << HRTIM_FLTINR3_FLT2BLKS_Pos) |  in HAL_HRTIM_FaultBlankingConfigAndEnable()
4229                  ((pFaultBlkCfg->BlankingSource << HRTIM_FLTINR3_FLT3BLKS_Pos) |  in HAL_HRTIM_FaultBlankingConfigAndEnable()
4237                  ((pFaultBlkCfg->BlankingSource << HRTIM_FLTINR3_FLT4BLKS_Pos) |  in HAL_HRTIM_FaultBlankingConfigAndEnable()
4245                  ((pFaultBlkCfg->BlankingSource << HRTIM_FLTINR4_FLT5BLKS_Pos) |  in HAL_HRTIM_FaultBlankingConfigAndEnable()
4253                  ((pFaultBlkCfg->BlankingSource << HRTIM_FLTINR4_FLT6BLKS_Pos) |  in HAL_HRTIM_FaultBlankingConfigAndEnable()
4302                                                const HRTIM_FaultBlankingCfgTypeDef *pFaultBlkCfg)  in HAL_HRTIM_FaultCounterConfig()  argument
4306   assert_param(IS_HRTIM_FAULTCOUNTER(pFaultBlkCfg->Threshold));  in HAL_HRTIM_FaultCounterConfig()
4307   assert_param(IS_HRTIM_FAULTCOUNTERRST(pFaultBlkCfg->ResetMode));  in HAL_HRTIM_FaultCounterConfig()
4325                  (pFaultBlkCfg->Threshold << HRTIM_FLTINR3_FLT1CNT_Pos) |  in HAL_HRTIM_FaultCounterConfig()
4326                  (pFaultBlkCfg->ResetMode << HRTIM_FLTINR3_FLT1RSTM_Pos));  in HAL_HRTIM_FaultCounterConfig()
4333                  (pFaultBlkCfg->Threshold << HRTIM_FLTINR3_FLT2CNT_Pos) |  in HAL_HRTIM_FaultCounterConfig()
4334                  (pFaultBlkCfg->ResetMode << HRTIM_FLTINR3_FLT2RSTM_Pos));  in HAL_HRTIM_FaultCounterConfig()
4341                  (pFaultBlkCfg->Threshold << HRTIM_FLTINR3_FLT3CNT_Pos) |  in HAL_HRTIM_FaultCounterConfig()
4342                  (pFaultBlkCfg->ResetMode << HRTIM_FLTINR3_FLT3RSTM_Pos));  in HAL_HRTIM_FaultCounterConfig()
4349                  (pFaultBlkCfg->Threshold << HRTIM_FLTINR3_FLT4CNT_Pos) |  in HAL_HRTIM_FaultCounterConfig()
4350                  (pFaultBlkCfg->ResetMode << HRTIM_FLTINR3_FLT4RSTM_Pos));  in HAL_HRTIM_FaultCounterConfig()
4357                  (pFaultBlkCfg->Threshold << HRTIM_FLTINR4_FLT5CNT_Pos) |  in HAL_HRTIM_FaultCounterConfig()
4358                  (pFaultBlkCfg->ResetMode << HRTIM_FLTINR4_FLT5RSTM_Pos));  in HAL_HRTIM_FaultCounterConfig()
4365                  (pFaultBlkCfg->Threshold << HRTIM_FLTINR4_FLT6CNT_Pos) |  in HAL_HRTIM_FaultCounterConfig()
4366                  (pFaultBlkCfg->ResetMode << HRTIM_FLTINR4_FLT6RSTM_Pos));  in HAL_HRTIM_FaultCounterConfig()