Lines Matching refs:Bank
807 … const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
809 … const FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank,
812 FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
820 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank);
821 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank);
837 … const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
839 … const FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
840 HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank);
848 HAL_StatusTypeDef FSMC_NAND_ECC_Enable(FSMC_NAND_TypeDef *Device, uint32_t Bank);
849 HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank);
850 …L_StatusTypeDef FSMC_NAND_GetECC(const FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank,