Lines Matching refs:Init
220 FSMC_NORSRAM_InitTypeDef *Init) in FSMC_NORSRAM_Init() argument
228 assert_param(IS_FSMC_NORSRAM_BANK(Init->NSBank)); in FSMC_NORSRAM_Init()
229 assert_param(IS_FSMC_MUX(Init->DataAddressMux)); in FSMC_NORSRAM_Init()
230 assert_param(IS_FSMC_MEMORY(Init->MemoryType)); in FSMC_NORSRAM_Init()
231 assert_param(IS_FSMC_NORSRAM_MEMORY_WIDTH(Init->MemoryDataWidth)); in FSMC_NORSRAM_Init()
232 assert_param(IS_FSMC_BURSTMODE(Init->BurstAccessMode)); in FSMC_NORSRAM_Init()
233 assert_param(IS_FSMC_WAIT_POLARITY(Init->WaitSignalPolarity)); in FSMC_NORSRAM_Init()
235 assert_param(IS_FSMC_WRAP_MODE(Init->WrapMode)); in FSMC_NORSRAM_Init()
237 assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(Init->WaitSignalActive)); in FSMC_NORSRAM_Init()
238 assert_param(IS_FSMC_WRITE_OPERATION(Init->WriteOperation)); in FSMC_NORSRAM_Init()
239 assert_param(IS_FSMC_WAITE_SIGNAL(Init->WaitSignal)); in FSMC_NORSRAM_Init()
240 assert_param(IS_FSMC_EXTENDED_MODE(Init->ExtendedMode)); in FSMC_NORSRAM_Init()
241 assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait)); in FSMC_NORSRAM_Init()
242 assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst)); in FSMC_NORSRAM_Init()
244 assert_param(IS_FSMC_CONTINOUS_CLOCK(Init->ContinuousClock)); in FSMC_NORSRAM_Init()
247 assert_param(IS_FSMC_WRITE_FIFO(Init->WriteFifo)); in FSMC_NORSRAM_Init()
249 assert_param(IS_FSMC_PAGESIZE(Init->PageSize)); in FSMC_NORSRAM_Init()
252 __FSMC_NORSRAM_DISABLE(Device, Init->NSBank); in FSMC_NORSRAM_Init()
255 if (Init->MemoryType == FSMC_MEMORY_TYPE_NOR) in FSMC_NORSRAM_Init()
265 Init->DataAddressMux | \ in FSMC_NORSRAM_Init()
266 Init->MemoryType | \ in FSMC_NORSRAM_Init()
267 Init->MemoryDataWidth | \ in FSMC_NORSRAM_Init()
268 Init->BurstAccessMode | \ in FSMC_NORSRAM_Init()
269 Init->WaitSignalPolarity | \ in FSMC_NORSRAM_Init()
270 Init->WaitSignalActive | \ in FSMC_NORSRAM_Init()
271 Init->WriteOperation | \ in FSMC_NORSRAM_Init()
272 Init->WaitSignal | \ in FSMC_NORSRAM_Init()
273 Init->ExtendedMode | \ in FSMC_NORSRAM_Init()
274 Init->AsynchronousWait | \ in FSMC_NORSRAM_Init()
275 Init->WriteBurst); in FSMC_NORSRAM_Init()
278 btcr_reg |= Init->WrapMode; in FSMC_NORSRAM_Init()
281 btcr_reg |= Init->ContinuousClock; in FSMC_NORSRAM_Init()
284 btcr_reg |= Init->WriteFifo; in FSMC_NORSRAM_Init()
286 btcr_reg |= Init->PageSize; in FSMC_NORSRAM_Init()
313 MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); in FSMC_NORSRAM_Init()
317 …if ((Init->ContinuousClock == FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC) && (Init->NSBank != FSMC_NORSRAM_B… in FSMC_NORSRAM_Init()
319 MODIFY_REG(Device->BTCR[FSMC_NORSRAM_BANK1], FSMC_BCR1_CCLKEN, Init->ContinuousClock); in FSMC_NORSRAM_Init()
324 if (Init->NSBank != FSMC_NORSRAM_BANK1) in FSMC_NORSRAM_Init()
327 SET_BIT(Device->BTCR[FSMC_NORSRAM_BANK1], (uint32_t)(Init->WriteFifo)); in FSMC_NORSRAM_Init()
578 HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init) in FSMC_NAND_Init() argument
582 assert_param(IS_FSMC_NAND_BANK(Init->NandBank)); in FSMC_NAND_Init()
583 assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature)); in FSMC_NAND_Init()
584 assert_param(IS_FSMC_NAND_MEMORY_WIDTH(Init->MemoryDataWidth)); in FSMC_NAND_Init()
585 assert_param(IS_FSMC_ECC_STATE(Init->EccComputation)); in FSMC_NAND_Init()
586 assert_param(IS_FSMC_ECCPAGE_SIZE(Init->ECCPageSize)); in FSMC_NAND_Init()
587 assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime)); in FSMC_NAND_Init()
588 assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime)); in FSMC_NAND_Init()
591 if (Init->NandBank == FSMC_NAND_BANK2) in FSMC_NAND_Init()
594 … MODIFY_REG(Device->PCR2, PCR_CLEAR_MASK, (Init->Waitfeature | in FSMC_NAND_Init()
596 … Init->MemoryDataWidth | in FSMC_NAND_Init()
597 … Init->EccComputation | in FSMC_NAND_Init()
598 … Init->ECCPageSize | in FSMC_NAND_Init()
599 ((Init->TCLRSetupTime) << FSMC_PCR2_TCLR_Pos) | in FSMC_NAND_Init()
600 ((Init->TARSetupTime) << FSMC_PCR2_TAR_Pos))); in FSMC_NAND_Init()
605 … MODIFY_REG(Device->PCR3, PCR_CLEAR_MASK, (Init->Waitfeature | in FSMC_NAND_Init()
607 … Init->MemoryDataWidth | in FSMC_NAND_Init()
608 … Init->EccComputation | in FSMC_NAND_Init()
609 … Init->ECCPageSize | in FSMC_NAND_Init()
610 ((Init->TCLRSetupTime) << FSMC_PCR2_TCLR_Pos) | in FSMC_NAND_Init()
611 ((Init->TARSetupTime) << FSMC_PCR2_TAR_Pos))); in FSMC_NAND_Init()
906 HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init) in FSMC_PCCARD_Init() argument
911 assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature)); in FSMC_PCCARD_Init()
912 assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime)); in FSMC_PCCARD_Init()
913 assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime)); in FSMC_PCCARD_Init()
924 Init->Waitfeature | in FSMC_PCCARD_Init()
926 (Init->TCLRSetupTime << FSMC_PCR4_TCLR_Pos) | in FSMC_PCCARD_Init()
927 (Init->TARSetupTime << FSMC_PCR4_TAR_Pos))); in FSMC_PCCARD_Init()