Lines Matching refs:u
130 #define S32_NVIC_ICTR_ICTR_SHIFT 0u
135 #define S32_NVIC_ISER_SETENA_SHIFT 0u
140 #define S32_NVIC_ICER_CLRENA_SHIFT 0u
145 #define S32_NVIC_ISPR_SETPEND_SHIFT 0u
150 #define S32_NVIC_ICPR_CLRPEND_SHIFT 0u
155 #define S32_NVIC_IABR_ACTIVE_SHIFT 0u
160 #define S32_NVIC_IP_PRI0_SHIFT 0u
164 #define S32_NVIC_IP_PRI1_SHIFT 0u
168 #define S32_NVIC_IP_PRI2_SHIFT 0u
172 #define S32_NVIC_IP_PRI3_SHIFT 0u
176 #define S32_NVIC_IP_PRI4_SHIFT 0u
180 #define S32_NVIC_IP_PRI5_SHIFT 0u
184 #define S32_NVIC_IP_PRI6_SHIFT 0u
188 #define S32_NVIC_IP_PRI7_SHIFT 0u
192 #define S32_NVIC_IP_PRI8_SHIFT 0u
196 #define S32_NVIC_IP_PRI9_SHIFT 0u
200 #define S32_NVIC_IP_PRI10_SHIFT 0u
204 #define S32_NVIC_IP_PRI11_SHIFT 0u
208 #define S32_NVIC_IP_PRI12_SHIFT 0u
212 #define S32_NVIC_IP_PRI13_SHIFT 0u
216 #define S32_NVIC_IP_PRI14_SHIFT 0u
220 #define S32_NVIC_IP_PRI15_SHIFT 0u
224 #define S32_NVIC_IP_PRI16_SHIFT 0u
228 #define S32_NVIC_IP_PRI17_SHIFT 0u
232 #define S32_NVIC_IP_PRI18_SHIFT 0u
236 #define S32_NVIC_IP_PRI19_SHIFT 0u
240 #define S32_NVIC_IP_PRI20_SHIFT 0u
244 #define S32_NVIC_IP_PRI21_SHIFT 0u
248 #define S32_NVIC_IP_PRI22_SHIFT 0u
252 #define S32_NVIC_IP_PRI23_SHIFT 0u
256 #define S32_NVIC_IP_PRI24_SHIFT 0u
260 #define S32_NVIC_IP_PRI25_SHIFT 0u
264 #define S32_NVIC_IP_PRI26_SHIFT 0u
268 #define S32_NVIC_IP_PRI27_SHIFT 0u
272 #define S32_NVIC_IP_PRI28_SHIFT 0u
276 #define S32_NVIC_IP_PRI29_SHIFT 0u
280 #define S32_NVIC_IP_PRI30_SHIFT 0u
284 #define S32_NVIC_IP_PRI31_SHIFT 0u
288 #define S32_NVIC_IP_PRI32_SHIFT 0u
292 #define S32_NVIC_IP_PRI33_SHIFT 0u
296 #define S32_NVIC_IP_PRI34_SHIFT 0u
300 #define S32_NVIC_IP_PRI35_SHIFT 0u
304 #define S32_NVIC_IP_PRI36_SHIFT 0u
308 #define S32_NVIC_IP_PRI37_SHIFT 0u
312 #define S32_NVIC_IP_PRI38_SHIFT 0u
316 #define S32_NVIC_IP_PRI39_SHIFT 0u
320 #define S32_NVIC_IP_PRI40_SHIFT 0u
324 #define S32_NVIC_IP_PRI41_SHIFT 0u
328 #define S32_NVIC_IP_PRI42_SHIFT 0u
332 #define S32_NVIC_IP_PRI43_SHIFT 0u
336 #define S32_NVIC_IP_PRI44_SHIFT 0u
340 #define S32_NVIC_IP_PRI45_SHIFT 0u
344 #define S32_NVIC_IP_PRI46_SHIFT 0u
348 #define S32_NVIC_IP_PRI47_SHIFT 0u
352 #define S32_NVIC_IP_PRI48_SHIFT 0u
356 #define S32_NVIC_IP_PRI49_SHIFT 0u
360 #define S32_NVIC_IP_PRI50_SHIFT 0u
364 #define S32_NVIC_IP_PRI51_SHIFT 0u
368 #define S32_NVIC_IP_PRI52_SHIFT 0u
372 #define S32_NVIC_IP_PRI53_SHIFT 0u
376 #define S32_NVIC_IP_PRI54_SHIFT 0u
380 #define S32_NVIC_IP_PRI55_SHIFT 0u
384 #define S32_NVIC_IP_PRI56_SHIFT 0u
388 #define S32_NVIC_IP_PRI57_SHIFT 0u
392 #define S32_NVIC_IP_PRI58_SHIFT 0u
396 #define S32_NVIC_IP_PRI59_SHIFT 0u
400 #define S32_NVIC_IP_PRI60_SHIFT 0u
404 #define S32_NVIC_IP_PRI61_SHIFT 0u
408 #define S32_NVIC_IP_PRI62_SHIFT 0u
412 #define S32_NVIC_IP_PRI63_SHIFT 0u
416 #define S32_NVIC_IP_PRI64_SHIFT 0u
420 #define S32_NVIC_IP_PRI65_SHIFT 0u
424 #define S32_NVIC_IP_PRI66_SHIFT 0u
428 #define S32_NVIC_IP_PRI67_SHIFT 0u
432 #define S32_NVIC_IP_PRI68_SHIFT 0u
436 #define S32_NVIC_IP_PRI69_SHIFT 0u
440 #define S32_NVIC_IP_PRI70_SHIFT 0u
444 #define S32_NVIC_IP_PRI71_SHIFT 0u
448 #define S32_NVIC_IP_PRI72_SHIFT 0u
452 #define S32_NVIC_IP_PRI73_SHIFT 0u
456 #define S32_NVIC_IP_PRI74_SHIFT 0u
460 #define S32_NVIC_IP_PRI75_SHIFT 0u
464 #define S32_NVIC_IP_PRI76_SHIFT 0u
468 #define S32_NVIC_IP_PRI77_SHIFT 0u
472 #define S32_NVIC_IP_PRI78_SHIFT 0u
476 #define S32_NVIC_IP_PRI79_SHIFT 0u
480 #define S32_NVIC_IP_PRI80_SHIFT 0u
484 #define S32_NVIC_IP_PRI81_SHIFT 0u
488 #define S32_NVIC_IP_PRI82_SHIFT 0u
492 #define S32_NVIC_IP_PRI83_SHIFT 0u
496 #define S32_NVIC_IP_PRI84_SHIFT 0u
500 #define S32_NVIC_IP_PRI85_SHIFT 0u
504 #define S32_NVIC_IP_PRI86_SHIFT 0u
508 #define S32_NVIC_IP_PRI87_SHIFT 0u
512 #define S32_NVIC_IP_PRI88_SHIFT 0u
516 #define S32_NVIC_IP_PRI89_SHIFT 0u
520 #define S32_NVIC_IP_PRI90_SHIFT 0u
524 #define S32_NVIC_IP_PRI91_SHIFT 0u
528 #define S32_NVIC_IP_PRI92_SHIFT 0u
532 #define S32_NVIC_IP_PRI93_SHIFT 0u
536 #define S32_NVIC_IP_PRI94_SHIFT 0u
540 #define S32_NVIC_IP_PRI95_SHIFT 0u
544 #define S32_NVIC_IP_PRI96_SHIFT 0u
548 #define S32_NVIC_IP_PRI97_SHIFT 0u
552 #define S32_NVIC_IP_PRI98_SHIFT 0u
556 #define S32_NVIC_IP_PRI99_SHIFT 0u
560 #define S32_NVIC_IP_PRI100_SHIFT 0u
564 #define S32_NVIC_IP_PRI101_SHIFT 0u
568 #define S32_NVIC_IP_PRI102_SHIFT 0u
572 #define S32_NVIC_IP_PRI103_SHIFT 0u
576 #define S32_NVIC_IP_PRI104_SHIFT 0u
580 #define S32_NVIC_IP_PRI105_SHIFT 0u
584 #define S32_NVIC_IP_PRI106_SHIFT 0u
588 #define S32_NVIC_IP_PRI107_SHIFT 0u
592 #define S32_NVIC_IP_PRI108_SHIFT 0u
596 #define S32_NVIC_IP_PRI109_SHIFT 0u
600 #define S32_NVIC_IP_PRI110_SHIFT 0u
604 #define S32_NVIC_IP_PRI111_SHIFT 0u
608 #define S32_NVIC_IP_PRI112_SHIFT 0u
612 #define S32_NVIC_IP_PRI113_SHIFT 0u
616 #define S32_NVIC_IP_PRI114_SHIFT 0u
620 #define S32_NVIC_IP_PRI115_SHIFT 0u
624 #define S32_NVIC_IP_PRI116_SHIFT 0u
628 #define S32_NVIC_IP_PRI117_SHIFT 0u
632 #define S32_NVIC_IP_PRI118_SHIFT 0u
636 #define S32_NVIC_IP_PRI119_SHIFT 0u
640 #define S32_NVIC_IP_PRI120_SHIFT 0u
644 #define S32_NVIC_IP_PRI121_SHIFT 0u
648 #define S32_NVIC_IP_PRI122_SHIFT 0u
652 #define S32_NVIC_IP_PRI123_SHIFT 0u
656 #define S32_NVIC_IP_PRI124_SHIFT 0u
660 #define S32_NVIC_IP_PRI125_SHIFT 0u
664 #define S32_NVIC_IP_PRI126_SHIFT 0u
668 #define S32_NVIC_IP_PRI127_SHIFT 0u
672 #define S32_NVIC_IP_PRI128_SHIFT 0u
676 #define S32_NVIC_IP_PRI129_SHIFT 0u
680 #define S32_NVIC_IP_PRI130_SHIFT 0u
684 #define S32_NVIC_IP_PRI131_SHIFT 0u
688 #define S32_NVIC_IP_PRI132_SHIFT 0u
692 #define S32_NVIC_IP_PRI133_SHIFT 0u
696 #define S32_NVIC_IP_PRI134_SHIFT 0u
700 #define S32_NVIC_IP_PRI135_SHIFT 0u
704 #define S32_NVIC_IP_PRI136_SHIFT 0u
708 #define S32_NVIC_IP_PRI137_SHIFT 0u
712 #define S32_NVIC_IP_PRI138_SHIFT 0u
716 #define S32_NVIC_IP_PRI139_SHIFT 0u
720 #define S32_NVIC_IP_PRI140_SHIFT 0u
724 #define S32_NVIC_IP_PRI141_SHIFT 0u
728 #define S32_NVIC_IP_PRI142_SHIFT 0u
732 #define S32_NVIC_IP_PRI143_SHIFT 0u
736 #define S32_NVIC_IP_PRI144_SHIFT 0u
740 #define S32_NVIC_IP_PRI145_SHIFT 0u
744 #define S32_NVIC_IP_PRI146_SHIFT 0u
748 #define S32_NVIC_IP_PRI147_SHIFT 0u
752 #define S32_NVIC_IP_PRI148_SHIFT 0u
756 #define S32_NVIC_IP_PRI149_SHIFT 0u
760 #define S32_NVIC_IP_PRI150_SHIFT 0u
764 #define S32_NVIC_IP_PRI151_SHIFT 0u
768 #define S32_NVIC_IP_PRI152_SHIFT 0u
772 #define S32_NVIC_IP_PRI153_SHIFT 0u
776 #define S32_NVIC_IP_PRI154_SHIFT 0u
780 #define S32_NVIC_IP_PRI155_SHIFT 0u
784 #define S32_NVIC_IP_PRI156_SHIFT 0u
788 #define S32_NVIC_IP_PRI157_SHIFT 0u
792 #define S32_NVIC_IP_PRI158_SHIFT 0u
796 #define S32_NVIC_IP_PRI159_SHIFT 0u
800 #define S32_NVIC_IP_PRI160_SHIFT 0u
804 #define S32_NVIC_IP_PRI161_SHIFT 0u
808 #define S32_NVIC_IP_PRI162_SHIFT 0u
812 #define S32_NVIC_IP_PRI163_SHIFT 0u
816 #define S32_NVIC_IP_PRI164_SHIFT 0u
820 #define S32_NVIC_IP_PRI165_SHIFT 0u
824 #define S32_NVIC_IP_PRI166_SHIFT 0u
828 #define S32_NVIC_IP_PRI167_SHIFT 0u
832 #define S32_NVIC_IP_PRI168_SHIFT 0u
836 #define S32_NVIC_IP_PRI169_SHIFT 0u
840 #define S32_NVIC_IP_PRI170_SHIFT 0u
844 #define S32_NVIC_IP_PRI171_SHIFT 0u
848 #define S32_NVIC_IP_PRI172_SHIFT 0u
852 #define S32_NVIC_IP_PRI173_SHIFT 0u
856 #define S32_NVIC_IP_PRI174_SHIFT 0u
860 #define S32_NVIC_IP_PRI175_SHIFT 0u
864 #define S32_NVIC_IP_PRI176_SHIFT 0u
868 #define S32_NVIC_IP_PRI177_SHIFT 0u
872 #define S32_NVIC_IP_PRI178_SHIFT 0u
876 #define S32_NVIC_IP_PRI179_SHIFT 0u
880 #define S32_NVIC_IP_PRI180_SHIFT 0u
884 #define S32_NVIC_IP_PRI181_SHIFT 0u
888 #define S32_NVIC_IP_PRI182_SHIFT 0u
892 #define S32_NVIC_IP_PRI183_SHIFT 0u
896 #define S32_NVIC_IP_PRI184_SHIFT 0u
900 #define S32_NVIC_IP_PRI185_SHIFT 0u
904 #define S32_NVIC_IP_PRI186_SHIFT 0u
908 #define S32_NVIC_IP_PRI187_SHIFT 0u
912 #define S32_NVIC_IP_PRI188_SHIFT 0u
916 #define S32_NVIC_IP_PRI189_SHIFT 0u
920 #define S32_NVIC_IP_PRI190_SHIFT 0u
924 #define S32_NVIC_IP_PRI191_SHIFT 0u
928 #define S32_NVIC_IP_PRI192_SHIFT 0u
932 #define S32_NVIC_IP_PRI193_SHIFT 0u
936 #define S32_NVIC_IP_PRI194_SHIFT 0u
940 #define S32_NVIC_IP_PRI195_SHIFT 0u
944 #define S32_NVIC_IP_PRI196_SHIFT 0u
948 #define S32_NVIC_IP_PRI197_SHIFT 0u
952 #define S32_NVIC_IP_PRI198_SHIFT 0u
956 #define S32_NVIC_IP_PRI199_SHIFT 0u
960 #define S32_NVIC_IP_PRI200_SHIFT 0u
964 #define S32_NVIC_IP_PRI201_SHIFT 0u
968 #define S32_NVIC_IP_PRI202_SHIFT 0u
972 #define S32_NVIC_IP_PRI203_SHIFT 0u
976 #define S32_NVIC_IP_PRI204_SHIFT 0u
980 #define S32_NVIC_IP_PRI205_SHIFT 0u
984 #define S32_NVIC_IP_PRI206_SHIFT 0u
988 #define S32_NVIC_IP_PRI207_SHIFT 0u
992 #define S32_NVIC_IP_PRI208_SHIFT 0u
996 #define S32_NVIC_IP_PRI209_SHIFT 0u
1000 #define S32_NVIC_IP_PRI210_SHIFT 0u
1004 #define S32_NVIC_IP_PRI211_SHIFT 0u
1008 #define S32_NVIC_IP_PRI212_SHIFT 0u
1012 #define S32_NVIC_IP_PRI213_SHIFT 0u
1016 #define S32_NVIC_IP_PRI214_SHIFT 0u
1020 #define S32_NVIC_IP_PRI215_SHIFT 0u
1024 #define S32_NVIC_IP_PRI216_SHIFT 0u
1028 #define S32_NVIC_IP_PRI217_SHIFT 0u
1032 #define S32_NVIC_IP_PRI218_SHIFT 0u
1036 #define S32_NVIC_IP_PRI219_SHIFT 0u
1040 #define S32_NVIC_IP_PRI220_SHIFT 0u
1044 #define S32_NVIC_IP_PRI221_SHIFT 0u
1048 #define S32_NVIC_IP_PRI222_SHIFT 0u
1052 #define S32_NVIC_IP_PRI223_SHIFT 0u
1056 #define S32_NVIC_IP_PRI224_SHIFT 0u
1060 #define S32_NVIC_IP_PRI225_SHIFT 0u
1064 #define S32_NVIC_IP_PRI226_SHIFT 0u
1068 #define S32_NVIC_IP_PRI227_SHIFT 0u
1072 #define S32_NVIC_IP_PRI228_SHIFT 0u
1076 #define S32_NVIC_IP_PRI229_SHIFT 0u
1080 #define S32_NVIC_IP_PRI230_SHIFT 0u
1084 #define S32_NVIC_IP_PRI231_SHIFT 0u
1088 #define S32_NVIC_IP_PRI232_SHIFT 0u
1092 #define S32_NVIC_IP_PRI233_SHIFT 0u
1096 #define S32_NVIC_IP_PRI234_SHIFT 0u
1100 #define S32_NVIC_IP_PRI235_SHIFT 0u
1104 #define S32_NVIC_IP_PRI236_SHIFT 0u
1108 #define S32_NVIC_IP_PRI237_SHIFT 0u
1112 #define S32_NVIC_IP_PRI238_SHIFT 0u
1116 #define S32_NVIC_IP_PRI239_SHIFT 0u
1120 #define S32_NVIC_IP_PRI240_SHIFT 0u
1124 #define S32_NVIC_IP_PRI241_SHIFT 0u
1128 #define S32_NVIC_IP_PRI242_SHIFT 0u
1132 #define S32_NVIC_IP_PRI242_SHIFT 0u
1136 #define S32_NVIC_IP_PRI243_SHIFT 0u
1140 #define S32_NVIC_IP_PRI244_SHIFT 0u
1144 #define S32_NVIC_IP_PRI245_SHIFT 0u
1148 #define S32_NVIC_IP_PRI246_SHIFT 0u
1152 #define S32_NVIC_IP_PRI246_SHIFT 0u
1156 #define S32_NVIC_IP_PRI247_SHIFT 0u
1160 #define S32_NVIC_IP_PRI248_SHIFT 0u
1164 #define S32_NVIC_IP_PRI249_SHIFT 0u
1168 #define S32_NVIC_IP_PRI250_SHIFT 0u
1172 #define S32_NVIC_IP_PRI250_SHIFT 0u
1176 #define S32_NVIC_IP_PRI251_SHIFT 0u
1180 #define S32_NVIC_IP_PRI252_SHIFT 0u
1184 #define S32_NVIC_IP_PRI253_SHIFT 0u
1188 #define S32_NVIC_IP_PRI254_SHIFT 0u
1192 #define S32_NVIC_IP_PRI254_SHIFT 0u
1196 #define S32_NVIC_IP_PRI255_SHIFT 0u
1200 #define S32_NVIC_IP_PRI256_SHIFT 0u
1204 #define S32_NVIC_IP_PRI257_SHIFT 0u
1208 #define S32_NVIC_IP_PRI258_SHIFT 0u
1212 #define S32_NVIC_IP_PRI258_SHIFT 0u
1216 #define S32_NVIC_IP_PRI259_SHIFT 0u
1220 #define S32_NVIC_IP_PRI260_SHIFT 0u
1224 #define S32_NVIC_IP_PRI261_SHIFT 0u
1228 #define S32_NVIC_IP_PRI262_SHIFT 0u
1232 #define S32_NVIC_IP_PRI262_SHIFT 0u
1236 #define S32_NVIC_IP_PRI263_SHIFT 0u
1240 #define S32_NVIC_IP_PRI264_SHIFT 0u
1244 #define S32_NVIC_IP_PRI265_SHIFT 0u
1248 #define S32_NVIC_IP_PRI266_SHIFT 0u
1252 #define S32_NVIC_IP_PRI266_SHIFT 0u
1256 #define S32_NVIC_IP_PRI267_SHIFT 0u
1260 #define S32_NVIC_IP_PRI268_SHIFT 0u
1264 #define S32_NVIC_IP_PRI269_SHIFT 0u
1268 #define S32_NVIC_IP_PRI270_SHIFT 0u
1272 #define S32_NVIC_IP_PRI270_SHIFT 0u
1276 #define S32_NVIC_IP_PRI271_SHIFT 0u
1280 #define S32_NVIC_IP_PRI272_SHIFT 0u
1284 #define S32_NVIC_IP_PRI273_SHIFT 0u
1288 #define S32_NVIC_IP_PRI274_SHIFT 0u
1292 #define S32_NVIC_IP_PRI274_SHIFT 0u
1296 #define S32_NVIC_IP_PRI275_SHIFT 0u
1300 #define S32_NVIC_IP_PRI276_SHIFT 0u
1304 #define S32_NVIC_IP_PRI277_SHIFT 0u
1308 #define S32_NVIC_IP_PRI278_SHIFT 0u
1312 #define S32_NVIC_IP_PRI278_SHIFT 0u
1316 #define S32_NVIC_IP_PRI279_SHIFT 0u
1320 #define S32_NVIC_IP_PRI280_SHIFT 0u
1324 #define S32_NVIC_IP_PRI281_SHIFT 0u
1328 #define S32_NVIC_IP_PRI282_SHIFT 0u
1332 #define S32_NVIC_IP_PRI282_SHIFT 0u
1336 #define S32_NVIC_IP_PRI283_SHIFT 0u
1340 #define S32_NVIC_IP_PRI284_SHIFT 0u
1344 #define S32_NVIC_IP_PRI285_SHIFT 0u
1348 #define S32_NVIC_IP_PRI286_SHIFT 0u
1352 #define S32_NVIC_IP_PRI286_SHIFT 0u
1356 #define S32_NVIC_IP_PRI287_SHIFT 0u
1360 #define S32_NVIC_IP_PRI288_SHIFT 0u
1364 #define S32_NVIC_IP_PRI289_SHIFT 0u
1368 #define S32_NVIC_IP_PRI290_SHIFT 0u
1372 #define S32_NVIC_IP_PRI290_SHIFT 0u
1376 #define S32_NVIC_IP_PRI291_SHIFT 0u
1380 #define S32_NVIC_IP_PRI292_SHIFT 0u
1384 #define S32_NVIC_IP_PRI293_SHIFT 0u
1388 #define S32_NVIC_IP_PRI294_SHIFT 0u
1392 #define S32_NVIC_IP_PRI294_SHIFT 0u
1396 #define S32_NVIC_IP_PRI295_SHIFT 0u
1400 #define S32_NVIC_IP_PRI296_SHIFT 0u
1404 #define S32_NVIC_IP_PRI297_SHIFT 0u
1408 #define S32_NVIC_IP_PRI298_SHIFT 0u
1412 #define S32_NVIC_IP_PRI298_SHIFT 0u
1416 #define S32_NVIC_IP_PRI299_SHIFT 0u
1420 #define S32_NVIC_IP_PRI300_SHIFT 0u
1424 #define S32_NVIC_IP_PRI301_SHIFT 0u
1428 #define S32_NVIC_IP_PRI302_SHIFT 0u
1432 #define S32_NVIC_IP_PRI302_SHIFT 0u
1436 #define S32_NVIC_IP_PRI303_SHIFT 0u
1440 #define S32_NVIC_IP_PRI304_SHIFT 0u
1444 #define S32_NVIC_IP_PRI305_SHIFT 0u
1448 #define S32_NVIC_IP_PRI306_SHIFT 0u
1452 #define S32_NVIC_IP_PRI306_SHIFT 0u
1456 #define S32_NVIC_IP_PRI307_SHIFT 0u
1460 #define S32_NVIC_IP_PRI308_SHIFT 0u
1464 #define S32_NVIC_IP_PRI309_SHIFT 0u
1468 #define S32_NVIC_IP_PRI310_SHIFT 0u
1472 #define S32_NVIC_IP_PRI310_SHIFT 0u
1476 #define S32_NVIC_IP_PRI311_SHIFT 0u
1480 #define S32_NVIC_IP_PRI312_SHIFT 0u
1484 #define S32_NVIC_IP_PRI313_SHIFT 0u
1488 #define S32_NVIC_IP_PRI314_SHIFT 0u
1492 #define S32_NVIC_IP_PRI314_SHIFT 0u
1496 #define S32_NVIC_IP_PRI315_SHIFT 0u
1500 #define S32_NVIC_IP_PRI316_SHIFT 0u
1504 #define S32_NVIC_IP_PRI317_SHIFT 0u
1508 #define S32_NVIC_IP_PRI318_SHIFT 0u
1512 #define S32_NVIC_IP_PRI318_SHIFT 0u
1516 #define S32_NVIC_IP_PRI319_SHIFT 0u
1520 #define S32_NVIC_IP_PRI320_SHIFT 0u
1524 #define S32_NVIC_IP_PRI321_SHIFT 0u
1528 #define S32_NVIC_IP_PRI322_SHIFT 0u
1532 #define S32_NVIC_IP_PRI322_SHIFT 0u
1536 #define S32_NVIC_IP_PRI323_SHIFT 0u
1540 #define S32_NVIC_IP_PRI324_SHIFT 0u
1544 #define S32_NVIC_IP_PRI325_SHIFT 0u
1548 #define S32_NVIC_IP_PRI326_SHIFT 0u
1552 #define S32_NVIC_IP_PRI326_SHIFT 0u
1556 #define S32_NVIC_IP_PRI327_SHIFT 0u
1560 #define S32_NVIC_IP_PRI328_SHIFT 0u
1564 #define S32_NVIC_IP_PRI329_SHIFT 0u
1568 #define S32_NVIC_IP_PRI330_SHIFT 0u
1572 #define S32_NVIC_IP_PRI330_SHIFT 0u
1576 #define S32_NVIC_IP_PRI331_SHIFT 0u
1580 #define S32_NVIC_IP_PRI332_SHIFT 0u
1584 #define S32_NVIC_IP_PRI333_SHIFT 0u
1588 #define S32_NVIC_IP_PRI334_SHIFT 0u
1592 #define S32_NVIC_IP_PRI334_SHIFT 0u
1596 #define S32_NVIC_IP_PRI335_SHIFT 0u
1600 #define S32_NVIC_IP_PRI336_SHIFT 0u
1604 #define S32_NVIC_IP_PRI337_SHIFT 0u
1608 #define S32_NVIC_IP_PRI338_SHIFT 0u
1612 #define S32_NVIC_IP_PRI338_SHIFT 0u
1616 #define S32_NVIC_IP_PRI339_SHIFT 0u
1620 #define S32_NVIC_IP_PRI340_SHIFT 0u
1624 #define S32_NVIC_IP_PRI341_SHIFT 0u
1628 #define S32_NVIC_IP_PRI342_SHIFT 0u
1632 #define S32_NVIC_IP_PRI342_SHIFT 0u
1636 #define S32_NVIC_IP_PRI343_SHIFT 0u
1640 #define S32_NVIC_IP_PRI344_SHIFT 0u
1644 #define S32_NVIC_IP_PRI345_SHIFT 0u
1648 #define S32_NVIC_IP_PRI346_SHIFT 0u
1652 #define S32_NVIC_IP_PRI346_SHIFT 0u
1656 #define S32_NVIC_IP_PRI347_SHIFT 0u
1660 #define S32_NVIC_IP_PRI348_SHIFT 0u
1664 #define S32_NVIC_IP_PRI349_SHIFT 0u
1668 #define S32_NVIC_IP_PRI350_SHIFT 0u
1672 #define S32_NVIC_IP_PRI350_SHIFT 0u
1676 #define S32_NVIC_IP_PRI351_SHIFT 0u
1680 #define S32_NVIC_IP_PRI352_SHIFT 0u
1684 #define S32_NVIC_IP_PRI353_SHIFT 0u
1688 #define S32_NVIC_IP_PRI354_SHIFT 0u
1692 #define S32_NVIC_IP_PRI354_SHIFT 0u
1696 #define S32_NVIC_IP_PRI355_SHIFT 0u
1700 #define S32_NVIC_IP_PRI356_SHIFT 0u
1704 #define S32_NVIC_IP_PRI357_SHIFT 0u
1708 #define S32_NVIC_IP_PRI358_SHIFT 0u
1712 #define S32_NVIC_IP_PRI358_SHIFT 0u
1716 #define S32_NVIC_IP_PRI359_SHIFT 0u
1720 #define S32_NVIC_IP_PRI360_SHIFT 0u
1724 #define S32_NVIC_IP_PRI361_SHIFT 0u
1728 #define S32_NVIC_IP_PRI362_SHIFT 0u
1732 #define S32_NVIC_IP_PRI362_SHIFT 0u
1736 #define S32_NVIC_IP_PRI363_SHIFT 0u
1740 #define S32_NVIC_IP_PRI364_SHIFT 0u
1744 #define S32_NVIC_IP_PRI365_SHIFT 0u
1748 #define S32_NVIC_IP_PRI366_SHIFT 0u
1752 #define S32_NVIC_IP_PRI366_SHIFT 0u
1756 #define S32_NVIC_IP_PRI367_SHIFT 0u
1760 #define S32_NVIC_IP_PRI368_SHIFT 0u
1764 #define S32_NVIC_IP_PRI369_SHIFT 0u
1768 #define S32_NVIC_IP_PRI370_SHIFT 0u
1772 #define S32_NVIC_IP_PRI370_SHIFT 0u
1776 #define S32_NVIC_IP_PRI371_SHIFT 0u
1780 #define S32_NVIC_IP_PRI372_SHIFT 0u
1784 #define S32_NVIC_IP_PRI373_SHIFT 0u
1788 #define S32_NVIC_IP_PRI374_SHIFT 0u
1792 #define S32_NVIC_IP_PRI374_SHIFT 0u
1796 #define S32_NVIC_IP_PRI375_SHIFT 0u
1800 #define S32_NVIC_IP_PRI376_SHIFT 0u
1804 #define S32_NVIC_IP_PRI377_SHIFT 0u
1808 #define S32_NVIC_IP_PRI378_SHIFT 0u
1812 #define S32_NVIC_IP_PRI378_SHIFT 0u
1816 #define S32_NVIC_IP_PRI379_SHIFT 0u
1820 #define S32_NVIC_IP_PRI380_SHIFT 0u
1824 #define S32_NVIC_IP_PRI381_SHIFT 0u
1828 #define S32_NVIC_IP_PRI382_SHIFT 0u
1832 #define S32_NVIC_IP_PRI382_SHIFT 0u
1836 #define S32_NVIC_IP_PRI383_SHIFT 0u
1840 #define S32_NVIC_IP_PRI384_SHIFT 0u
1844 #define S32_NVIC_IP_PRI385_SHIFT 0u
1848 #define S32_NVIC_IP_PRI386_SHIFT 0u
1852 #define S32_NVIC_IP_PRI386_SHIFT 0u
1856 #define S32_NVIC_IP_PRI387_SHIFT 0u
1860 #define S32_NVIC_IP_PRI388_SHIFT 0u
1864 #define S32_NVIC_IP_PRI389_SHIFT 0u
1868 #define S32_NVIC_IP_PRI390_SHIFT 0u
1872 #define S32_NVIC_IP_PRI390_SHIFT 0u
1876 #define S32_NVIC_IP_PRI391_SHIFT 0u
1880 #define S32_NVIC_IP_PRI392_SHIFT 0u
1884 #define S32_NVIC_IP_PRI393_SHIFT 0u
1888 #define S32_NVIC_IP_PRI394_SHIFT 0u
1892 #define S32_NVIC_IP_PRI394_SHIFT 0u
1896 #define S32_NVIC_IP_PRI395_SHIFT 0u
1900 #define S32_NVIC_IP_PRI396_SHIFT 0u
1904 #define S32_NVIC_IP_PRI397_SHIFT 0u
1908 #define S32_NVIC_IP_PRI398_SHIFT 0u
1912 #define S32_NVIC_IP_PRI398_SHIFT 0u
1916 #define S32_NVIC_IP_PRI399_SHIFT 0u
1920 #define S32_NVIC_IP_PRI400_SHIFT 0u
1924 #define S32_NVIC_IP_PRI401_SHIFT 0u
1928 #define S32_NVIC_IP_PRI402_SHIFT 0u
1932 #define S32_NVIC_IP_PRI402_SHIFT 0u
1936 #define S32_NVIC_IP_PRI403_SHIFT 0u
1940 #define S32_NVIC_IP_PRI404_SHIFT 0u
1944 #define S32_NVIC_IP_PRI405_SHIFT 0u
1948 #define S32_NVIC_IP_PRI406_SHIFT 0u
1952 #define S32_NVIC_IP_PRI406_SHIFT 0u
1956 #define S32_NVIC_IP_PRI407_SHIFT 0u
1960 #define S32_NVIC_IP_PRI408_SHIFT 0u
1964 #define S32_NVIC_IP_PRI409_SHIFT 0u
1968 #define S32_NVIC_IP_PRI410_SHIFT 0u
1972 #define S32_NVIC_IP_PRI410_SHIFT 0u
1976 #define S32_NVIC_IP_PRI411_SHIFT 0u
1980 #define S32_NVIC_IP_PRI412_SHIFT 0u
1984 #define S32_NVIC_IP_PRI413_SHIFT 0u
1988 #define S32_NVIC_IP_PRI414_SHIFT 0u
1992 #define S32_NVIC_IP_PRI414_SHIFT 0u
1996 #define S32_NVIC_IP_PRI415_SHIFT 0u
2000 #define S32_NVIC_IP_PRI416_SHIFT 0u
2004 #define S32_NVIC_IP_PRI417_SHIFT 0u
2008 #define S32_NVIC_IP_PRI418_SHIFT 0u
2012 #define S32_NVIC_IP_PRI418_SHIFT 0u
2016 #define S32_NVIC_IP_PRI419_SHIFT 0u
2020 #define S32_NVIC_IP_PRI420_SHIFT 0u
2024 #define S32_NVIC_IP_PRI421_SHIFT 0u
2028 #define S32_NVIC_IP_PRI422_SHIFT 0u
2032 #define S32_NVIC_IP_PRI422_SHIFT 0u
2036 #define S32_NVIC_IP_PRI423_SHIFT 0u
2040 #define S32_NVIC_IP_PRI424_SHIFT 0u
2044 #define S32_NVIC_IP_PRI425_SHIFT 0u
2048 #define S32_NVIC_IP_PRI426_SHIFT 0u
2052 #define S32_NVIC_IP_PRI426_SHIFT 0u
2056 #define S32_NVIC_IP_PRI427_SHIFT 0u
2060 #define S32_NVIC_IP_PRI428_SHIFT 0u
2064 #define S32_NVIC_IP_PRI429_SHIFT 0u
2068 #define S32_NVIC_IP_PRI430_SHIFT 0u
2072 #define S32_NVIC_IP_PRI430_SHIFT 0u
2076 #define S32_NVIC_IP_PRI431_SHIFT 0u
2080 #define S32_NVIC_IP_PRI432_SHIFT 0u
2084 #define S32_NVIC_IP_PRI433_SHIFT 0u
2088 #define S32_NVIC_IP_PRI434_SHIFT 0u
2092 #define S32_NVIC_IP_PRI434_SHIFT 0u
2096 #define S32_NVIC_IP_PRI435_SHIFT 0u
2100 #define S32_NVIC_IP_PRI436_SHIFT 0u
2104 #define S32_NVIC_IP_PRI437_SHIFT 0u
2108 #define S32_NVIC_IP_PRI438_SHIFT 0u
2112 #define S32_NVIC_IP_PRI438_SHIFT 0u
2116 #define S32_NVIC_IP_PRI439_SHIFT 0u
2120 #define S32_NVIC_IP_PRI440_SHIFT 0u
2124 #define S32_NVIC_IP_PRI441_SHIFT 0u
2128 #define S32_NVIC_IP_PRI442_SHIFT 0u
2132 #define S32_NVIC_IP_PRI442_SHIFT 0u
2136 #define S32_NVIC_IP_PRI443_SHIFT 0u
2140 #define S32_NVIC_IP_PRI444_SHIFT 0u
2144 #define S32_NVIC_IP_PRI445_SHIFT 0u
2148 #define S32_NVIC_IP_PRI446_SHIFT 0u
2152 #define S32_NVIC_IP_PRI446_SHIFT 0u
2156 #define S32_NVIC_IP_PRI447_SHIFT 0u
2160 #define S32_NVIC_IP_PRI448_SHIFT 0u
2164 #define S32_NVIC_IP_PRI449_SHIFT 0u
2168 #define S32_NVIC_IP_PRI450_SHIFT 0u
2172 #define S32_NVIC_IP_PRI450_SHIFT 0u
2176 #define S32_NVIC_IP_PRI451_SHIFT 0u
2180 #define S32_NVIC_IP_PRI452_SHIFT 0u
2184 #define S32_NVIC_IP_PRI453_SHIFT 0u
2188 #define S32_NVIC_IP_PRI454_SHIFT 0u
2192 #define S32_NVIC_IP_PRI454_SHIFT 0u
2196 #define S32_NVIC_IP_PRI455_SHIFT 0u
2200 #define S32_NVIC_IP_PRI456_SHIFT 0u
2204 #define S32_NVIC_IP_PRI457_SHIFT 0u
2208 #define S32_NVIC_IP_PRI458_SHIFT 0u
2212 #define S32_NVIC_IP_PRI458_SHIFT 0u
2216 #define S32_NVIC_IP_PRI459_SHIFT 0u
2220 #define S32_NVIC_IP_PRI460_SHIFT 0u
2224 #define S32_NVIC_IP_PRI461_SHIFT 0u
2228 #define S32_NVIC_IP_PRI462_SHIFT 0u
2232 #define S32_NVIC_IP_PRI462_SHIFT 0u
2236 #define S32_NVIC_IP_PRI463_SHIFT 0u
2240 #define S32_NVIC_IP_PRI464_SHIFT 0u
2244 #define S32_NVIC_IP_PRI465_SHIFT 0u
2248 #define S32_NVIC_IP_PRI466_SHIFT 0u
2252 #define S32_NVIC_IP_PRI466_SHIFT 0u
2256 #define S32_NVIC_IP_PRI467_SHIFT 0u
2260 #define S32_NVIC_IP_PRI468_SHIFT 0u
2264 #define S32_NVIC_IP_PRI469_SHIFT 0u
2268 #define S32_NVIC_IP_PRI470_SHIFT 0u
2272 #define S32_NVIC_IP_PRI470_SHIFT 0u
2276 #define S32_NVIC_IP_PRI471_SHIFT 0u
2280 #define S32_NVIC_IP_PRI472_SHIFT 0u
2284 #define S32_NVIC_IP_PRI473_SHIFT 0u
2288 #define S32_NVIC_IP_PRI474_SHIFT 0u
2292 #define S32_NVIC_IP_PRI474_SHIFT 0u
2296 #define S32_NVIC_IP_PRI475_SHIFT 0u
2300 #define S32_NVIC_IP_PRI476_SHIFT 0u
2304 #define S32_NVIC_IP_PRI477_SHIFT 0u
2308 #define S32_NVIC_IP_PRI478_SHIFT 0u
2312 #define S32_NVIC_IP_PRI478_SHIFT 0u
2316 #define S32_NVIC_IP_PRI479_SHIFT 0u
2320 #define S32_NVIC_STIR_INTID_SHIFT 0u