/*
 * Copyright 1997-2016 Freescale Semiconductor, Inc.
 * Copyright 2016-2024 NXP
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/*!
 * @file S32Z2_NVIC.h
 * @version 2.3
 * @date 2024-05-03
 * @brief Peripheral Access Layer for S32Z2_NVIC
 *
 * This file contains register definitions and macros for easy access to their
 * bit fields.
 *
 * This file assumes LITTLE endian system.
 */

/**
* @page misra_violations MISRA-C:2012 violations
*
* @section [global]
* Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced
* The SoC header defines typedef for all modules.
*
* @section [global]
* Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced
* The SoC header defines macros for all modules and registers.
*
* @section [global]
* Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
* These are generated macros used for accessing the bit-fields from registers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.1, identifier clash
* The supported compilers use more than 31 significant characters for identifiers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.2, identifier clash
* The supported compilers use more than 31 significant characters for identifiers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.4, identifier clash
* The supported compilers use more than 31 significant characters for identifiers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.5, identifier clash
* The supported compilers use more than 31 significant characters for identifiers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler
* This type qualifier is needed to ensure correct I/O access and addressing.
*/

/* Prevention from multiple including the same memory map */
#if !defined(S32Z2_NVIC_H_)  /* Check if memory map has not been already included */
#define S32Z2_NVIC_H_

#include "S32Z2_COMMON.h"

/* ----------------------------------------------------------------------------
   -- S32_NVIC Peripheral Access Layer
   ---------------------------------------------------------------------------- */

/*!
 * @addtogroup S32_NVIC_Peripheral_Access_Layer S32_NVIC Peripheral Access Layer
 * @{
 */

/** S32_NVIC - Size of Registers Arrays */
#define S32_NVIC_ISER_COUNT                      16u
#define S32_NVIC_ICER_COUNT                      16u
#define S32_NVIC_ISPR_COUNT                      16u
#define S32_NVIC_ICPR_COUNT                      16u
#define S32_NVIC_IABR_COUNT                      16u
#define S32_NVIC_ITNS_COUNT                      16u
#define S32_NVIC_IP_COUNT                        480u

/** S32_NVIC - Register Layout Typedef */
typedef struct {
       uint8_t RESERVED_0[4];
  __I  uint32_t ICTR;                              /**< Interrupt Control Type Register, offset: 0x4 */
       uint8_t RESERVED_1[248];
  __IO uint32_t ISER[S32_NVIC_ISER_COUNT];         /**< Interrupt Set Enable Register n, array offset: 0x100, array step: 0x4 */
       uint8_t RESERVED_2[64];
  __IO uint32_t ICER[S32_NVIC_ICER_COUNT];         /**< Interrupt Clear Enable Register n, array offset: 0x180, array step: 0x4 */
       uint8_t RESERVED_3[64];
  __IO uint32_t ISPR[S32_NVIC_ISPR_COUNT];         /**< Interrupt Set Pending Register n, array offset: 0x200, array step: 0x4 */
       uint8_t RESERVED_4[64];
  __IO uint32_t ICPR[S32_NVIC_ICPR_COUNT];         /**< Interrupt Clear Pending Register n, array offset: 0x280, array step: 0x4 */
       uint8_t RESERVED_5[64];
  __IO uint32_t IABR[S32_NVIC_IABR_COUNT];         /**< Interrupt Active bit Register n, array offset: 0x300, array step: 0x4 */
       uint8_t RESERVED_6[64];
  __IO uint32_t ITNS[S32_NVIC_ITNS_COUNT];         /**< Interrupt Target Non-Secure Register n, array offset: 0x380, array step: 0x4 (Not accessible from S32_NVIC_NS) */
       uint8_t RESERVED_7[64];
  __IO uint8_t IP[S32_NVIC_IP_COUNT];              /**< Interrupt Priority Register n, array offset: 0x400, array step: 0x1 */
       uint8_t RESERVED_8[2576];
  __O  uint32_t STIR;                              /**< Software Trigger Interrupt Register, offset: 0xF00 */
} S32_NVIC_Type, *S32_NVIC_MemMapPtr;

 /** Number of instances of the S32_NVIC module. */
#define S32_NVIC_INSTANCE_COUNT                  (1u)

/* S32_NVIC - Peripheral instance base addresses */
/** Peripheral S32_NVIC base address */
#define IP_S32_NVIC_BASE                            (0xE000E000u)
/** Peripheral S32_NVIC_NS base address */
#define IP_S32_NVIC_NS_BASE                         (0xE002E000u)
/** Peripheral S32_NVIC base pointer */
#define S32_NVIC                                 ((S32_NVIC_Type *)IP_S32_NVIC_BASE)
/** Peripheral S32_NVIC_NS base pointer */
#define S32_NVIC_NS                              ((S32_NVIC_Type *)IP_S32_NVIC_NS_BASE)
/** Array initializer of S32_NVIC peripheral base addresses */
#define IP_S32_NVIC_BASE_ADDRS                      { IP_S32_NVIC_BASE }
/** Array initializer of S32_NVIC peripheral base pointers */
#define IP_S32_NVIC_BASE_PTRS                       { IP_S32_NVIC }

/* ----------------------------------------------------------------------------
   -- S32_NVIC Register Masks
   ---------------------------------------------------------------------------- */

/*!
 * @addtogroup S32_NVIC_Register_Masks S32_NVIC Register Masks
 * @{
 */

/* ICTR Bit Fields */
#define S32_NVIC_ICTR_ICTR_MASK                  0xFFFFFFFFu
#define S32_NVIC_ICTR_ICTR_SHIFT                 0u
#define S32_NVIC_ICTR_ICTR_WIDTH                 32u
#define S32_NVIC_ICTR_ICTR(x)                    (((uint32_t)(((uint32_t)(x))<<S32_NVIC_ICTR_ICTR_SHIFT))&S32_NVIC_ICTR_ICTR_MASK)
/* ISER Bit Fields */
#define S32_NVIC_ISER_SETENA_MASK                0xFFFFFFFFu
#define S32_NVIC_ISER_SETENA_SHIFT               0u
#define S32_NVIC_ISER_SETENA_WIDTH               32u
#define S32_NVIC_ISER_SETENA(x)                  (((uint32_t)(((uint32_t)(x))<<S32_NVIC_ISER_SETENA_SHIFT))&S32_NVIC_ISER_SETENA_MASK)
/* ICER Bit Fields */
#define S32_NVIC_ICER_CLRENA_MASK                0xFFFFFFFFu
#define S32_NVIC_ICER_CLRENA_SHIFT               0u
#define S32_NVIC_ICER_CLRENA_WIDTH               32u
#define S32_NVIC_ICER_CLRENA(x)                  (((uint32_t)(((uint32_t)(x))<<S32_NVIC_ICER_CLRENA_SHIFT))&S32_NVIC_ICER_CLRENA_MASK)
/* ISPR Bit Fields */
#define S32_NVIC_ISPR_SETPEND_MASK               0xFFFFFFFFu
#define S32_NVIC_ISPR_SETPEND_SHIFT              0u
#define S32_NVIC_ISPR_SETPEND_WIDTH              32u
#define S32_NVIC_ISPR_SETPEND(x)                 (((uint32_t)(((uint32_t)(x))<<S32_NVIC_ISPR_SETPEND_SHIFT))&S32_NVIC_ISPR_SETPEND_MASK)
/* ICPR Bit Fields */
#define S32_NVIC_ICPR_CLRPEND_MASK               0xFFFFFFFFu
#define S32_NVIC_ICPR_CLRPEND_SHIFT              0u
#define S32_NVIC_ICPR_CLRPEND_WIDTH              32u
#define S32_NVIC_ICPR_CLRPEND(x)                 (((uint32_t)(((uint32_t)(x))<<S32_NVIC_ICPR_CLRPEND_SHIFT))&S32_NVIC_ICPR_CLRPEND_MASK)
/* IABR Bit Fields */
#define S32_NVIC_IABR_ACTIVE_MASK                0xFFFFFFFFu
#define S32_NVIC_IABR_ACTIVE_SHIFT               0u
#define S32_NVIC_IABR_ACTIVE_WIDTH               32u
#define S32_NVIC_IABR_ACTIVE(x)                  (((uint32_t)(((uint32_t)(x))<<S32_NVIC_IABR_ACTIVE_SHIFT))&S32_NVIC_IABR_ACTIVE_MASK)
/* IP Bit Fields */
#define S32_NVIC_IP_PRI0_MASK                    0xFFu
#define S32_NVIC_IP_PRI0_SHIFT                   0u
#define S32_NVIC_IP_PRI0_WIDTH                   8u
#define S32_NVIC_IP_PRI0(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI0_SHIFT))&S32_NVIC_IP_PRI0_MASK)
#define S32_NVIC_IP_PRI1_MASK                    0xFFu
#define S32_NVIC_IP_PRI1_SHIFT                   0u
#define S32_NVIC_IP_PRI1_WIDTH                   8u
#define S32_NVIC_IP_PRI1(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI1_SHIFT))&S32_NVIC_IP_PRI1_MASK)
#define S32_NVIC_IP_PRI2_MASK                    0xFFu
#define S32_NVIC_IP_PRI2_SHIFT                   0u
#define S32_NVIC_IP_PRI2_WIDTH                   8u
#define S32_NVIC_IP_PRI2(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI2_SHIFT))&S32_NVIC_IP_PRI2_MASK)
#define S32_NVIC_IP_PRI3_MASK                    0xFFu
#define S32_NVIC_IP_PRI3_SHIFT                   0u
#define S32_NVIC_IP_PRI3_WIDTH                   8u
#define S32_NVIC_IP_PRI3(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI3_SHIFT))&S32_NVIC_IP_PRI3_MASK)
#define S32_NVIC_IP_PRI4_MASK                    0xFFu
#define S32_NVIC_IP_PRI4_SHIFT                   0u
#define S32_NVIC_IP_PRI4_WIDTH                   8u
#define S32_NVIC_IP_PRI4(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI4_SHIFT))&S32_NVIC_IP_PRI4_MASK)
#define S32_NVIC_IP_PRI5_MASK                    0xFFu
#define S32_NVIC_IP_PRI5_SHIFT                   0u
#define S32_NVIC_IP_PRI5_WIDTH                   8u
#define S32_NVIC_IP_PRI5(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI5_SHIFT))&S32_NVIC_IP_PRI5_MASK)
#define S32_NVIC_IP_PRI6_MASK                    0xFFu
#define S32_NVIC_IP_PRI6_SHIFT                   0u
#define S32_NVIC_IP_PRI6_WIDTH                   8u
#define S32_NVIC_IP_PRI6(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI6_SHIFT))&S32_NVIC_IP_PRI6_MASK)
#define S32_NVIC_IP_PRI7_MASK                    0xFFu
#define S32_NVIC_IP_PRI7_SHIFT                   0u
#define S32_NVIC_IP_PRI7_WIDTH                   8u
#define S32_NVIC_IP_PRI7(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI7_SHIFT))&S32_NVIC_IP_PRI7_MASK)
#define S32_NVIC_IP_PRI8_MASK                    0xFFu
#define S32_NVIC_IP_PRI8_SHIFT                   0u
#define S32_NVIC_IP_PRI8_WIDTH                   8u
#define S32_NVIC_IP_PRI8(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI8_SHIFT))&S32_NVIC_IP_PRI8_MASK)
#define S32_NVIC_IP_PRI9_MASK                    0xFFu
#define S32_NVIC_IP_PRI9_SHIFT                   0u
#define S32_NVIC_IP_PRI9_WIDTH                   8u
#define S32_NVIC_IP_PRI9(x)                      (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI9_SHIFT))&S32_NVIC_IP_PRI9_MASK)
#define S32_NVIC_IP_PRI10_MASK                   0xFFu
#define S32_NVIC_IP_PRI10_SHIFT                  0u
#define S32_NVIC_IP_PRI10_WIDTH                  8u
#define S32_NVIC_IP_PRI10(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI10_SHIFT))&S32_NVIC_IP_PRI10_MASK)
#define S32_NVIC_IP_PRI11_MASK                   0xFFu
#define S32_NVIC_IP_PRI11_SHIFT                  0u
#define S32_NVIC_IP_PRI11_WIDTH                  8u
#define S32_NVIC_IP_PRI11(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI11_SHIFT))&S32_NVIC_IP_PRI11_MASK)
#define S32_NVIC_IP_PRI12_MASK                   0xFFu
#define S32_NVIC_IP_PRI12_SHIFT                  0u
#define S32_NVIC_IP_PRI12_WIDTH                  8u
#define S32_NVIC_IP_PRI12(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI12_SHIFT))&S32_NVIC_IP_PRI12_MASK)
#define S32_NVIC_IP_PRI13_MASK                   0xFFu
#define S32_NVIC_IP_PRI13_SHIFT                  0u
#define S32_NVIC_IP_PRI13_WIDTH                  8u
#define S32_NVIC_IP_PRI13(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI13_SHIFT))&S32_NVIC_IP_PRI13_MASK)
#define S32_NVIC_IP_PRI14_MASK                   0xFFu
#define S32_NVIC_IP_PRI14_SHIFT                  0u
#define S32_NVIC_IP_PRI14_WIDTH                  8u
#define S32_NVIC_IP_PRI14(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI14_SHIFT))&S32_NVIC_IP_PRI14_MASK)
#define S32_NVIC_IP_PRI15_MASK                   0xFFu
#define S32_NVIC_IP_PRI15_SHIFT                  0u
#define S32_NVIC_IP_PRI15_WIDTH                  8u
#define S32_NVIC_IP_PRI15(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI15_SHIFT))&S32_NVIC_IP_PRI15_MASK)
#define S32_NVIC_IP_PRI16_MASK                   0xFFu
#define S32_NVIC_IP_PRI16_SHIFT                  0u
#define S32_NVIC_IP_PRI16_WIDTH                  8u
#define S32_NVIC_IP_PRI16(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI16_SHIFT))&S32_NVIC_IP_PRI16_MASK)
#define S32_NVIC_IP_PRI17_MASK                   0xFFu
#define S32_NVIC_IP_PRI17_SHIFT                  0u
#define S32_NVIC_IP_PRI17_WIDTH                  8u
#define S32_NVIC_IP_PRI17(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI17_SHIFT))&S32_NVIC_IP_PRI17_MASK)
#define S32_NVIC_IP_PRI18_MASK                   0xFFu
#define S32_NVIC_IP_PRI18_SHIFT                  0u
#define S32_NVIC_IP_PRI18_WIDTH                  8u
#define S32_NVIC_IP_PRI18(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI18_SHIFT))&S32_NVIC_IP_PRI18_MASK)
#define S32_NVIC_IP_PRI19_MASK                   0xFFu
#define S32_NVIC_IP_PRI19_SHIFT                  0u
#define S32_NVIC_IP_PRI19_WIDTH                  8u
#define S32_NVIC_IP_PRI19(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI19_SHIFT))&S32_NVIC_IP_PRI19_MASK)
#define S32_NVIC_IP_PRI20_MASK                   0xFFu
#define S32_NVIC_IP_PRI20_SHIFT                  0u
#define S32_NVIC_IP_PRI20_WIDTH                  8u
#define S32_NVIC_IP_PRI20(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI20_SHIFT))&S32_NVIC_IP_PRI20_MASK)
#define S32_NVIC_IP_PRI21_MASK                   0xFFu
#define S32_NVIC_IP_PRI21_SHIFT                  0u
#define S32_NVIC_IP_PRI21_WIDTH                  8u
#define S32_NVIC_IP_PRI21(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI21_SHIFT))&S32_NVIC_IP_PRI21_MASK)
#define S32_NVIC_IP_PRI22_MASK                   0xFFu
#define S32_NVIC_IP_PRI22_SHIFT                  0u
#define S32_NVIC_IP_PRI22_WIDTH                  8u
#define S32_NVIC_IP_PRI22(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI22_SHIFT))&S32_NVIC_IP_PRI22_MASK)
#define S32_NVIC_IP_PRI23_MASK                   0xFFu
#define S32_NVIC_IP_PRI23_SHIFT                  0u
#define S32_NVIC_IP_PRI23_WIDTH                  8u
#define S32_NVIC_IP_PRI23(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI23_SHIFT))&S32_NVIC_IP_PRI23_MASK)
#define S32_NVIC_IP_PRI24_MASK                   0xFFu
#define S32_NVIC_IP_PRI24_SHIFT                  0u
#define S32_NVIC_IP_PRI24_WIDTH                  8u
#define S32_NVIC_IP_PRI24(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI24_SHIFT))&S32_NVIC_IP_PRI24_MASK)
#define S32_NVIC_IP_PRI25_MASK                   0xFFu
#define S32_NVIC_IP_PRI25_SHIFT                  0u
#define S32_NVIC_IP_PRI25_WIDTH                  8u
#define S32_NVIC_IP_PRI25(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI25_SHIFT))&S32_NVIC_IP_PRI25_MASK)
#define S32_NVIC_IP_PRI26_MASK                   0xFFu
#define S32_NVIC_IP_PRI26_SHIFT                  0u
#define S32_NVIC_IP_PRI26_WIDTH                  8u
#define S32_NVIC_IP_PRI26(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI26_SHIFT))&S32_NVIC_IP_PRI26_MASK)
#define S32_NVIC_IP_PRI27_MASK                   0xFFu
#define S32_NVIC_IP_PRI27_SHIFT                  0u
#define S32_NVIC_IP_PRI27_WIDTH                  8u
#define S32_NVIC_IP_PRI27(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI27_SHIFT))&S32_NVIC_IP_PRI27_MASK)
#define S32_NVIC_IP_PRI28_MASK                   0xFFu
#define S32_NVIC_IP_PRI28_SHIFT                  0u
#define S32_NVIC_IP_PRI28_WIDTH                  8u
#define S32_NVIC_IP_PRI28(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI28_SHIFT))&S32_NVIC_IP_PRI28_MASK)
#define S32_NVIC_IP_PRI29_MASK                   0xFFu
#define S32_NVIC_IP_PRI29_SHIFT                  0u
#define S32_NVIC_IP_PRI29_WIDTH                  8u
#define S32_NVIC_IP_PRI29(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI29_SHIFT))&S32_NVIC_IP_PRI29_MASK)
#define S32_NVIC_IP_PRI30_MASK                   0xFFu
#define S32_NVIC_IP_PRI30_SHIFT                  0u
#define S32_NVIC_IP_PRI30_WIDTH                  8u
#define S32_NVIC_IP_PRI30(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI30_SHIFT))&S32_NVIC_IP_PRI30_MASK)
#define S32_NVIC_IP_PRI31_MASK                   0xFFu
#define S32_NVIC_IP_PRI31_SHIFT                  0u
#define S32_NVIC_IP_PRI31_WIDTH                  8u
#define S32_NVIC_IP_PRI31(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI31_SHIFT))&S32_NVIC_IP_PRI31_MASK)
#define S32_NVIC_IP_PRI32_MASK                   0xFFu
#define S32_NVIC_IP_PRI32_SHIFT                  0u
#define S32_NVIC_IP_PRI32_WIDTH                  8u
#define S32_NVIC_IP_PRI32(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI32_SHIFT))&S32_NVIC_IP_PRI32_MASK)
#define S32_NVIC_IP_PRI33_MASK                   0xFFu
#define S32_NVIC_IP_PRI33_SHIFT                  0u
#define S32_NVIC_IP_PRI33_WIDTH                  8u
#define S32_NVIC_IP_PRI33(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI33_SHIFT))&S32_NVIC_IP_PRI33_MASK)
#define S32_NVIC_IP_PRI34_MASK                   0xFFu
#define S32_NVIC_IP_PRI34_SHIFT                  0u
#define S32_NVIC_IP_PRI34_WIDTH                  8u
#define S32_NVIC_IP_PRI34(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI34_SHIFT))&S32_NVIC_IP_PRI34_MASK)
#define S32_NVIC_IP_PRI35_MASK                   0xFFu
#define S32_NVIC_IP_PRI35_SHIFT                  0u
#define S32_NVIC_IP_PRI35_WIDTH                  8u
#define S32_NVIC_IP_PRI35(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI35_SHIFT))&S32_NVIC_IP_PRI35_MASK)
#define S32_NVIC_IP_PRI36_MASK                   0xFFu
#define S32_NVIC_IP_PRI36_SHIFT                  0u
#define S32_NVIC_IP_PRI36_WIDTH                  8u
#define S32_NVIC_IP_PRI36(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI36_SHIFT))&S32_NVIC_IP_PRI36_MASK)
#define S32_NVIC_IP_PRI37_MASK                   0xFFu
#define S32_NVIC_IP_PRI37_SHIFT                  0u
#define S32_NVIC_IP_PRI37_WIDTH                  8u
#define S32_NVIC_IP_PRI37(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI37_SHIFT))&S32_NVIC_IP_PRI37_MASK)
#define S32_NVIC_IP_PRI38_MASK                   0xFFu
#define S32_NVIC_IP_PRI38_SHIFT                  0u
#define S32_NVIC_IP_PRI38_WIDTH                  8u
#define S32_NVIC_IP_PRI38(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI38_SHIFT))&S32_NVIC_IP_PRI38_MASK)
#define S32_NVIC_IP_PRI39_MASK                   0xFFu
#define S32_NVIC_IP_PRI39_SHIFT                  0u
#define S32_NVIC_IP_PRI39_WIDTH                  8u
#define S32_NVIC_IP_PRI39(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI39_SHIFT))&S32_NVIC_IP_PRI39_MASK)
#define S32_NVIC_IP_PRI40_MASK                   0xFFu
#define S32_NVIC_IP_PRI40_SHIFT                  0u
#define S32_NVIC_IP_PRI40_WIDTH                  8u
#define S32_NVIC_IP_PRI40(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI40_SHIFT))&S32_NVIC_IP_PRI40_MASK)
#define S32_NVIC_IP_PRI41_MASK                   0xFFu
#define S32_NVIC_IP_PRI41_SHIFT                  0u
#define S32_NVIC_IP_PRI41_WIDTH                  8u
#define S32_NVIC_IP_PRI41(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI41_SHIFT))&S32_NVIC_IP_PRI41_MASK)
#define S32_NVIC_IP_PRI42_MASK                   0xFFu
#define S32_NVIC_IP_PRI42_SHIFT                  0u
#define S32_NVIC_IP_PRI42_WIDTH                  8u
#define S32_NVIC_IP_PRI42(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI42_SHIFT))&S32_NVIC_IP_PRI42_MASK)
#define S32_NVIC_IP_PRI43_MASK                   0xFFu
#define S32_NVIC_IP_PRI43_SHIFT                  0u
#define S32_NVIC_IP_PRI43_WIDTH                  8u
#define S32_NVIC_IP_PRI43(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI43_SHIFT))&S32_NVIC_IP_PRI43_MASK)
#define S32_NVIC_IP_PRI44_MASK                   0xFFu
#define S32_NVIC_IP_PRI44_SHIFT                  0u
#define S32_NVIC_IP_PRI44_WIDTH                  8u
#define S32_NVIC_IP_PRI44(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI44_SHIFT))&S32_NVIC_IP_PRI44_MASK)
#define S32_NVIC_IP_PRI45_MASK                   0xFFu
#define S32_NVIC_IP_PRI45_SHIFT                  0u
#define S32_NVIC_IP_PRI45_WIDTH                  8u
#define S32_NVIC_IP_PRI45(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI45_SHIFT))&S32_NVIC_IP_PRI45_MASK)
#define S32_NVIC_IP_PRI46_MASK                   0xFFu
#define S32_NVIC_IP_PRI46_SHIFT                  0u
#define S32_NVIC_IP_PRI46_WIDTH                  8u
#define S32_NVIC_IP_PRI46(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI46_SHIFT))&S32_NVIC_IP_PRI46_MASK)
#define S32_NVIC_IP_PRI47_MASK                   0xFFu
#define S32_NVIC_IP_PRI47_SHIFT                  0u
#define S32_NVIC_IP_PRI47_WIDTH                  8u
#define S32_NVIC_IP_PRI47(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI47_SHIFT))&S32_NVIC_IP_PRI47_MASK)
#define S32_NVIC_IP_PRI48_MASK                   0xFFu
#define S32_NVIC_IP_PRI48_SHIFT                  0u
#define S32_NVIC_IP_PRI48_WIDTH                  8u
#define S32_NVIC_IP_PRI48(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI48_SHIFT))&S32_NVIC_IP_PRI48_MASK)
#define S32_NVIC_IP_PRI49_MASK                   0xFFu
#define S32_NVIC_IP_PRI49_SHIFT                  0u
#define S32_NVIC_IP_PRI49_WIDTH                  8u
#define S32_NVIC_IP_PRI49(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI49_SHIFT))&S32_NVIC_IP_PRI49_MASK)
#define S32_NVIC_IP_PRI50_MASK                   0xFFu
#define S32_NVIC_IP_PRI50_SHIFT                  0u
#define S32_NVIC_IP_PRI50_WIDTH                  8u
#define S32_NVIC_IP_PRI50(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI50_SHIFT))&S32_NVIC_IP_PRI50_MASK)
#define S32_NVIC_IP_PRI51_MASK                   0xFFu
#define S32_NVIC_IP_PRI51_SHIFT                  0u
#define S32_NVIC_IP_PRI51_WIDTH                  8u
#define S32_NVIC_IP_PRI51(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI51_SHIFT))&S32_NVIC_IP_PRI51_MASK)
#define S32_NVIC_IP_PRI52_MASK                   0xFFu
#define S32_NVIC_IP_PRI52_SHIFT                  0u
#define S32_NVIC_IP_PRI52_WIDTH                  8u
#define S32_NVIC_IP_PRI52(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI52_SHIFT))&S32_NVIC_IP_PRI52_MASK)
#define S32_NVIC_IP_PRI53_MASK                   0xFFu
#define S32_NVIC_IP_PRI53_SHIFT                  0u
#define S32_NVIC_IP_PRI53_WIDTH                  8u
#define S32_NVIC_IP_PRI53(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI53_SHIFT))&S32_NVIC_IP_PRI53_MASK)
#define S32_NVIC_IP_PRI54_MASK                   0xFFu
#define S32_NVIC_IP_PRI54_SHIFT                  0u
#define S32_NVIC_IP_PRI54_WIDTH                  8u
#define S32_NVIC_IP_PRI54(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI54_SHIFT))&S32_NVIC_IP_PRI54_MASK)
#define S32_NVIC_IP_PRI55_MASK                   0xFFu
#define S32_NVIC_IP_PRI55_SHIFT                  0u
#define S32_NVIC_IP_PRI55_WIDTH                  8u
#define S32_NVIC_IP_PRI55(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI55_SHIFT))&S32_NVIC_IP_PRI55_MASK)
#define S32_NVIC_IP_PRI56_MASK                   0xFFu
#define S32_NVIC_IP_PRI56_SHIFT                  0u
#define S32_NVIC_IP_PRI56_WIDTH                  8u
#define S32_NVIC_IP_PRI56(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI56_SHIFT))&S32_NVIC_IP_PRI56_MASK)
#define S32_NVIC_IP_PRI57_MASK                   0xFFu
#define S32_NVIC_IP_PRI57_SHIFT                  0u
#define S32_NVIC_IP_PRI57_WIDTH                  8u
#define S32_NVIC_IP_PRI57(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI57_SHIFT))&S32_NVIC_IP_PRI57_MASK)
#define S32_NVIC_IP_PRI58_MASK                   0xFFu
#define S32_NVIC_IP_PRI58_SHIFT                  0u
#define S32_NVIC_IP_PRI58_WIDTH                  8u
#define S32_NVIC_IP_PRI58(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI58_SHIFT))&S32_NVIC_IP_PRI58_MASK)
#define S32_NVIC_IP_PRI59_MASK                   0xFFu
#define S32_NVIC_IP_PRI59_SHIFT                  0u
#define S32_NVIC_IP_PRI59_WIDTH                  8u
#define S32_NVIC_IP_PRI59(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI59_SHIFT))&S32_NVIC_IP_PRI59_MASK)
#define S32_NVIC_IP_PRI60_MASK                   0xFFu
#define S32_NVIC_IP_PRI60_SHIFT                  0u
#define S32_NVIC_IP_PRI60_WIDTH                  8u
#define S32_NVIC_IP_PRI60(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI60_SHIFT))&S32_NVIC_IP_PRI60_MASK)
#define S32_NVIC_IP_PRI61_MASK                   0xFFu
#define S32_NVIC_IP_PRI61_SHIFT                  0u
#define S32_NVIC_IP_PRI61_WIDTH                  8u
#define S32_NVIC_IP_PRI61(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI61_SHIFT))&S32_NVIC_IP_PRI61_MASK)
#define S32_NVIC_IP_PRI62_MASK                   0xFFu
#define S32_NVIC_IP_PRI62_SHIFT                  0u
#define S32_NVIC_IP_PRI62_WIDTH                  8u
#define S32_NVIC_IP_PRI62(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI62_SHIFT))&S32_NVIC_IP_PRI62_MASK)
#define S32_NVIC_IP_PRI63_MASK                   0xFFu
#define S32_NVIC_IP_PRI63_SHIFT                  0u
#define S32_NVIC_IP_PRI63_WIDTH                  8u
#define S32_NVIC_IP_PRI63(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI63_SHIFT))&S32_NVIC_IP_PRI63_MASK)
#define S32_NVIC_IP_PRI64_MASK                   0xFFu
#define S32_NVIC_IP_PRI64_SHIFT                  0u
#define S32_NVIC_IP_PRI64_WIDTH                  8u
#define S32_NVIC_IP_PRI64(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI64_SHIFT))&S32_NVIC_IP_PRI64_MASK)
#define S32_NVIC_IP_PRI65_MASK                   0xFFu
#define S32_NVIC_IP_PRI65_SHIFT                  0u
#define S32_NVIC_IP_PRI65_WIDTH                  8u
#define S32_NVIC_IP_PRI65(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI65_SHIFT))&S32_NVIC_IP_PRI65_MASK)
#define S32_NVIC_IP_PRI66_MASK                   0xFFu
#define S32_NVIC_IP_PRI66_SHIFT                  0u
#define S32_NVIC_IP_PRI66_WIDTH                  8u
#define S32_NVIC_IP_PRI66(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI66_SHIFT))&S32_NVIC_IP_PRI66_MASK)
#define S32_NVIC_IP_PRI67_MASK                   0xFFu
#define S32_NVIC_IP_PRI67_SHIFT                  0u
#define S32_NVIC_IP_PRI67_WIDTH                  8u
#define S32_NVIC_IP_PRI67(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI67_SHIFT))&S32_NVIC_IP_PRI67_MASK)
#define S32_NVIC_IP_PRI68_MASK                   0xFFu
#define S32_NVIC_IP_PRI68_SHIFT                  0u
#define S32_NVIC_IP_PRI68_WIDTH                  8u
#define S32_NVIC_IP_PRI68(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI68_SHIFT))&S32_NVIC_IP_PRI68_MASK)
#define S32_NVIC_IP_PRI69_MASK                   0xFFu
#define S32_NVIC_IP_PRI69_SHIFT                  0u
#define S32_NVIC_IP_PRI69_WIDTH                  8u
#define S32_NVIC_IP_PRI69(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI69_SHIFT))&S32_NVIC_IP_PRI69_MASK)
#define S32_NVIC_IP_PRI70_MASK                   0xFFu
#define S32_NVIC_IP_PRI70_SHIFT                  0u
#define S32_NVIC_IP_PRI70_WIDTH                  8u
#define S32_NVIC_IP_PRI70(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI70_SHIFT))&S32_NVIC_IP_PRI70_MASK)
#define S32_NVIC_IP_PRI71_MASK                   0xFFu
#define S32_NVIC_IP_PRI71_SHIFT                  0u
#define S32_NVIC_IP_PRI71_WIDTH                  8u
#define S32_NVIC_IP_PRI71(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI71_SHIFT))&S32_NVIC_IP_PRI71_MASK)
#define S32_NVIC_IP_PRI72_MASK                   0xFFu
#define S32_NVIC_IP_PRI72_SHIFT                  0u
#define S32_NVIC_IP_PRI72_WIDTH                  8u
#define S32_NVIC_IP_PRI72(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI72_SHIFT))&S32_NVIC_IP_PRI72_MASK)
#define S32_NVIC_IP_PRI73_MASK                   0xFFu
#define S32_NVIC_IP_PRI73_SHIFT                  0u
#define S32_NVIC_IP_PRI73_WIDTH                  8u
#define S32_NVIC_IP_PRI73(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI73_SHIFT))&S32_NVIC_IP_PRI73_MASK)
#define S32_NVIC_IP_PRI74_MASK                   0xFFu
#define S32_NVIC_IP_PRI74_SHIFT                  0u
#define S32_NVIC_IP_PRI74_WIDTH                  8u
#define S32_NVIC_IP_PRI74(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI74_SHIFT))&S32_NVIC_IP_PRI74_MASK)
#define S32_NVIC_IP_PRI75_MASK                   0xFFu
#define S32_NVIC_IP_PRI75_SHIFT                  0u
#define S32_NVIC_IP_PRI75_WIDTH                  8u
#define S32_NVIC_IP_PRI75(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI75_SHIFT))&S32_NVIC_IP_PRI75_MASK)
#define S32_NVIC_IP_PRI76_MASK                   0xFFu
#define S32_NVIC_IP_PRI76_SHIFT                  0u
#define S32_NVIC_IP_PRI76_WIDTH                  8u
#define S32_NVIC_IP_PRI76(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI76_SHIFT))&S32_NVIC_IP_PRI76_MASK)
#define S32_NVIC_IP_PRI77_MASK                   0xFFu
#define S32_NVIC_IP_PRI77_SHIFT                  0u
#define S32_NVIC_IP_PRI77_WIDTH                  8u
#define S32_NVIC_IP_PRI77(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI77_SHIFT))&S32_NVIC_IP_PRI77_MASK)
#define S32_NVIC_IP_PRI78_MASK                   0xFFu
#define S32_NVIC_IP_PRI78_SHIFT                  0u
#define S32_NVIC_IP_PRI78_WIDTH                  8u
#define S32_NVIC_IP_PRI78(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI78_SHIFT))&S32_NVIC_IP_PRI78_MASK)
#define S32_NVIC_IP_PRI79_MASK                   0xFFu
#define S32_NVIC_IP_PRI79_SHIFT                  0u
#define S32_NVIC_IP_PRI79_WIDTH                  8u
#define S32_NVIC_IP_PRI79(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI79_SHIFT))&S32_NVIC_IP_PRI79_MASK)
#define S32_NVIC_IP_PRI80_MASK                   0xFFu
#define S32_NVIC_IP_PRI80_SHIFT                  0u
#define S32_NVIC_IP_PRI80_WIDTH                  8u
#define S32_NVIC_IP_PRI80(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI80_SHIFT))&S32_NVIC_IP_PRI80_MASK)
#define S32_NVIC_IP_PRI81_MASK                   0xFFu
#define S32_NVIC_IP_PRI81_SHIFT                  0u
#define S32_NVIC_IP_PRI81_WIDTH                  8u
#define S32_NVIC_IP_PRI81(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI81_SHIFT))&S32_NVIC_IP_PRI81_MASK)
#define S32_NVIC_IP_PRI82_MASK                   0xFFu
#define S32_NVIC_IP_PRI82_SHIFT                  0u
#define S32_NVIC_IP_PRI82_WIDTH                  8u
#define S32_NVIC_IP_PRI82(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI82_SHIFT))&S32_NVIC_IP_PRI82_MASK)
#define S32_NVIC_IP_PRI83_MASK                   0xFFu
#define S32_NVIC_IP_PRI83_SHIFT                  0u
#define S32_NVIC_IP_PRI83_WIDTH                  8u
#define S32_NVIC_IP_PRI83(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI83_SHIFT))&S32_NVIC_IP_PRI83_MASK)
#define S32_NVIC_IP_PRI84_MASK                   0xFFu
#define S32_NVIC_IP_PRI84_SHIFT                  0u
#define S32_NVIC_IP_PRI84_WIDTH                  8u
#define S32_NVIC_IP_PRI84(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI84_SHIFT))&S32_NVIC_IP_PRI84_MASK)
#define S32_NVIC_IP_PRI85_MASK                   0xFFu
#define S32_NVIC_IP_PRI85_SHIFT                  0u
#define S32_NVIC_IP_PRI85_WIDTH                  8u
#define S32_NVIC_IP_PRI85(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI85_SHIFT))&S32_NVIC_IP_PRI85_MASK)
#define S32_NVIC_IP_PRI86_MASK                   0xFFu
#define S32_NVIC_IP_PRI86_SHIFT                  0u
#define S32_NVIC_IP_PRI86_WIDTH                  8u
#define S32_NVIC_IP_PRI86(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI86_SHIFT))&S32_NVIC_IP_PRI86_MASK)
#define S32_NVIC_IP_PRI87_MASK                   0xFFu
#define S32_NVIC_IP_PRI87_SHIFT                  0u
#define S32_NVIC_IP_PRI87_WIDTH                  8u
#define S32_NVIC_IP_PRI87(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI87_SHIFT))&S32_NVIC_IP_PRI87_MASK)
#define S32_NVIC_IP_PRI88_MASK                   0xFFu
#define S32_NVIC_IP_PRI88_SHIFT                  0u
#define S32_NVIC_IP_PRI88_WIDTH                  8u
#define S32_NVIC_IP_PRI88(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI88_SHIFT))&S32_NVIC_IP_PRI88_MASK)
#define S32_NVIC_IP_PRI89_MASK                   0xFFu
#define S32_NVIC_IP_PRI89_SHIFT                  0u
#define S32_NVIC_IP_PRI89_WIDTH                  8u
#define S32_NVIC_IP_PRI89(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI89_SHIFT))&S32_NVIC_IP_PRI89_MASK)
#define S32_NVIC_IP_PRI90_MASK                   0xFFu
#define S32_NVIC_IP_PRI90_SHIFT                  0u
#define S32_NVIC_IP_PRI90_WIDTH                  8u
#define S32_NVIC_IP_PRI90(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI90_SHIFT))&S32_NVIC_IP_PRI90_MASK)
#define S32_NVIC_IP_PRI91_MASK                   0xFFu
#define S32_NVIC_IP_PRI91_SHIFT                  0u
#define S32_NVIC_IP_PRI91_WIDTH                  8u
#define S32_NVIC_IP_PRI91(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI91_SHIFT))&S32_NVIC_IP_PRI91_MASK)
#define S32_NVIC_IP_PRI92_MASK                   0xFFu
#define S32_NVIC_IP_PRI92_SHIFT                  0u
#define S32_NVIC_IP_PRI92_WIDTH                  8u
#define S32_NVIC_IP_PRI92(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI92_SHIFT))&S32_NVIC_IP_PRI92_MASK)
#define S32_NVIC_IP_PRI93_MASK                   0xFFu
#define S32_NVIC_IP_PRI93_SHIFT                  0u
#define S32_NVIC_IP_PRI93_WIDTH                  8u
#define S32_NVIC_IP_PRI93(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI93_SHIFT))&S32_NVIC_IP_PRI93_MASK)
#define S32_NVIC_IP_PRI94_MASK                   0xFFu
#define S32_NVIC_IP_PRI94_SHIFT                  0u
#define S32_NVIC_IP_PRI94_WIDTH                  8u
#define S32_NVIC_IP_PRI94(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI94_SHIFT))&S32_NVIC_IP_PRI94_MASK)
#define S32_NVIC_IP_PRI95_MASK                   0xFFu
#define S32_NVIC_IP_PRI95_SHIFT                  0u
#define S32_NVIC_IP_PRI95_WIDTH                  8u
#define S32_NVIC_IP_PRI95(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI95_SHIFT))&S32_NVIC_IP_PRI95_MASK)
#define S32_NVIC_IP_PRI96_MASK                   0xFFu
#define S32_NVIC_IP_PRI96_SHIFT                  0u
#define S32_NVIC_IP_PRI96_WIDTH                  8u
#define S32_NVIC_IP_PRI96(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI96_SHIFT))&S32_NVIC_IP_PRI96_MASK)
#define S32_NVIC_IP_PRI97_MASK                   0xFFu
#define S32_NVIC_IP_PRI97_SHIFT                  0u
#define S32_NVIC_IP_PRI97_WIDTH                  8u
#define S32_NVIC_IP_PRI97(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI97_SHIFT))&S32_NVIC_IP_PRI97_MASK)
#define S32_NVIC_IP_PRI98_MASK                   0xFFu
#define S32_NVIC_IP_PRI98_SHIFT                  0u
#define S32_NVIC_IP_PRI98_WIDTH                  8u
#define S32_NVIC_IP_PRI98(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI98_SHIFT))&S32_NVIC_IP_PRI98_MASK)
#define S32_NVIC_IP_PRI99_MASK                   0xFFu
#define S32_NVIC_IP_PRI99_SHIFT                  0u
#define S32_NVIC_IP_PRI99_WIDTH                  8u
#define S32_NVIC_IP_PRI99(x)                     (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI99_SHIFT))&S32_NVIC_IP_PRI99_MASK)
#define S32_NVIC_IP_PRI100_MASK                  0xFFu
#define S32_NVIC_IP_PRI100_SHIFT                 0u
#define S32_NVIC_IP_PRI100_WIDTH                 8u
#define S32_NVIC_IP_PRI100(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI100_SHIFT))&S32_NVIC_IP_PRI100_MASK)
#define S32_NVIC_IP_PRI101_MASK                  0xFFu
#define S32_NVIC_IP_PRI101_SHIFT                 0u
#define S32_NVIC_IP_PRI101_WIDTH                 8u
#define S32_NVIC_IP_PRI101(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI101_SHIFT))&S32_NVIC_IP_PRI101_MASK)
#define S32_NVIC_IP_PRI102_MASK                  0xFFu
#define S32_NVIC_IP_PRI102_SHIFT                 0u
#define S32_NVIC_IP_PRI102_WIDTH                 8u
#define S32_NVIC_IP_PRI102(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI102_SHIFT))&S32_NVIC_IP_PRI102_MASK)
#define S32_NVIC_IP_PRI103_MASK                  0xFFu
#define S32_NVIC_IP_PRI103_SHIFT                 0u
#define S32_NVIC_IP_PRI103_WIDTH                 8u
#define S32_NVIC_IP_PRI103(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI103_SHIFT))&S32_NVIC_IP_PRI103_MASK)
#define S32_NVIC_IP_PRI104_MASK                  0xFFu
#define S32_NVIC_IP_PRI104_SHIFT                 0u
#define S32_NVIC_IP_PRI104_WIDTH                 8u
#define S32_NVIC_IP_PRI104(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI104_SHIFT))&S32_NVIC_IP_PRI104_MASK)
#define S32_NVIC_IP_PRI105_MASK                  0xFFu
#define S32_NVIC_IP_PRI105_SHIFT                 0u
#define S32_NVIC_IP_PRI105_WIDTH                 8u
#define S32_NVIC_IP_PRI105(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI105_SHIFT))&S32_NVIC_IP_PRI105_MASK)
#define S32_NVIC_IP_PRI106_MASK                  0xFFu
#define S32_NVIC_IP_PRI106_SHIFT                 0u
#define S32_NVIC_IP_PRI106_WIDTH                 8u
#define S32_NVIC_IP_PRI106(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI106_SHIFT))&S32_NVIC_IP_PRI106_MASK)
#define S32_NVIC_IP_PRI107_MASK                  0xFFu
#define S32_NVIC_IP_PRI107_SHIFT                 0u
#define S32_NVIC_IP_PRI107_WIDTH                 8u
#define S32_NVIC_IP_PRI107(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI107_SHIFT))&S32_NVIC_IP_PRI107_MASK)
#define S32_NVIC_IP_PRI108_MASK                  0xFFu
#define S32_NVIC_IP_PRI108_SHIFT                 0u
#define S32_NVIC_IP_PRI108_WIDTH                 8u
#define S32_NVIC_IP_PRI108(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI108_SHIFT))&S32_NVIC_IP_PRI108_MASK)
#define S32_NVIC_IP_PRI109_MASK                  0xFFu
#define S32_NVIC_IP_PRI109_SHIFT                 0u
#define S32_NVIC_IP_PRI109_WIDTH                 8u
#define S32_NVIC_IP_PRI109(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI109_SHIFT))&S32_NVIC_IP_PRI109_MASK)
#define S32_NVIC_IP_PRI110_MASK                  0xFFu
#define S32_NVIC_IP_PRI110_SHIFT                 0u
#define S32_NVIC_IP_PRI110_WIDTH                 8u
#define S32_NVIC_IP_PRI110(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI110_SHIFT))&S32_NVIC_IP_PRI110_MASK)
#define S32_NVIC_IP_PRI111_MASK                  0xFFu
#define S32_NVIC_IP_PRI111_SHIFT                 0u
#define S32_NVIC_IP_PRI111_WIDTH                 8u
#define S32_NVIC_IP_PRI111(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI111_SHIFT))&S32_NVIC_IP_PRI111_MASK)
#define S32_NVIC_IP_PRI112_MASK                  0xFFu
#define S32_NVIC_IP_PRI112_SHIFT                 0u
#define S32_NVIC_IP_PRI112_WIDTH                 8u
#define S32_NVIC_IP_PRI112(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI112_SHIFT))&S32_NVIC_IP_PRI112_MASK)
#define S32_NVIC_IP_PRI113_MASK                  0xFFu
#define S32_NVIC_IP_PRI113_SHIFT                 0u
#define S32_NVIC_IP_PRI113_WIDTH                 8u
#define S32_NVIC_IP_PRI113(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI113_SHIFT))&S32_NVIC_IP_PRI113_MASK)
#define S32_NVIC_IP_PRI114_MASK                  0xFFu
#define S32_NVIC_IP_PRI114_SHIFT                 0u
#define S32_NVIC_IP_PRI114_WIDTH                 8u
#define S32_NVIC_IP_PRI114(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI114_SHIFT))&S32_NVIC_IP_PRI114_MASK)
#define S32_NVIC_IP_PRI115_MASK                  0xFFu
#define S32_NVIC_IP_PRI115_SHIFT                 0u
#define S32_NVIC_IP_PRI115_WIDTH                 8u
#define S32_NVIC_IP_PRI115(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI115_SHIFT))&S32_NVIC_IP_PRI115_MASK)
#define S32_NVIC_IP_PRI116_MASK                  0xFFu
#define S32_NVIC_IP_PRI116_SHIFT                 0u
#define S32_NVIC_IP_PRI116_WIDTH                 8u
#define S32_NVIC_IP_PRI116(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI116_SHIFT))&S32_NVIC_IP_PRI116_MASK)
#define S32_NVIC_IP_PRI117_MASK                  0xFFu
#define S32_NVIC_IP_PRI117_SHIFT                 0u
#define S32_NVIC_IP_PRI117_WIDTH                 8u
#define S32_NVIC_IP_PRI117(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI117_SHIFT))&S32_NVIC_IP_PRI117_MASK)
#define S32_NVIC_IP_PRI118_MASK                  0xFFu
#define S32_NVIC_IP_PRI118_SHIFT                 0u
#define S32_NVIC_IP_PRI118_WIDTH                 8u
#define S32_NVIC_IP_PRI118(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI118_SHIFT))&S32_NVIC_IP_PRI118_MASK)
#define S32_NVIC_IP_PRI119_MASK                  0xFFu
#define S32_NVIC_IP_PRI119_SHIFT                 0u
#define S32_NVIC_IP_PRI119_WIDTH                 8u
#define S32_NVIC_IP_PRI119(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI119_SHIFT))&S32_NVIC_IP_PRI119_MASK)
#define S32_NVIC_IP_PRI120_MASK                  0xFFu
#define S32_NVIC_IP_PRI120_SHIFT                 0u
#define S32_NVIC_IP_PRI120_WIDTH                 8u
#define S32_NVIC_IP_PRI120(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI120_SHIFT))&S32_NVIC_IP_PRI120_MASK)
#define S32_NVIC_IP_PRI121_MASK                  0xFFu
#define S32_NVIC_IP_PRI121_SHIFT                 0u
#define S32_NVIC_IP_PRI121_WIDTH                 8u
#define S32_NVIC_IP_PRI121(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI121_SHIFT))&S32_NVIC_IP_PRI121_MASK)
#define S32_NVIC_IP_PRI122_MASK                  0xFFu
#define S32_NVIC_IP_PRI122_SHIFT                 0u
#define S32_NVIC_IP_PRI122_WIDTH                 8u
#define S32_NVIC_IP_PRI122(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI122_SHIFT))&S32_NVIC_IP_PRI122_MASK)
#define S32_NVIC_IP_PRI123_MASK                  0xFFu
#define S32_NVIC_IP_PRI123_SHIFT                 0u
#define S32_NVIC_IP_PRI123_WIDTH                 8u
#define S32_NVIC_IP_PRI123(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI123_SHIFT))&S32_NVIC_IP_PRI123_MASK)
#define S32_NVIC_IP_PRI124_MASK                  0xFFu
#define S32_NVIC_IP_PRI124_SHIFT                 0u
#define S32_NVIC_IP_PRI124_WIDTH                 8u
#define S32_NVIC_IP_PRI124(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI124_SHIFT))&S32_NVIC_IP_PRI124_MASK)
#define S32_NVIC_IP_PRI125_MASK                  0xFFu
#define S32_NVIC_IP_PRI125_SHIFT                 0u
#define S32_NVIC_IP_PRI125_WIDTH                 8u
#define S32_NVIC_IP_PRI125(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI125_SHIFT))&S32_NVIC_IP_PRI125_MASK)
#define S32_NVIC_IP_PRI126_MASK                  0xFFu
#define S32_NVIC_IP_PRI126_SHIFT                 0u
#define S32_NVIC_IP_PRI126_WIDTH                 8u
#define S32_NVIC_IP_PRI126(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI126_SHIFT))&S32_NVIC_IP_PRI126_MASK)
#define S32_NVIC_IP_PRI127_MASK                  0xFFu
#define S32_NVIC_IP_PRI127_SHIFT                 0u
#define S32_NVIC_IP_PRI127_WIDTH                 8u
#define S32_NVIC_IP_PRI127(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI127_SHIFT))&S32_NVIC_IP_PRI127_MASK)
#define S32_NVIC_IP_PRI128_MASK                  0xFFu
#define S32_NVIC_IP_PRI128_SHIFT                 0u
#define S32_NVIC_IP_PRI128_WIDTH                 8u
#define S32_NVIC_IP_PRI128(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI128_SHIFT))&S32_NVIC_IP_PRI128_MASK)
#define S32_NVIC_IP_PRI129_MASK                  0xFFu
#define S32_NVIC_IP_PRI129_SHIFT                 0u
#define S32_NVIC_IP_PRI129_WIDTH                 8u
#define S32_NVIC_IP_PRI129(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI129_SHIFT))&S32_NVIC_IP_PRI129_MASK)
#define S32_NVIC_IP_PRI130_MASK                  0xFFu
#define S32_NVIC_IP_PRI130_SHIFT                 0u
#define S32_NVIC_IP_PRI130_WIDTH                 8u
#define S32_NVIC_IP_PRI130(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI130_SHIFT))&S32_NVIC_IP_PRI130_MASK)
#define S32_NVIC_IP_PRI131_MASK                  0xFFu
#define S32_NVIC_IP_PRI131_SHIFT                 0u
#define S32_NVIC_IP_PRI131_WIDTH                 8u
#define S32_NVIC_IP_PRI131(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI131_SHIFT))&S32_NVIC_IP_PRI131_MASK)
#define S32_NVIC_IP_PRI132_MASK                  0xFFu
#define S32_NVIC_IP_PRI132_SHIFT                 0u
#define S32_NVIC_IP_PRI132_WIDTH                 8u
#define S32_NVIC_IP_PRI132(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI132_SHIFT))&S32_NVIC_IP_PRI132_MASK)
#define S32_NVIC_IP_PRI133_MASK                  0xFFu
#define S32_NVIC_IP_PRI133_SHIFT                 0u
#define S32_NVIC_IP_PRI133_WIDTH                 8u
#define S32_NVIC_IP_PRI133(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI133_SHIFT))&S32_NVIC_IP_PRI133_MASK)
#define S32_NVIC_IP_PRI134_MASK                  0xFFu
#define S32_NVIC_IP_PRI134_SHIFT                 0u
#define S32_NVIC_IP_PRI134_WIDTH                 8u
#define S32_NVIC_IP_PRI134(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI134_SHIFT))&S32_NVIC_IP_PRI134_MASK)
#define S32_NVIC_IP_PRI135_MASK                  0xFFu
#define S32_NVIC_IP_PRI135_SHIFT                 0u
#define S32_NVIC_IP_PRI135_WIDTH                 8u
#define S32_NVIC_IP_PRI135(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI135_SHIFT))&S32_NVIC_IP_PRI135_MASK)
#define S32_NVIC_IP_PRI136_MASK                  0xFFu
#define S32_NVIC_IP_PRI136_SHIFT                 0u
#define S32_NVIC_IP_PRI136_WIDTH                 8u
#define S32_NVIC_IP_PRI136(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI136_SHIFT))&S32_NVIC_IP_PRI136_MASK)
#define S32_NVIC_IP_PRI137_MASK                  0xFFu
#define S32_NVIC_IP_PRI137_SHIFT                 0u
#define S32_NVIC_IP_PRI137_WIDTH                 8u
#define S32_NVIC_IP_PRI137(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI137_SHIFT))&S32_NVIC_IP_PRI137_MASK)
#define S32_NVIC_IP_PRI138_MASK                  0xFFu
#define S32_NVIC_IP_PRI138_SHIFT                 0u
#define S32_NVIC_IP_PRI138_WIDTH                 8u
#define S32_NVIC_IP_PRI138(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI138_SHIFT))&S32_NVIC_IP_PRI138_MASK)
#define S32_NVIC_IP_PRI139_MASK                  0xFFu
#define S32_NVIC_IP_PRI139_SHIFT                 0u
#define S32_NVIC_IP_PRI139_WIDTH                 8u
#define S32_NVIC_IP_PRI139(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI139_SHIFT))&S32_NVIC_IP_PRI139_MASK)
#define S32_NVIC_IP_PRI140_MASK                  0xFFu
#define S32_NVIC_IP_PRI140_SHIFT                 0u
#define S32_NVIC_IP_PRI140_WIDTH                 8u
#define S32_NVIC_IP_PRI140(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI140_SHIFT))&S32_NVIC_IP_PRI140_MASK)
#define S32_NVIC_IP_PRI141_MASK                  0xFFu
#define S32_NVIC_IP_PRI141_SHIFT                 0u
#define S32_NVIC_IP_PRI141_WIDTH                 8u
#define S32_NVIC_IP_PRI141(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI141_SHIFT))&S32_NVIC_IP_PRI141_MASK)
#define S32_NVIC_IP_PRI142_MASK                  0xFFu
#define S32_NVIC_IP_PRI142_SHIFT                 0u
#define S32_NVIC_IP_PRI142_WIDTH                 8u
#define S32_NVIC_IP_PRI142(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI142_SHIFT))&S32_NVIC_IP_PRI142_MASK)
#define S32_NVIC_IP_PRI143_MASK                  0xFFu
#define S32_NVIC_IP_PRI143_SHIFT                 0u
#define S32_NVIC_IP_PRI143_WIDTH                 8u
#define S32_NVIC_IP_PRI143(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI143_SHIFT))&S32_NVIC_IP_PRI143_MASK)
#define S32_NVIC_IP_PRI144_MASK                  0xFFu
#define S32_NVIC_IP_PRI144_SHIFT                 0u
#define S32_NVIC_IP_PRI144_WIDTH                 8u
#define S32_NVIC_IP_PRI144(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI144_SHIFT))&S32_NVIC_IP_PRI144_MASK)
#define S32_NVIC_IP_PRI145_MASK                  0xFFu
#define S32_NVIC_IP_PRI145_SHIFT                 0u
#define S32_NVIC_IP_PRI145_WIDTH                 8u
#define S32_NVIC_IP_PRI145(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI145_SHIFT))&S32_NVIC_IP_PRI145_MASK)
#define S32_NVIC_IP_PRI146_MASK                  0xFFu
#define S32_NVIC_IP_PRI146_SHIFT                 0u
#define S32_NVIC_IP_PRI146_WIDTH                 8u
#define S32_NVIC_IP_PRI146(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI146_SHIFT))&S32_NVIC_IP_PRI146_MASK)
#define S32_NVIC_IP_PRI147_MASK                  0xFFu
#define S32_NVIC_IP_PRI147_SHIFT                 0u
#define S32_NVIC_IP_PRI147_WIDTH                 8u
#define S32_NVIC_IP_PRI147(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI147_SHIFT))&S32_NVIC_IP_PRI147_MASK)
#define S32_NVIC_IP_PRI148_MASK                  0xFFu
#define S32_NVIC_IP_PRI148_SHIFT                 0u
#define S32_NVIC_IP_PRI148_WIDTH                 8u
#define S32_NVIC_IP_PRI148(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI148_SHIFT))&S32_NVIC_IP_PRI148_MASK)
#define S32_NVIC_IP_PRI149_MASK                  0xFFu
#define S32_NVIC_IP_PRI149_SHIFT                 0u
#define S32_NVIC_IP_PRI149_WIDTH                 8u
#define S32_NVIC_IP_PRI149(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI149_SHIFT))&S32_NVIC_IP_PRI149_MASK)
#define S32_NVIC_IP_PRI150_MASK                  0xFFu
#define S32_NVIC_IP_PRI150_SHIFT                 0u
#define S32_NVIC_IP_PRI150_WIDTH                 8u
#define S32_NVIC_IP_PRI150(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI150_SHIFT))&S32_NVIC_IP_PRI150_MASK)
#define S32_NVIC_IP_PRI151_MASK                  0xFFu
#define S32_NVIC_IP_PRI151_SHIFT                 0u
#define S32_NVIC_IP_PRI151_WIDTH                 8u
#define S32_NVIC_IP_PRI151(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI151_SHIFT))&S32_NVIC_IP_PRI151_MASK)
#define S32_NVIC_IP_PRI152_MASK                  0xFFu
#define S32_NVIC_IP_PRI152_SHIFT                 0u
#define S32_NVIC_IP_PRI152_WIDTH                 8u
#define S32_NVIC_IP_PRI152(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI152_SHIFT))&S32_NVIC_IP_PRI152_MASK)
#define S32_NVIC_IP_PRI153_MASK                  0xFFu
#define S32_NVIC_IP_PRI153_SHIFT                 0u
#define S32_NVIC_IP_PRI153_WIDTH                 8u
#define S32_NVIC_IP_PRI153(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI153_SHIFT))&S32_NVIC_IP_PRI153_MASK)
#define S32_NVIC_IP_PRI154_MASK                  0xFFu
#define S32_NVIC_IP_PRI154_SHIFT                 0u
#define S32_NVIC_IP_PRI154_WIDTH                 8u
#define S32_NVIC_IP_PRI154(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI154_SHIFT))&S32_NVIC_IP_PRI154_MASK)
#define S32_NVIC_IP_PRI155_MASK                  0xFFu
#define S32_NVIC_IP_PRI155_SHIFT                 0u
#define S32_NVIC_IP_PRI155_WIDTH                 8u
#define S32_NVIC_IP_PRI155(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI155_SHIFT))&S32_NVIC_IP_PRI155_MASK)
#define S32_NVIC_IP_PRI156_MASK                  0xFFu
#define S32_NVIC_IP_PRI156_SHIFT                 0u
#define S32_NVIC_IP_PRI156_WIDTH                 8u
#define S32_NVIC_IP_PRI156(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI156_SHIFT))&S32_NVIC_IP_PRI156_MASK)
#define S32_NVIC_IP_PRI157_MASK                  0xFFu
#define S32_NVIC_IP_PRI157_SHIFT                 0u
#define S32_NVIC_IP_PRI157_WIDTH                 8u
#define S32_NVIC_IP_PRI157(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI157_SHIFT))&S32_NVIC_IP_PRI157_MASK)
#define S32_NVIC_IP_PRI158_MASK                  0xFFu
#define S32_NVIC_IP_PRI158_SHIFT                 0u
#define S32_NVIC_IP_PRI158_WIDTH                 8u
#define S32_NVIC_IP_PRI158(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI158_SHIFT))&S32_NVIC_IP_PRI158_MASK)
#define S32_NVIC_IP_PRI159_MASK                  0xFFu
#define S32_NVIC_IP_PRI159_SHIFT                 0u
#define S32_NVIC_IP_PRI159_WIDTH                 8u
#define S32_NVIC_IP_PRI159(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI159_SHIFT))&S32_NVIC_IP_PRI159_MASK)
#define S32_NVIC_IP_PRI160_MASK                  0xFFu
#define S32_NVIC_IP_PRI160_SHIFT                 0u
#define S32_NVIC_IP_PRI160_WIDTH                 8u
#define S32_NVIC_IP_PRI160(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI160_SHIFT))&S32_NVIC_IP_PRI160_MASK)
#define S32_NVIC_IP_PRI161_MASK                  0xFFu
#define S32_NVIC_IP_PRI161_SHIFT                 0u
#define S32_NVIC_IP_PRI161_WIDTH                 8u
#define S32_NVIC_IP_PRI161(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI161_SHIFT))&S32_NVIC_IP_PRI161_MASK)
#define S32_NVIC_IP_PRI162_MASK                  0xFFu
#define S32_NVIC_IP_PRI162_SHIFT                 0u
#define S32_NVIC_IP_PRI162_WIDTH                 8u
#define S32_NVIC_IP_PRI162(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI162_SHIFT))&S32_NVIC_IP_PRI162_MASK)
#define S32_NVIC_IP_PRI163_MASK                  0xFFu
#define S32_NVIC_IP_PRI163_SHIFT                 0u
#define S32_NVIC_IP_PRI163_WIDTH                 8u
#define S32_NVIC_IP_PRI163(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI163_SHIFT))&S32_NVIC_IP_PRI163_MASK)
#define S32_NVIC_IP_PRI164_MASK                  0xFFu
#define S32_NVIC_IP_PRI164_SHIFT                 0u
#define S32_NVIC_IP_PRI164_WIDTH                 8u
#define S32_NVIC_IP_PRI164(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI164_SHIFT))&S32_NVIC_IP_PRI164_MASK)
#define S32_NVIC_IP_PRI165_MASK                  0xFFu
#define S32_NVIC_IP_PRI165_SHIFT                 0u
#define S32_NVIC_IP_PRI165_WIDTH                 8u
#define S32_NVIC_IP_PRI165(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI165_SHIFT))&S32_NVIC_IP_PRI165_MASK)
#define S32_NVIC_IP_PRI166_MASK                  0xFFu
#define S32_NVIC_IP_PRI166_SHIFT                 0u
#define S32_NVIC_IP_PRI166_WIDTH                 8u
#define S32_NVIC_IP_PRI166(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI166_SHIFT))&S32_NVIC_IP_PRI166_MASK)
#define S32_NVIC_IP_PRI167_MASK                  0xFFu
#define S32_NVIC_IP_PRI167_SHIFT                 0u
#define S32_NVIC_IP_PRI167_WIDTH                 8u
#define S32_NVIC_IP_PRI167(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI167_SHIFT))&S32_NVIC_IP_PRI167_MASK)
#define S32_NVIC_IP_PRI168_MASK                  0xFFu
#define S32_NVIC_IP_PRI168_SHIFT                 0u
#define S32_NVIC_IP_PRI168_WIDTH                 8u
#define S32_NVIC_IP_PRI168(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI168_SHIFT))&S32_NVIC_IP_PRI168_MASK)
#define S32_NVIC_IP_PRI169_MASK                  0xFFu
#define S32_NVIC_IP_PRI169_SHIFT                 0u
#define S32_NVIC_IP_PRI169_WIDTH                 8u
#define S32_NVIC_IP_PRI169(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI169_SHIFT))&S32_NVIC_IP_PRI169_MASK)
#define S32_NVIC_IP_PRI170_MASK                  0xFFu
#define S32_NVIC_IP_PRI170_SHIFT                 0u
#define S32_NVIC_IP_PRI170_WIDTH                 8u
#define S32_NVIC_IP_PRI170(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI170_SHIFT))&S32_NVIC_IP_PRI170_MASK)
#define S32_NVIC_IP_PRI171_MASK                  0xFFu
#define S32_NVIC_IP_PRI171_SHIFT                 0u
#define S32_NVIC_IP_PRI171_WIDTH                 8u
#define S32_NVIC_IP_PRI171(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI171_SHIFT))&S32_NVIC_IP_PRI171_MASK)
#define S32_NVIC_IP_PRI172_MASK                  0xFFu
#define S32_NVIC_IP_PRI172_SHIFT                 0u
#define S32_NVIC_IP_PRI172_WIDTH                 8u
#define S32_NVIC_IP_PRI172(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI172_SHIFT))&S32_NVIC_IP_PRI172_MASK)
#define S32_NVIC_IP_PRI173_MASK                  0xFFu
#define S32_NVIC_IP_PRI173_SHIFT                 0u
#define S32_NVIC_IP_PRI173_WIDTH                 8u
#define S32_NVIC_IP_PRI173(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI173_SHIFT))&S32_NVIC_IP_PRI173_MASK)
#define S32_NVIC_IP_PRI174_MASK                  0xFFu
#define S32_NVIC_IP_PRI174_SHIFT                 0u
#define S32_NVIC_IP_PRI174_WIDTH                 8u
#define S32_NVIC_IP_PRI174(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI174_SHIFT))&S32_NVIC_IP_PRI174_MASK)
#define S32_NVIC_IP_PRI175_MASK                  0xFFu
#define S32_NVIC_IP_PRI175_SHIFT                 0u
#define S32_NVIC_IP_PRI175_WIDTH                 8u
#define S32_NVIC_IP_PRI175(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI175_SHIFT))&S32_NVIC_IP_PRI175_MASK)
#define S32_NVIC_IP_PRI176_MASK                  0xFFu
#define S32_NVIC_IP_PRI176_SHIFT                 0u
#define S32_NVIC_IP_PRI176_WIDTH                 8u
#define S32_NVIC_IP_PRI176(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI176_SHIFT))&S32_NVIC_IP_PRI176_MASK)
#define S32_NVIC_IP_PRI177_MASK                  0xFFu
#define S32_NVIC_IP_PRI177_SHIFT                 0u
#define S32_NVIC_IP_PRI177_WIDTH                 8u
#define S32_NVIC_IP_PRI177(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI177_SHIFT))&S32_NVIC_IP_PRI177_MASK)
#define S32_NVIC_IP_PRI178_MASK                  0xFFu
#define S32_NVIC_IP_PRI178_SHIFT                 0u
#define S32_NVIC_IP_PRI178_WIDTH                 8u
#define S32_NVIC_IP_PRI178(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI178_SHIFT))&S32_NVIC_IP_PRI178_MASK)
#define S32_NVIC_IP_PRI179_MASK                  0xFFu
#define S32_NVIC_IP_PRI179_SHIFT                 0u
#define S32_NVIC_IP_PRI179_WIDTH                 8u
#define S32_NVIC_IP_PRI179(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI179_SHIFT))&S32_NVIC_IP_PRI179_MASK)
#define S32_NVIC_IP_PRI180_MASK                  0xFFu
#define S32_NVIC_IP_PRI180_SHIFT                 0u
#define S32_NVIC_IP_PRI180_WIDTH                 8u
#define S32_NVIC_IP_PRI180(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI180_SHIFT))&S32_NVIC_IP_PRI180_MASK)
#define S32_NVIC_IP_PRI181_MASK                  0xFFu
#define S32_NVIC_IP_PRI181_SHIFT                 0u
#define S32_NVIC_IP_PRI181_WIDTH                 8u
#define S32_NVIC_IP_PRI181(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI181_SHIFT))&S32_NVIC_IP_PRI181_MASK)
#define S32_NVIC_IP_PRI182_MASK                  0xFFu
#define S32_NVIC_IP_PRI182_SHIFT                 0u
#define S32_NVIC_IP_PRI182_WIDTH                 8u
#define S32_NVIC_IP_PRI182(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI182_SHIFT))&S32_NVIC_IP_PRI182_MASK)
#define S32_NVIC_IP_PRI183_MASK                  0xFFu
#define S32_NVIC_IP_PRI183_SHIFT                 0u
#define S32_NVIC_IP_PRI183_WIDTH                 8u
#define S32_NVIC_IP_PRI183(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI183_SHIFT))&S32_NVIC_IP_PRI183_MASK)
#define S32_NVIC_IP_PRI184_MASK                  0xFFu
#define S32_NVIC_IP_PRI184_SHIFT                 0u
#define S32_NVIC_IP_PRI184_WIDTH                 8u
#define S32_NVIC_IP_PRI184(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI184_SHIFT))&S32_NVIC_IP_PRI184_MASK)
#define S32_NVIC_IP_PRI185_MASK                  0xFFu
#define S32_NVIC_IP_PRI185_SHIFT                 0u
#define S32_NVIC_IP_PRI185_WIDTH                 8u
#define S32_NVIC_IP_PRI185(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI185_SHIFT))&S32_NVIC_IP_PRI185_MASK)
#define S32_NVIC_IP_PRI186_MASK                  0xFFu
#define S32_NVIC_IP_PRI186_SHIFT                 0u
#define S32_NVIC_IP_PRI186_WIDTH                 8u
#define S32_NVIC_IP_PRI186(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI186_SHIFT))&S32_NVIC_IP_PRI186_MASK)
#define S32_NVIC_IP_PRI187_MASK                  0xFFu
#define S32_NVIC_IP_PRI187_SHIFT                 0u
#define S32_NVIC_IP_PRI187_WIDTH                 8u
#define S32_NVIC_IP_PRI187(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI187_SHIFT))&S32_NVIC_IP_PRI187_MASK)
#define S32_NVIC_IP_PRI188_MASK                  0xFFu
#define S32_NVIC_IP_PRI188_SHIFT                 0u
#define S32_NVIC_IP_PRI188_WIDTH                 8u
#define S32_NVIC_IP_PRI188(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI188_SHIFT))&S32_NVIC_IP_PRI188_MASK)
#define S32_NVIC_IP_PRI189_MASK                  0xFFu
#define S32_NVIC_IP_PRI189_SHIFT                 0u
#define S32_NVIC_IP_PRI189_WIDTH                 8u
#define S32_NVIC_IP_PRI189(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI189_SHIFT))&S32_NVIC_IP_PRI189_MASK)
#define S32_NVIC_IP_PRI190_MASK                  0xFFu
#define S32_NVIC_IP_PRI190_SHIFT                 0u
#define S32_NVIC_IP_PRI190_WIDTH                 8u
#define S32_NVIC_IP_PRI190(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI190_SHIFT))&S32_NVIC_IP_PRI190_MASK)
#define S32_NVIC_IP_PRI191_MASK                  0xFFu
#define S32_NVIC_IP_PRI191_SHIFT                 0u
#define S32_NVIC_IP_PRI191_WIDTH                 8u
#define S32_NVIC_IP_PRI191(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI191_SHIFT))&S32_NVIC_IP_PRI191_MASK)
#define S32_NVIC_IP_PRI192_MASK                  0xFFu
#define S32_NVIC_IP_PRI192_SHIFT                 0u
#define S32_NVIC_IP_PRI192_WIDTH                 8u
#define S32_NVIC_IP_PRI192(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI192_SHIFT))&S32_NVIC_IP_PRI192_MASK)
#define S32_NVIC_IP_PRI193_MASK                  0xFFu
#define S32_NVIC_IP_PRI193_SHIFT                 0u
#define S32_NVIC_IP_PRI193_WIDTH                 8u
#define S32_NVIC_IP_PRI193(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI193_SHIFT))&S32_NVIC_IP_PRI193_MASK)
#define S32_NVIC_IP_PRI194_MASK                  0xFFu
#define S32_NVIC_IP_PRI194_SHIFT                 0u
#define S32_NVIC_IP_PRI194_WIDTH                 8u
#define S32_NVIC_IP_PRI194(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI194_SHIFT))&S32_NVIC_IP_PRI194_MASK)
#define S32_NVIC_IP_PRI195_MASK                  0xFFu
#define S32_NVIC_IP_PRI195_SHIFT                 0u
#define S32_NVIC_IP_PRI195_WIDTH                 8u
#define S32_NVIC_IP_PRI195(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI195_SHIFT))&S32_NVIC_IP_PRI195_MASK)
#define S32_NVIC_IP_PRI196_MASK                  0xFFu
#define S32_NVIC_IP_PRI196_SHIFT                 0u
#define S32_NVIC_IP_PRI196_WIDTH                 8u
#define S32_NVIC_IP_PRI196(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI196_SHIFT))&S32_NVIC_IP_PRI196_MASK)
#define S32_NVIC_IP_PRI197_MASK                  0xFFu
#define S32_NVIC_IP_PRI197_SHIFT                 0u
#define S32_NVIC_IP_PRI197_WIDTH                 8u
#define S32_NVIC_IP_PRI197(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI197_SHIFT))&S32_NVIC_IP_PRI197_MASK)
#define S32_NVIC_IP_PRI198_MASK                  0xFFu
#define S32_NVIC_IP_PRI198_SHIFT                 0u
#define S32_NVIC_IP_PRI198_WIDTH                 8u
#define S32_NVIC_IP_PRI198(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI198_SHIFT))&S32_NVIC_IP_PRI198_MASK)
#define S32_NVIC_IP_PRI199_MASK                  0xFFu
#define S32_NVIC_IP_PRI199_SHIFT                 0u
#define S32_NVIC_IP_PRI199_WIDTH                 8u
#define S32_NVIC_IP_PRI199(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI199_SHIFT))&S32_NVIC_IP_PRI199_MASK)
#define S32_NVIC_IP_PRI200_MASK                  0xFFu
#define S32_NVIC_IP_PRI200_SHIFT                 0u
#define S32_NVIC_IP_PRI200_WIDTH                 8u
#define S32_NVIC_IP_PRI200(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI200_SHIFT))&S32_NVIC_IP_PRI200_MASK)
#define S32_NVIC_IP_PRI201_MASK                  0xFFu
#define S32_NVIC_IP_PRI201_SHIFT                 0u
#define S32_NVIC_IP_PRI201_WIDTH                 8u
#define S32_NVIC_IP_PRI201(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI201_SHIFT))&S32_NVIC_IP_PRI201_MASK)
#define S32_NVIC_IP_PRI202_MASK                  0xFFu
#define S32_NVIC_IP_PRI202_SHIFT                 0u
#define S32_NVIC_IP_PRI202_WIDTH                 8u
#define S32_NVIC_IP_PRI202(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI202_SHIFT))&S32_NVIC_IP_PRI202_MASK)
#define S32_NVIC_IP_PRI203_MASK                  0xFFu
#define S32_NVIC_IP_PRI203_SHIFT                 0u
#define S32_NVIC_IP_PRI203_WIDTH                 8u
#define S32_NVIC_IP_PRI203(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI203_SHIFT))&S32_NVIC_IP_PRI203_MASK)
#define S32_NVIC_IP_PRI204_MASK                  0xFFu
#define S32_NVIC_IP_PRI204_SHIFT                 0u
#define S32_NVIC_IP_PRI204_WIDTH                 8u
#define S32_NVIC_IP_PRI204(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI204_SHIFT))&S32_NVIC_IP_PRI204_MASK)
#define S32_NVIC_IP_PRI205_MASK                  0xFFu
#define S32_NVIC_IP_PRI205_SHIFT                 0u
#define S32_NVIC_IP_PRI205_WIDTH                 8u
#define S32_NVIC_IP_PRI205(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI205_SHIFT))&S32_NVIC_IP_PRI205_MASK)
#define S32_NVIC_IP_PRI206_MASK                  0xFFu
#define S32_NVIC_IP_PRI206_SHIFT                 0u
#define S32_NVIC_IP_PRI206_WIDTH                 8u
#define S32_NVIC_IP_PRI206(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI206_SHIFT))&S32_NVIC_IP_PRI206_MASK)
#define S32_NVIC_IP_PRI207_MASK                  0xFFu
#define S32_NVIC_IP_PRI207_SHIFT                 0u
#define S32_NVIC_IP_PRI207_WIDTH                 8u
#define S32_NVIC_IP_PRI207(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI207_SHIFT))&S32_NVIC_IP_PRI207_MASK)
#define S32_NVIC_IP_PRI208_MASK                  0xFFu
#define S32_NVIC_IP_PRI208_SHIFT                 0u
#define S32_NVIC_IP_PRI208_WIDTH                 8u
#define S32_NVIC_IP_PRI208(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI208_SHIFT))&S32_NVIC_IP_PRI208_MASK)
#define S32_NVIC_IP_PRI209_MASK                  0xFFu
#define S32_NVIC_IP_PRI209_SHIFT                 0u
#define S32_NVIC_IP_PRI209_WIDTH                 8u
#define S32_NVIC_IP_PRI209(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI209_SHIFT))&S32_NVIC_IP_PRI209_MASK)
#define S32_NVIC_IP_PRI210_MASK                  0xFFu
#define S32_NVIC_IP_PRI210_SHIFT                 0u
#define S32_NVIC_IP_PRI210_WIDTH                 8u
#define S32_NVIC_IP_PRI210(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI210_SHIFT))&S32_NVIC_IP_PRI210_MASK)
#define S32_NVIC_IP_PRI211_MASK                  0xFFu
#define S32_NVIC_IP_PRI211_SHIFT                 0u
#define S32_NVIC_IP_PRI211_WIDTH                 8u
#define S32_NVIC_IP_PRI211(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI211_SHIFT))&S32_NVIC_IP_PRI211_MASK)
#define S32_NVIC_IP_PRI212_MASK                  0xFFu
#define S32_NVIC_IP_PRI212_SHIFT                 0u
#define S32_NVIC_IP_PRI212_WIDTH                 8u
#define S32_NVIC_IP_PRI212(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI212_SHIFT))&S32_NVIC_IP_PRI212_MASK)
#define S32_NVIC_IP_PRI213_MASK                  0xFFu
#define S32_NVIC_IP_PRI213_SHIFT                 0u
#define S32_NVIC_IP_PRI213_WIDTH                 8u
#define S32_NVIC_IP_PRI213(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI213_SHIFT))&S32_NVIC_IP_PRI213_MASK)
#define S32_NVIC_IP_PRI214_MASK                  0xFFu
#define S32_NVIC_IP_PRI214_SHIFT                 0u
#define S32_NVIC_IP_PRI214_WIDTH                 8u
#define S32_NVIC_IP_PRI214(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI214_SHIFT))&S32_NVIC_IP_PRI214_MASK)
#define S32_NVIC_IP_PRI215_MASK                  0xFFu
#define S32_NVIC_IP_PRI215_SHIFT                 0u
#define S32_NVIC_IP_PRI215_WIDTH                 8u
#define S32_NVIC_IP_PRI215(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI215_SHIFT))&S32_NVIC_IP_PRI215_MASK)
#define S32_NVIC_IP_PRI216_MASK                  0xFFu
#define S32_NVIC_IP_PRI216_SHIFT                 0u
#define S32_NVIC_IP_PRI216_WIDTH                 8u
#define S32_NVIC_IP_PRI216(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI216_SHIFT))&S32_NVIC_IP_PRI216_MASK)
#define S32_NVIC_IP_PRI217_MASK                  0xFFu
#define S32_NVIC_IP_PRI217_SHIFT                 0u
#define S32_NVIC_IP_PRI217_WIDTH                 8u
#define S32_NVIC_IP_PRI217(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI217_SHIFT))&S32_NVIC_IP_PRI217_MASK)
#define S32_NVIC_IP_PRI218_MASK                  0xFFu
#define S32_NVIC_IP_PRI218_SHIFT                 0u
#define S32_NVIC_IP_PRI218_WIDTH                 8u
#define S32_NVIC_IP_PRI218(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI218_SHIFT))&S32_NVIC_IP_PRI218_MASK)
#define S32_NVIC_IP_PRI219_MASK                  0xFFu
#define S32_NVIC_IP_PRI219_SHIFT                 0u
#define S32_NVIC_IP_PRI219_WIDTH                 8u
#define S32_NVIC_IP_PRI219(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI219_SHIFT))&S32_NVIC_IP_PRI219_MASK)
#define S32_NVIC_IP_PRI220_MASK                  0xFFu
#define S32_NVIC_IP_PRI220_SHIFT                 0u
#define S32_NVIC_IP_PRI220_WIDTH                 8u
#define S32_NVIC_IP_PRI220(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI220_SHIFT))&S32_NVIC_IP_PRI220_MASK)
#define S32_NVIC_IP_PRI221_MASK                  0xFFu
#define S32_NVIC_IP_PRI221_SHIFT                 0u
#define S32_NVIC_IP_PRI221_WIDTH                 8u
#define S32_NVIC_IP_PRI221(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI221_SHIFT))&S32_NVIC_IP_PRI221_MASK)
#define S32_NVIC_IP_PRI222_MASK                  0xFFu
#define S32_NVIC_IP_PRI222_SHIFT                 0u
#define S32_NVIC_IP_PRI222_WIDTH                 8u
#define S32_NVIC_IP_PRI222(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI222_SHIFT))&S32_NVIC_IP_PRI222_MASK)
#define S32_NVIC_IP_PRI223_MASK                  0xFFu
#define S32_NVIC_IP_PRI223_SHIFT                 0u
#define S32_NVIC_IP_PRI223_WIDTH                 8u
#define S32_NVIC_IP_PRI223(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI223_SHIFT))&S32_NVIC_IP_PRI223_MASK)
#define S32_NVIC_IP_PRI224_MASK                  0xFFu
#define S32_NVIC_IP_PRI224_SHIFT                 0u
#define S32_NVIC_IP_PRI224_WIDTH                 8u
#define S32_NVIC_IP_PRI224(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI224_SHIFT))&S32_NVIC_IP_PRI224_MASK)
#define S32_NVIC_IP_PRI225_MASK                  0xFFu
#define S32_NVIC_IP_PRI225_SHIFT                 0u
#define S32_NVIC_IP_PRI225_WIDTH                 8u
#define S32_NVIC_IP_PRI225(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI225_SHIFT))&S32_NVIC_IP_PRI225_MASK)
#define S32_NVIC_IP_PRI226_MASK                  0xFFu
#define S32_NVIC_IP_PRI226_SHIFT                 0u
#define S32_NVIC_IP_PRI226_WIDTH                 8u
#define S32_NVIC_IP_PRI226(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI226_SHIFT))&S32_NVIC_IP_PRI226_MASK)
#define S32_NVIC_IP_PRI227_MASK                  0xFFu
#define S32_NVIC_IP_PRI227_SHIFT                 0u
#define S32_NVIC_IP_PRI227_WIDTH                 8u
#define S32_NVIC_IP_PRI227(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI227_SHIFT))&S32_NVIC_IP_PRI227_MASK)
#define S32_NVIC_IP_PRI228_MASK                  0xFFu
#define S32_NVIC_IP_PRI228_SHIFT                 0u
#define S32_NVIC_IP_PRI228_WIDTH                 8u
#define S32_NVIC_IP_PRI228(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI228_SHIFT))&S32_NVIC_IP_PRI228_MASK)
#define S32_NVIC_IP_PRI229_MASK                  0xFFu
#define S32_NVIC_IP_PRI229_SHIFT                 0u
#define S32_NVIC_IP_PRI229_WIDTH                 8u
#define S32_NVIC_IP_PRI229(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI229_SHIFT))&S32_NVIC_IP_PRI229_MASK)
#define S32_NVIC_IP_PRI230_MASK                  0xFFu
#define S32_NVIC_IP_PRI230_SHIFT                 0u
#define S32_NVIC_IP_PRI230_WIDTH                 8u
#define S32_NVIC_IP_PRI230(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI230_SHIFT))&S32_NVIC_IP_PRI230_MASK)
#define S32_NVIC_IP_PRI231_MASK                  0xFFu
#define S32_NVIC_IP_PRI231_SHIFT                 0u
#define S32_NVIC_IP_PRI231_WIDTH                 8u
#define S32_NVIC_IP_PRI231(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI231_SHIFT))&S32_NVIC_IP_PRI231_MASK)
#define S32_NVIC_IP_PRI232_MASK                  0xFFu
#define S32_NVIC_IP_PRI232_SHIFT                 0u
#define S32_NVIC_IP_PRI232_WIDTH                 8u
#define S32_NVIC_IP_PRI232(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI232_SHIFT))&S32_NVIC_IP_PRI232_MASK)
#define S32_NVIC_IP_PRI233_MASK                  0xFFu
#define S32_NVIC_IP_PRI233_SHIFT                 0u
#define S32_NVIC_IP_PRI233_WIDTH                 8u
#define S32_NVIC_IP_PRI233(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI233_SHIFT))&S32_NVIC_IP_PRI233_MASK)
#define S32_NVIC_IP_PRI234_MASK                  0xFFu
#define S32_NVIC_IP_PRI234_SHIFT                 0u
#define S32_NVIC_IP_PRI234_WIDTH                 8u
#define S32_NVIC_IP_PRI234(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI234_SHIFT))&S32_NVIC_IP_PRI234_MASK)
#define S32_NVIC_IP_PRI235_MASK                  0xFFu
#define S32_NVIC_IP_PRI235_SHIFT                 0u
#define S32_NVIC_IP_PRI235_WIDTH                 8u
#define S32_NVIC_IP_PRI235(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI235_SHIFT))&S32_NVIC_IP_PRI235_MASK)
#define S32_NVIC_IP_PRI236_MASK                  0xFFu
#define S32_NVIC_IP_PRI236_SHIFT                 0u
#define S32_NVIC_IP_PRI236_WIDTH                 8u
#define S32_NVIC_IP_PRI236(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI236_SHIFT))&S32_NVIC_IP_PRI236_MASK)
#define S32_NVIC_IP_PRI237_MASK                  0xFFu
#define S32_NVIC_IP_PRI237_SHIFT                 0u
#define S32_NVIC_IP_PRI237_WIDTH                 8u
#define S32_NVIC_IP_PRI237(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI237_SHIFT))&S32_NVIC_IP_PRI237_MASK)
#define S32_NVIC_IP_PRI238_MASK                  0xFFu
#define S32_NVIC_IP_PRI238_SHIFT                 0u
#define S32_NVIC_IP_PRI238_WIDTH                 8u
#define S32_NVIC_IP_PRI238(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI238_SHIFT))&S32_NVIC_IP_PRI238_MASK)
#define S32_NVIC_IP_PRI239_MASK                  0xFFu
#define S32_NVIC_IP_PRI239_SHIFT                 0u
#define S32_NVIC_IP_PRI239_WIDTH                 8u
#define S32_NVIC_IP_PRI239(x)                    (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI239_SHIFT))&S32_NVIC_IP_PRI239_MASK)
#define S32_NVIC_IP_PRI240_MASK	                 0xFFu
#define S32_NVIC_IP_PRI240_SHIFT	             0u
#define S32_NVIC_IP_PRI240_WIDTH	             8u
#define S32_NVIC_IP_PRI240(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI240_SHIFT))&S32_NVIC_IP_PRI240_MASK)
#define S32_NVIC_IP_PRI241_MASK	                 0xFFu
#define S32_NVIC_IP_PRI241_SHIFT	             0u
#define S32_NVIC_IP_PRI241_WIDTH	             8u
#define S32_NVIC_IP_PRI241(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI241_SHIFT))&S32_NVIC_IP_PRI241_MASK)
#define S32_NVIC_IP_PRI241_MASK	                 0xFFu
#define S32_NVIC_IP_PRI242_SHIFT	             0u
#define S32_NVIC_IP_PRI242_WIDTH	             8u
#define S32_NVIC_IP_PRI242(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI242_SHIFT))&S32_NVIC_IP_PRI242_MASK)
#define S32_NVIC_IP_PRI242_MASK	                 0xFFu
#define S32_NVIC_IP_PRI242_SHIFT	             0u
#define S32_NVIC_IP_PRI243_WIDTH	             8u
#define S32_NVIC_IP_PRI243(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI243_SHIFT))&S32_NVIC_IP_PRI243_MASK)
#define S32_NVIC_IP_PRI243_MASK	                 0xFFu
#define S32_NVIC_IP_PRI243_SHIFT	             0u
#define S32_NVIC_IP_PRI243_WIDTH	             8u
#define S32_NVIC_IP_PRI244(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI244_SHIFT))&S32_NVIC_IP_PRI244_MASK)
#define S32_NVIC_IP_PRI244_MASK	                 0xFFu
#define S32_NVIC_IP_PRI244_SHIFT	             0u
#define S32_NVIC_IP_PRI244_WIDTH	             8u
#define S32_NVIC_IP_PRI244(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI244_SHIFT))&S32_NVIC_IP_PRI244_MASK)
#define S32_NVIC_IP_PRI245_MASK	                 0xFFu
#define S32_NVIC_IP_PRI245_SHIFT	             0u
#define S32_NVIC_IP_PRI245_WIDTH	             8u
#define S32_NVIC_IP_PRI245(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI245_SHIFT))&S32_NVIC_IP_PRI245_MASK)
#define S32_NVIC_IP_PRI245_MASK	                 0xFFu
#define S32_NVIC_IP_PRI246_SHIFT	             0u
#define S32_NVIC_IP_PRI246_WIDTH	             8u
#define S32_NVIC_IP_PRI246(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI246_SHIFT))&S32_NVIC_IP_PRI246_MASK)
#define S32_NVIC_IP_PRI246_MASK	                 0xFFu
#define S32_NVIC_IP_PRI246_SHIFT	             0u
#define S32_NVIC_IP_PRI247_WIDTH	             8u
#define S32_NVIC_IP_PRI247(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI247_SHIFT))&S32_NVIC_IP_PRI247_MASK)
#define S32_NVIC_IP_PRI247_MASK	                 0xFFu
#define S32_NVIC_IP_PRI247_SHIFT	             0u
#define S32_NVIC_IP_PRI247_WIDTH	             8u
#define S32_NVIC_IP_PRI248(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI248_SHIFT))&S32_NVIC_IP_PRI248_MASK)
#define S32_NVIC_IP_PRI248_MASK	                 0xFFu
#define S32_NVIC_IP_PRI248_SHIFT	             0u
#define S32_NVIC_IP_PRI248_WIDTH	             8u
#define S32_NVIC_IP_PRI248(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI248_SHIFT))&S32_NVIC_IP_PRI248_MASK)
#define S32_NVIC_IP_PRI249_MASK	                 0xFFu
#define S32_NVIC_IP_PRI249_SHIFT	             0u
#define S32_NVIC_IP_PRI249_WIDTH	             8u
#define S32_NVIC_IP_PRI249(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI249_SHIFT))&S32_NVIC_IP_PRI249_MASK)
#define S32_NVIC_IP_PRI249_MASK	                 0xFFu
#define S32_NVIC_IP_PRI250_SHIFT	             0u
#define S32_NVIC_IP_PRI250_WIDTH	             8u
#define S32_NVIC_IP_PRI250(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI250_SHIFT))&S32_NVIC_IP_PRI250_MASK)
#define S32_NVIC_IP_PRI250_MASK	                 0xFFu
#define S32_NVIC_IP_PRI250_SHIFT	             0u
#define S32_NVIC_IP_PRI251_WIDTH	             8u
#define S32_NVIC_IP_PRI251(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI251_SHIFT))&S32_NVIC_IP_PRI251_MASK)
#define S32_NVIC_IP_PRI251_MASK	                 0xFFu
#define S32_NVIC_IP_PRI251_SHIFT	             0u
#define S32_NVIC_IP_PRI251_WIDTH	             8u
#define S32_NVIC_IP_PRI252(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI252_SHIFT))&S32_NVIC_IP_PRI252_MASK)
#define S32_NVIC_IP_PRI252_MASK	                 0xFFu
#define S32_NVIC_IP_PRI252_SHIFT	             0u
#define S32_NVIC_IP_PRI252_WIDTH	             8u
#define S32_NVIC_IP_PRI252(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI252_SHIFT))&S32_NVIC_IP_PRI252_MASK)
#define S32_NVIC_IP_PRI253_MASK	                 0xFFu
#define S32_NVIC_IP_PRI253_SHIFT	             0u
#define S32_NVIC_IP_PRI253_WIDTH	             8u
#define S32_NVIC_IP_PRI253(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI253_SHIFT))&S32_NVIC_IP_PRI253_MASK)
#define S32_NVIC_IP_PRI253_MASK	                 0xFFu
#define S32_NVIC_IP_PRI254_SHIFT	             0u
#define S32_NVIC_IP_PRI254_WIDTH	             8u
#define S32_NVIC_IP_PRI254(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI254_SHIFT))&S32_NVIC_IP_PRI254_MASK)
#define S32_NVIC_IP_PRI254_MASK	                 0xFFu
#define S32_NVIC_IP_PRI254_SHIFT	             0u
#define S32_NVIC_IP_PRI255_WIDTH	             8u
#define S32_NVIC_IP_PRI255(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI255_SHIFT))&S32_NVIC_IP_PRI255_MASK)
#define S32_NVIC_IP_PRI255_MASK	                 0xFFu
#define S32_NVIC_IP_PRI255_SHIFT	             0u
#define S32_NVIC_IP_PRI255_WIDTH	             8u
#define S32_NVIC_IP_PRI256(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI256_SHIFT))&S32_NVIC_IP_PRI256_MASK)
#define S32_NVIC_IP_PRI256_MASK	                 0xFFu
#define S32_NVIC_IP_PRI256_SHIFT	             0u
#define S32_NVIC_IP_PRI256_WIDTH	             8u
#define S32_NVIC_IP_PRI256(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI256_SHIFT))&S32_NVIC_IP_PRI256_MASK)
#define S32_NVIC_IP_PRI257_MASK	                 0xFFu
#define S32_NVIC_IP_PRI257_SHIFT	             0u
#define S32_NVIC_IP_PRI257_WIDTH	             8u
#define S32_NVIC_IP_PRI257(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI257_SHIFT))&S32_NVIC_IP_PRI257_MASK)
#define S32_NVIC_IP_PRI257_MASK	                 0xFFu
#define S32_NVIC_IP_PRI258_SHIFT	             0u
#define S32_NVIC_IP_PRI258_WIDTH	             8u
#define S32_NVIC_IP_PRI258(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI258_SHIFT))&S32_NVIC_IP_PRI258_MASK)
#define S32_NVIC_IP_PRI258_MASK	                 0xFFu
#define S32_NVIC_IP_PRI258_SHIFT	             0u
#define S32_NVIC_IP_PRI259_WIDTH	             8u
#define S32_NVIC_IP_PRI259(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI259_SHIFT))&S32_NVIC_IP_PRI259_MASK)
#define S32_NVIC_IP_PRI259_MASK	                 0xFFu
#define S32_NVIC_IP_PRI259_SHIFT	             0u
#define S32_NVIC_IP_PRI259_WIDTH	             8u
#define S32_NVIC_IP_PRI260(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI260_SHIFT))&S32_NVIC_IP_PRI260_MASK)
#define S32_NVIC_IP_PRI260_MASK	                 0xFFu
#define S32_NVIC_IP_PRI260_SHIFT	             0u
#define S32_NVIC_IP_PRI260_WIDTH	             8u
#define S32_NVIC_IP_PRI260(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI260_SHIFT))&S32_NVIC_IP_PRI260_MASK)
#define S32_NVIC_IP_PRI261_MASK	                 0xFFu
#define S32_NVIC_IP_PRI261_SHIFT	             0u
#define S32_NVIC_IP_PRI261_WIDTH	             8u
#define S32_NVIC_IP_PRI261(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI261_SHIFT))&S32_NVIC_IP_PRI261_MASK)
#define S32_NVIC_IP_PRI261_MASK	                 0xFFu
#define S32_NVIC_IP_PRI262_SHIFT	             0u
#define S32_NVIC_IP_PRI262_WIDTH	             8u
#define S32_NVIC_IP_PRI262(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI262_SHIFT))&S32_NVIC_IP_PRI262_MASK)
#define S32_NVIC_IP_PRI262_MASK	                 0xFFu
#define S32_NVIC_IP_PRI262_SHIFT	             0u
#define S32_NVIC_IP_PRI263_WIDTH	             8u
#define S32_NVIC_IP_PRI263(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI263_SHIFT))&S32_NVIC_IP_PRI263_MASK)
#define S32_NVIC_IP_PRI263_MASK	                 0xFFu
#define S32_NVIC_IP_PRI263_SHIFT	             0u
#define S32_NVIC_IP_PRI263_WIDTH	             8u
#define S32_NVIC_IP_PRI264(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI264_SHIFT))&S32_NVIC_IP_PRI264_MASK)
#define S32_NVIC_IP_PRI264_MASK	                 0xFFu
#define S32_NVIC_IP_PRI264_SHIFT	             0u
#define S32_NVIC_IP_PRI264_WIDTH	             8u
#define S32_NVIC_IP_PRI264(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI264_SHIFT))&S32_NVIC_IP_PRI264_MASK)
#define S32_NVIC_IP_PRI265_MASK	                 0xFFu
#define S32_NVIC_IP_PRI265_SHIFT	             0u
#define S32_NVIC_IP_PRI265_WIDTH	             8u
#define S32_NVIC_IP_PRI265(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI265_SHIFT))&S32_NVIC_IP_PRI265_MASK)
#define S32_NVIC_IP_PRI265_MASK	                 0xFFu
#define S32_NVIC_IP_PRI266_SHIFT	             0u
#define S32_NVIC_IP_PRI266_WIDTH	             8u
#define S32_NVIC_IP_PRI266(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI266_SHIFT))&S32_NVIC_IP_PRI266_MASK)
#define S32_NVIC_IP_PRI266_MASK	                 0xFFu
#define S32_NVIC_IP_PRI266_SHIFT	             0u
#define S32_NVIC_IP_PRI267_WIDTH	             8u
#define S32_NVIC_IP_PRI267(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI267_SHIFT))&S32_NVIC_IP_PRI267_MASK)
#define S32_NVIC_IP_PRI267_MASK	                 0xFFu
#define S32_NVIC_IP_PRI267_SHIFT	             0u
#define S32_NVIC_IP_PRI267_WIDTH	             8u
#define S32_NVIC_IP_PRI268(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI268_SHIFT))&S32_NVIC_IP_PRI268_MASK)
#define S32_NVIC_IP_PRI268_MASK	                 0xFFu
#define S32_NVIC_IP_PRI268_SHIFT	             0u
#define S32_NVIC_IP_PRI268_WIDTH	             8u
#define S32_NVIC_IP_PRI268(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI268_SHIFT))&S32_NVIC_IP_PRI268_MASK)
#define S32_NVIC_IP_PRI269_MASK	                 0xFFu
#define S32_NVIC_IP_PRI269_SHIFT	             0u
#define S32_NVIC_IP_PRI269_WIDTH	             8u
#define S32_NVIC_IP_PRI269(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI269_SHIFT))&S32_NVIC_IP_PRI269_MASK)
#define S32_NVIC_IP_PRI269_MASK	                 0xFFu
#define S32_NVIC_IP_PRI270_SHIFT	             0u
#define S32_NVIC_IP_PRI270_WIDTH	             8u
#define S32_NVIC_IP_PRI270(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI270_SHIFT))&S32_NVIC_IP_PRI270_MASK)
#define S32_NVIC_IP_PRI270_MASK	                 0xFFu
#define S32_NVIC_IP_PRI270_SHIFT	             0u
#define S32_NVIC_IP_PRI271_WIDTH	             8u
#define S32_NVIC_IP_PRI271(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI271_SHIFT))&S32_NVIC_IP_PRI271_MASK)
#define S32_NVIC_IP_PRI271_MASK	                 0xFFu
#define S32_NVIC_IP_PRI271_SHIFT	             0u
#define S32_NVIC_IP_PRI271_WIDTH	             8u
#define S32_NVIC_IP_PRI272(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI272_SHIFT))&S32_NVIC_IP_PRI272_MASK)
#define S32_NVIC_IP_PRI272_MASK	                 0xFFu
#define S32_NVIC_IP_PRI272_SHIFT	             0u
#define S32_NVIC_IP_PRI272_WIDTH	             8u
#define S32_NVIC_IP_PRI272(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI272_SHIFT))&S32_NVIC_IP_PRI272_MASK)
#define S32_NVIC_IP_PRI273_MASK	                 0xFFu
#define S32_NVIC_IP_PRI273_SHIFT	             0u
#define S32_NVIC_IP_PRI273_WIDTH	             8u
#define S32_NVIC_IP_PRI273(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI273_SHIFT))&S32_NVIC_IP_PRI273_MASK)
#define S32_NVIC_IP_PRI273_MASK	                 0xFFu
#define S32_NVIC_IP_PRI274_SHIFT	             0u
#define S32_NVIC_IP_PRI274_WIDTH	             8u
#define S32_NVIC_IP_PRI274(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI274_SHIFT))&S32_NVIC_IP_PRI274_MASK)
#define S32_NVIC_IP_PRI274_MASK	                 0xFFu
#define S32_NVIC_IP_PRI274_SHIFT	             0u
#define S32_NVIC_IP_PRI275_WIDTH	             8u
#define S32_NVIC_IP_PRI275(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI275_SHIFT))&S32_NVIC_IP_PRI275_MASK)
#define S32_NVIC_IP_PRI275_MASK	                 0xFFu
#define S32_NVIC_IP_PRI275_SHIFT	             0u
#define S32_NVIC_IP_PRI275_WIDTH	             8u
#define S32_NVIC_IP_PRI276(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI276_SHIFT))&S32_NVIC_IP_PRI276_MASK)
#define S32_NVIC_IP_PRI276_MASK	                 0xFFu
#define S32_NVIC_IP_PRI276_SHIFT	             0u
#define S32_NVIC_IP_PRI276_WIDTH	             8u
#define S32_NVIC_IP_PRI276(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI276_SHIFT))&S32_NVIC_IP_PRI276_MASK)
#define S32_NVIC_IP_PRI277_MASK	                 0xFFu
#define S32_NVIC_IP_PRI277_SHIFT	             0u
#define S32_NVIC_IP_PRI277_WIDTH	             8u
#define S32_NVIC_IP_PRI277(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI277_SHIFT))&S32_NVIC_IP_PRI277_MASK)
#define S32_NVIC_IP_PRI277_MASK	                 0xFFu
#define S32_NVIC_IP_PRI278_SHIFT	             0u
#define S32_NVIC_IP_PRI278_WIDTH	             8u
#define S32_NVIC_IP_PRI278(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI278_SHIFT))&S32_NVIC_IP_PRI278_MASK)
#define S32_NVIC_IP_PRI278_MASK	                 0xFFu
#define S32_NVIC_IP_PRI278_SHIFT	             0u
#define S32_NVIC_IP_PRI279_WIDTH	             8u
#define S32_NVIC_IP_PRI279(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI279_SHIFT))&S32_NVIC_IP_PRI279_MASK)
#define S32_NVIC_IP_PRI279_MASK	                 0xFFu
#define S32_NVIC_IP_PRI279_SHIFT	             0u
#define S32_NVIC_IP_PRI279_WIDTH	             8u
#define S32_NVIC_IP_PRI280(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI280_SHIFT))&S32_NVIC_IP_PRI280_MASK)
#define S32_NVIC_IP_PRI280_MASK	                 0xFFu
#define S32_NVIC_IP_PRI280_SHIFT	             0u
#define S32_NVIC_IP_PRI280_WIDTH	             8u
#define S32_NVIC_IP_PRI280(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI280_SHIFT))&S32_NVIC_IP_PRI280_MASK)
#define S32_NVIC_IP_PRI281_MASK	                 0xFFu
#define S32_NVIC_IP_PRI281_SHIFT	             0u
#define S32_NVIC_IP_PRI281_WIDTH	             8u
#define S32_NVIC_IP_PRI281(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI281_SHIFT))&S32_NVIC_IP_PRI281_MASK)
#define S32_NVIC_IP_PRI281_MASK	                 0xFFu
#define S32_NVIC_IP_PRI282_SHIFT	             0u
#define S32_NVIC_IP_PRI282_WIDTH	             8u
#define S32_NVIC_IP_PRI282(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI282_SHIFT))&S32_NVIC_IP_PRI282_MASK)
#define S32_NVIC_IP_PRI282_MASK	                 0xFFu
#define S32_NVIC_IP_PRI282_SHIFT	             0u
#define S32_NVIC_IP_PRI283_WIDTH	             8u
#define S32_NVIC_IP_PRI283(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI283_SHIFT))&S32_NVIC_IP_PRI283_MASK)
#define S32_NVIC_IP_PRI283_MASK	                 0xFFu
#define S32_NVIC_IP_PRI283_SHIFT	             0u
#define S32_NVIC_IP_PRI283_WIDTH	             8u
#define S32_NVIC_IP_PRI284(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI284_SHIFT))&S32_NVIC_IP_PRI284_MASK)
#define S32_NVIC_IP_PRI284_MASK	                 0xFFu
#define S32_NVIC_IP_PRI284_SHIFT	             0u
#define S32_NVIC_IP_PRI284_WIDTH	             8u
#define S32_NVIC_IP_PRI284(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI284_SHIFT))&S32_NVIC_IP_PRI284_MASK)
#define S32_NVIC_IP_PRI285_MASK	                 0xFFu
#define S32_NVIC_IP_PRI285_SHIFT	             0u
#define S32_NVIC_IP_PRI285_WIDTH	             8u
#define S32_NVIC_IP_PRI285(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI285_SHIFT))&S32_NVIC_IP_PRI285_MASK)
#define S32_NVIC_IP_PRI285_MASK	                 0xFFu
#define S32_NVIC_IP_PRI286_SHIFT	             0u
#define S32_NVIC_IP_PRI286_WIDTH	             8u
#define S32_NVIC_IP_PRI286(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI286_SHIFT))&S32_NVIC_IP_PRI286_MASK)
#define S32_NVIC_IP_PRI286_MASK	                 0xFFu
#define S32_NVIC_IP_PRI286_SHIFT	             0u
#define S32_NVIC_IP_PRI287_WIDTH	             8u
#define S32_NVIC_IP_PRI287(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI287_SHIFT))&S32_NVIC_IP_PRI287_MASK)
#define S32_NVIC_IP_PRI287_MASK	                 0xFFu
#define S32_NVIC_IP_PRI287_SHIFT	             0u
#define S32_NVIC_IP_PRI287_WIDTH	             8u
#define S32_NVIC_IP_PRI288(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI288_SHIFT))&S32_NVIC_IP_PRI288_MASK)
#define S32_NVIC_IP_PRI288_MASK	                 0xFFu
#define S32_NVIC_IP_PRI288_SHIFT	             0u
#define S32_NVIC_IP_PRI288_WIDTH	             8u
#define S32_NVIC_IP_PRI288(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI288_SHIFT))&S32_NVIC_IP_PRI288_MASK)
#define S32_NVIC_IP_PRI289_MASK	                 0xFFu
#define S32_NVIC_IP_PRI289_SHIFT	             0u
#define S32_NVIC_IP_PRI289_WIDTH	             8u
#define S32_NVIC_IP_PRI289(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI289_SHIFT))&S32_NVIC_IP_PRI289_MASK)
#define S32_NVIC_IP_PRI289_MASK	                 0xFFu
#define S32_NVIC_IP_PRI290_SHIFT	             0u
#define S32_NVIC_IP_PRI290_WIDTH	             8u
#define S32_NVIC_IP_PRI290(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI290_SHIFT))&S32_NVIC_IP_PRI290_MASK)
#define S32_NVIC_IP_PRI290_MASK	                 0xFFu
#define S32_NVIC_IP_PRI290_SHIFT	             0u
#define S32_NVIC_IP_PRI291_WIDTH	             8u
#define S32_NVIC_IP_PRI291(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI291_SHIFT))&S32_NVIC_IP_PRI291_MASK)
#define S32_NVIC_IP_PRI291_MASK	                 0xFFu
#define S32_NVIC_IP_PRI291_SHIFT	             0u
#define S32_NVIC_IP_PRI291_WIDTH	             8u
#define S32_NVIC_IP_PRI292(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI292_SHIFT))&S32_NVIC_IP_PRI292_MASK)
#define S32_NVIC_IP_PRI292_MASK	                 0xFFu
#define S32_NVIC_IP_PRI292_SHIFT	             0u
#define S32_NVIC_IP_PRI292_WIDTH	             8u
#define S32_NVIC_IP_PRI292(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI292_SHIFT))&S32_NVIC_IP_PRI292_MASK)
#define S32_NVIC_IP_PRI293_MASK	                 0xFFu
#define S32_NVIC_IP_PRI293_SHIFT	             0u
#define S32_NVIC_IP_PRI293_WIDTH	             8u
#define S32_NVIC_IP_PRI293(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI293_SHIFT))&S32_NVIC_IP_PRI293_MASK)
#define S32_NVIC_IP_PRI293_MASK	                 0xFFu
#define S32_NVIC_IP_PRI294_SHIFT	             0u
#define S32_NVIC_IP_PRI294_WIDTH	             8u
#define S32_NVIC_IP_PRI294(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI294_SHIFT))&S32_NVIC_IP_PRI294_MASK)
#define S32_NVIC_IP_PRI294_MASK	                 0xFFu
#define S32_NVIC_IP_PRI294_SHIFT	             0u
#define S32_NVIC_IP_PRI295_WIDTH	             8u
#define S32_NVIC_IP_PRI295(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI295_SHIFT))&S32_NVIC_IP_PRI295_MASK)
#define S32_NVIC_IP_PRI295_MASK	                 0xFFu
#define S32_NVIC_IP_PRI295_SHIFT	             0u
#define S32_NVIC_IP_PRI295_WIDTH	             8u
#define S32_NVIC_IP_PRI296(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI296_SHIFT))&S32_NVIC_IP_PRI296_MASK)
#define S32_NVIC_IP_PRI296_MASK	                 0xFFu
#define S32_NVIC_IP_PRI296_SHIFT	             0u
#define S32_NVIC_IP_PRI296_WIDTH	             8u
#define S32_NVIC_IP_PRI296(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI296_SHIFT))&S32_NVIC_IP_PRI296_MASK)
#define S32_NVIC_IP_PRI297_MASK	                 0xFFu
#define S32_NVIC_IP_PRI297_SHIFT	             0u
#define S32_NVIC_IP_PRI297_WIDTH	             8u
#define S32_NVIC_IP_PRI297(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI297_SHIFT))&S32_NVIC_IP_PRI297_MASK)
#define S32_NVIC_IP_PRI297_MASK	                 0xFFu
#define S32_NVIC_IP_PRI298_SHIFT	             0u
#define S32_NVIC_IP_PRI298_WIDTH	             8u
#define S32_NVIC_IP_PRI298(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI298_SHIFT))&S32_NVIC_IP_PRI298_MASK)
#define S32_NVIC_IP_PRI298_MASK	                 0xFFu
#define S32_NVIC_IP_PRI298_SHIFT	             0u
#define S32_NVIC_IP_PRI299_WIDTH	             8u
#define S32_NVIC_IP_PRI299(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI299_SHIFT))&S32_NVIC_IP_PRI299_MASK)
#define S32_NVIC_IP_PRI299_MASK	                 0xFFu
#define S32_NVIC_IP_PRI299_SHIFT	             0u
#define S32_NVIC_IP_PRI299_WIDTH	             8u
#define S32_NVIC_IP_PRI300(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI300_SHIFT))&S32_NVIC_IP_PRI300_MASK)
#define S32_NVIC_IP_PRI300_MASK	                 0xFFu
#define S32_NVIC_IP_PRI300_SHIFT	             0u
#define S32_NVIC_IP_PRI300_WIDTH	             8u
#define S32_NVIC_IP_PRI300(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI300_SHIFT))&S32_NVIC_IP_PRI300_MASK)
#define S32_NVIC_IP_PRI301_MASK	                 0xFFu
#define S32_NVIC_IP_PRI301_SHIFT	             0u
#define S32_NVIC_IP_PRI301_WIDTH	             8u
#define S32_NVIC_IP_PRI301(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI301_SHIFT))&S32_NVIC_IP_PRI301_MASK)
#define S32_NVIC_IP_PRI301_MASK	                 0xFFu
#define S32_NVIC_IP_PRI302_SHIFT	             0u
#define S32_NVIC_IP_PRI302_WIDTH	             8u
#define S32_NVIC_IP_PRI302(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI302_SHIFT))&S32_NVIC_IP_PRI302_MASK)
#define S32_NVIC_IP_PRI302_MASK	                 0xFFu
#define S32_NVIC_IP_PRI302_SHIFT	             0u
#define S32_NVIC_IP_PRI303_WIDTH	             8u
#define S32_NVIC_IP_PRI303(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI303_SHIFT))&S32_NVIC_IP_PRI303_MASK)
#define S32_NVIC_IP_PRI303_MASK	                 0xFFu
#define S32_NVIC_IP_PRI303_SHIFT	             0u
#define S32_NVIC_IP_PRI303_WIDTH	             8u
#define S32_NVIC_IP_PRI304(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI304_SHIFT))&S32_NVIC_IP_PRI304_MASK)
#define S32_NVIC_IP_PRI304_MASK	                 0xFFu
#define S32_NVIC_IP_PRI304_SHIFT	             0u
#define S32_NVIC_IP_PRI304_WIDTH	             8u
#define S32_NVIC_IP_PRI304(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI304_SHIFT))&S32_NVIC_IP_PRI304_MASK)
#define S32_NVIC_IP_PRI305_MASK	                 0xFFu
#define S32_NVIC_IP_PRI305_SHIFT	             0u
#define S32_NVIC_IP_PRI305_WIDTH	             8u
#define S32_NVIC_IP_PRI305(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI305_SHIFT))&S32_NVIC_IP_PRI305_MASK)
#define S32_NVIC_IP_PRI305_MASK	                 0xFFu
#define S32_NVIC_IP_PRI306_SHIFT	             0u
#define S32_NVIC_IP_PRI306_WIDTH	             8u
#define S32_NVIC_IP_PRI306(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI306_SHIFT))&S32_NVIC_IP_PRI306_MASK)
#define S32_NVIC_IP_PRI306_MASK	                 0xFFu
#define S32_NVIC_IP_PRI306_SHIFT	             0u
#define S32_NVIC_IP_PRI307_WIDTH	             8u
#define S32_NVIC_IP_PRI307(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI307_SHIFT))&S32_NVIC_IP_PRI307_MASK)
#define S32_NVIC_IP_PRI307_MASK	                 0xFFu
#define S32_NVIC_IP_PRI307_SHIFT	             0u
#define S32_NVIC_IP_PRI307_WIDTH	             8u
#define S32_NVIC_IP_PRI308(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI308_SHIFT))&S32_NVIC_IP_PRI308_MASK)
#define S32_NVIC_IP_PRI308_MASK	                 0xFFu
#define S32_NVIC_IP_PRI308_SHIFT	             0u
#define S32_NVIC_IP_PRI308_WIDTH	             8u
#define S32_NVIC_IP_PRI308(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI308_SHIFT))&S32_NVIC_IP_PRI308_MASK)
#define S32_NVIC_IP_PRI309_MASK	                 0xFFu
#define S32_NVIC_IP_PRI309_SHIFT	             0u
#define S32_NVIC_IP_PRI309_WIDTH	             8u
#define S32_NVIC_IP_PRI309(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI309_SHIFT))&S32_NVIC_IP_PRI309_MASK)
#define S32_NVIC_IP_PRI309_MASK	                 0xFFu
#define S32_NVIC_IP_PRI310_SHIFT	             0u
#define S32_NVIC_IP_PRI310_WIDTH	             8u
#define S32_NVIC_IP_PRI310(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI310_SHIFT))&S32_NVIC_IP_PRI310_MASK)
#define S32_NVIC_IP_PRI310_MASK	                 0xFFu
#define S32_NVIC_IP_PRI310_SHIFT	             0u
#define S32_NVIC_IP_PRI311_WIDTH	             8u
#define S32_NVIC_IP_PRI311(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI311_SHIFT))&S32_NVIC_IP_PRI311_MASK)
#define S32_NVIC_IP_PRI311_MASK	                 0xFFu
#define S32_NVIC_IP_PRI311_SHIFT	             0u
#define S32_NVIC_IP_PRI311_WIDTH	             8u
#define S32_NVIC_IP_PRI312(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI312_SHIFT))&S32_NVIC_IP_PRI312_MASK)
#define S32_NVIC_IP_PRI312_MASK	                 0xFFu
#define S32_NVIC_IP_PRI312_SHIFT	             0u
#define S32_NVIC_IP_PRI312_WIDTH	             8u
#define S32_NVIC_IP_PRI312(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI312_SHIFT))&S32_NVIC_IP_PRI312_MASK)
#define S32_NVIC_IP_PRI313_MASK	                 0xFFu
#define S32_NVIC_IP_PRI313_SHIFT	             0u
#define S32_NVIC_IP_PRI313_WIDTH	             8u
#define S32_NVIC_IP_PRI313(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI313_SHIFT))&S32_NVIC_IP_PRI313_MASK)
#define S32_NVIC_IP_PRI313_MASK	                 0xFFu
#define S32_NVIC_IP_PRI314_SHIFT	             0u
#define S32_NVIC_IP_PRI314_WIDTH	             8u
#define S32_NVIC_IP_PRI314(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI314_SHIFT))&S32_NVIC_IP_PRI314_MASK)
#define S32_NVIC_IP_PRI314_MASK	                 0xFFu
#define S32_NVIC_IP_PRI314_SHIFT	             0u
#define S32_NVIC_IP_PRI315_WIDTH	             8u
#define S32_NVIC_IP_PRI315(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI315_SHIFT))&S32_NVIC_IP_PRI315_MASK)
#define S32_NVIC_IP_PRI315_MASK	                 0xFFu
#define S32_NVIC_IP_PRI315_SHIFT	             0u
#define S32_NVIC_IP_PRI315_WIDTH	             8u
#define S32_NVIC_IP_PRI316(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI316_SHIFT))&S32_NVIC_IP_PRI316_MASK)
#define S32_NVIC_IP_PRI316_MASK	                 0xFFu
#define S32_NVIC_IP_PRI316_SHIFT	             0u
#define S32_NVIC_IP_PRI316_WIDTH	             8u
#define S32_NVIC_IP_PRI316(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI316_SHIFT))&S32_NVIC_IP_PRI316_MASK)
#define S32_NVIC_IP_PRI317_MASK	                 0xFFu
#define S32_NVIC_IP_PRI317_SHIFT	             0u
#define S32_NVIC_IP_PRI317_WIDTH	             8u
#define S32_NVIC_IP_PRI317(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI317_SHIFT))&S32_NVIC_IP_PRI317_MASK)
#define S32_NVIC_IP_PRI317_MASK	                 0xFFu
#define S32_NVIC_IP_PRI318_SHIFT	             0u
#define S32_NVIC_IP_PRI318_WIDTH	             8u
#define S32_NVIC_IP_PRI318(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI318_SHIFT))&S32_NVIC_IP_PRI318_MASK)
#define S32_NVIC_IP_PRI318_MASK	                 0xFFu
#define S32_NVIC_IP_PRI318_SHIFT	             0u
#define S32_NVIC_IP_PRI319_WIDTH	             8u
#define S32_NVIC_IP_PRI319(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI319_SHIFT))&S32_NVIC_IP_PRI319_MASK)
#define S32_NVIC_IP_PRI319_MASK	                 0xFFu
#define S32_NVIC_IP_PRI319_SHIFT	             0u
#define S32_NVIC_IP_PRI319_WIDTH	             8u
#define S32_NVIC_IP_PRI320(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI320_SHIFT))&S32_NVIC_IP_PRI320_MASK)
#define S32_NVIC_IP_PRI320_MASK	                 0xFFu
#define S32_NVIC_IP_PRI320_SHIFT	             0u
#define S32_NVIC_IP_PRI320_WIDTH	             8u
#define S32_NVIC_IP_PRI320(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI320_SHIFT))&S32_NVIC_IP_PRI320_MASK)
#define S32_NVIC_IP_PRI321_MASK	                 0xFFu
#define S32_NVIC_IP_PRI321_SHIFT	             0u
#define S32_NVIC_IP_PRI321_WIDTH	             8u
#define S32_NVIC_IP_PRI321(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI321_SHIFT))&S32_NVIC_IP_PRI321_MASK)
#define S32_NVIC_IP_PRI321_MASK	                 0xFFu
#define S32_NVIC_IP_PRI322_SHIFT	             0u
#define S32_NVIC_IP_PRI322_WIDTH	             8u
#define S32_NVIC_IP_PRI322(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI322_SHIFT))&S32_NVIC_IP_PRI322_MASK)
#define S32_NVIC_IP_PRI322_MASK	                 0xFFu
#define S32_NVIC_IP_PRI322_SHIFT	             0u
#define S32_NVIC_IP_PRI323_WIDTH	             8u
#define S32_NVIC_IP_PRI323(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI323_SHIFT))&S32_NVIC_IP_PRI323_MASK)
#define S32_NVIC_IP_PRI323_MASK	                 0xFFu
#define S32_NVIC_IP_PRI323_SHIFT	             0u
#define S32_NVIC_IP_PRI323_WIDTH	             8u
#define S32_NVIC_IP_PRI324(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI324_SHIFT))&S32_NVIC_IP_PRI324_MASK)
#define S32_NVIC_IP_PRI324_MASK	                 0xFFu
#define S32_NVIC_IP_PRI324_SHIFT	             0u
#define S32_NVIC_IP_PRI324_WIDTH	             8u
#define S32_NVIC_IP_PRI324(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI324_SHIFT))&S32_NVIC_IP_PRI324_MASK)
#define S32_NVIC_IP_PRI325_MASK	                 0xFFu
#define S32_NVIC_IP_PRI325_SHIFT	             0u
#define S32_NVIC_IP_PRI325_WIDTH	             8u
#define S32_NVIC_IP_PRI325(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI325_SHIFT))&S32_NVIC_IP_PRI325_MASK)
#define S32_NVIC_IP_PRI325_MASK	                 0xFFu
#define S32_NVIC_IP_PRI326_SHIFT	             0u
#define S32_NVIC_IP_PRI326_WIDTH	             8u
#define S32_NVIC_IP_PRI326(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI326_SHIFT))&S32_NVIC_IP_PRI326_MASK)
#define S32_NVIC_IP_PRI326_MASK	                 0xFFu
#define S32_NVIC_IP_PRI326_SHIFT	             0u
#define S32_NVIC_IP_PRI327_WIDTH	             8u
#define S32_NVIC_IP_PRI327(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI327_SHIFT))&S32_NVIC_IP_PRI327_MASK)
#define S32_NVIC_IP_PRI327_MASK	                 0xFFu
#define S32_NVIC_IP_PRI327_SHIFT	             0u
#define S32_NVIC_IP_PRI327_WIDTH	             8u
#define S32_NVIC_IP_PRI328(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI328_SHIFT))&S32_NVIC_IP_PRI328_MASK)
#define S32_NVIC_IP_PRI328_MASK	                 0xFFu
#define S32_NVIC_IP_PRI328_SHIFT	             0u
#define S32_NVIC_IP_PRI328_WIDTH	             8u
#define S32_NVIC_IP_PRI328(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI328_SHIFT))&S32_NVIC_IP_PRI328_MASK)
#define S32_NVIC_IP_PRI329_MASK	                 0xFFu
#define S32_NVIC_IP_PRI329_SHIFT	             0u
#define S32_NVIC_IP_PRI329_WIDTH	             8u
#define S32_NVIC_IP_PRI329(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI329_SHIFT))&S32_NVIC_IP_PRI329_MASK)
#define S32_NVIC_IP_PRI329_MASK	                 0xFFu
#define S32_NVIC_IP_PRI330_SHIFT	             0u
#define S32_NVIC_IP_PRI330_WIDTH	             8u
#define S32_NVIC_IP_PRI330(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI330_SHIFT))&S32_NVIC_IP_PRI330_MASK)
#define S32_NVIC_IP_PRI330_MASK	                 0xFFu
#define S32_NVIC_IP_PRI330_SHIFT	             0u
#define S32_NVIC_IP_PRI331_WIDTH	             8u
#define S32_NVIC_IP_PRI331(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI331_SHIFT))&S32_NVIC_IP_PRI331_MASK)
#define S32_NVIC_IP_PRI331_MASK	                 0xFFu
#define S32_NVIC_IP_PRI331_SHIFT	             0u
#define S32_NVIC_IP_PRI331_WIDTH	             8u
#define S32_NVIC_IP_PRI332(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI332_SHIFT))&S32_NVIC_IP_PRI332_MASK)
#define S32_NVIC_IP_PRI332_MASK	                 0xFFu
#define S32_NVIC_IP_PRI332_SHIFT	             0u
#define S32_NVIC_IP_PRI332_WIDTH	             8u
#define S32_NVIC_IP_PRI332(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI332_SHIFT))&S32_NVIC_IP_PRI332_MASK)
#define S32_NVIC_IP_PRI333_MASK	                 0xFFu
#define S32_NVIC_IP_PRI333_SHIFT	             0u
#define S32_NVIC_IP_PRI333_WIDTH	             8u
#define S32_NVIC_IP_PRI333(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI333_SHIFT))&S32_NVIC_IP_PRI333_MASK)
#define S32_NVIC_IP_PRI333_MASK	                 0xFFu
#define S32_NVIC_IP_PRI334_SHIFT	             0u
#define S32_NVIC_IP_PRI334_WIDTH	             8u
#define S32_NVIC_IP_PRI334(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI334_SHIFT))&S32_NVIC_IP_PRI334_MASK)
#define S32_NVIC_IP_PRI334_MASK	                 0xFFu
#define S32_NVIC_IP_PRI334_SHIFT	             0u
#define S32_NVIC_IP_PRI335_WIDTH	             8u
#define S32_NVIC_IP_PRI335(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI335_SHIFT))&S32_NVIC_IP_PRI335_MASK)
#define S32_NVIC_IP_PRI335_MASK	                 0xFFu
#define S32_NVIC_IP_PRI335_SHIFT	             0u
#define S32_NVIC_IP_PRI335_WIDTH	             8u
#define S32_NVIC_IP_PRI336(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI336_SHIFT))&S32_NVIC_IP_PRI336_MASK)
#define S32_NVIC_IP_PRI336_MASK	                 0xFFu
#define S32_NVIC_IP_PRI336_SHIFT	             0u
#define S32_NVIC_IP_PRI336_WIDTH	             8u
#define S32_NVIC_IP_PRI336(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI336_SHIFT))&S32_NVIC_IP_PRI336_MASK)
#define S32_NVIC_IP_PRI337_MASK	                 0xFFu
#define S32_NVIC_IP_PRI337_SHIFT	             0u
#define S32_NVIC_IP_PRI337_WIDTH	             8u
#define S32_NVIC_IP_PRI337(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI337_SHIFT))&S32_NVIC_IP_PRI337_MASK)
#define S32_NVIC_IP_PRI337_MASK	                 0xFFu
#define S32_NVIC_IP_PRI338_SHIFT	             0u
#define S32_NVIC_IP_PRI338_WIDTH	             8u
#define S32_NVIC_IP_PRI338(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI338_SHIFT))&S32_NVIC_IP_PRI338_MASK)
#define S32_NVIC_IP_PRI338_MASK	                 0xFFu
#define S32_NVIC_IP_PRI338_SHIFT	             0u
#define S32_NVIC_IP_PRI339_WIDTH	             8u
#define S32_NVIC_IP_PRI339(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI339_SHIFT))&S32_NVIC_IP_PRI339_MASK)
#define S32_NVIC_IP_PRI339_MASK	                 0xFFu
#define S32_NVIC_IP_PRI339_SHIFT	             0u
#define S32_NVIC_IP_PRI339_WIDTH	             8u
#define S32_NVIC_IP_PRI340(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI340_SHIFT))&S32_NVIC_IP_PRI340_MASK)
#define S32_NVIC_IP_PRI340_MASK	                 0xFFu
#define S32_NVIC_IP_PRI340_SHIFT	             0u
#define S32_NVIC_IP_PRI340_WIDTH	             8u
#define S32_NVIC_IP_PRI340(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI340_SHIFT))&S32_NVIC_IP_PRI340_MASK)
#define S32_NVIC_IP_PRI341_MASK	                 0xFFu
#define S32_NVIC_IP_PRI341_SHIFT	             0u
#define S32_NVIC_IP_PRI341_WIDTH	             8u
#define S32_NVIC_IP_PRI341(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI341_SHIFT))&S32_NVIC_IP_PRI341_MASK)
#define S32_NVIC_IP_PRI341_MASK	                 0xFFu
#define S32_NVIC_IP_PRI342_SHIFT	             0u
#define S32_NVIC_IP_PRI342_WIDTH	             8u
#define S32_NVIC_IP_PRI342(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI342_SHIFT))&S32_NVIC_IP_PRI342_MASK)
#define S32_NVIC_IP_PRI342_MASK	                 0xFFu
#define S32_NVIC_IP_PRI342_SHIFT	             0u
#define S32_NVIC_IP_PRI343_WIDTH	             8u
#define S32_NVIC_IP_PRI343(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI343_SHIFT))&S32_NVIC_IP_PRI343_MASK)
#define S32_NVIC_IP_PRI343_MASK	                 0xFFu
#define S32_NVIC_IP_PRI343_SHIFT	             0u
#define S32_NVIC_IP_PRI343_WIDTH	             8u
#define S32_NVIC_IP_PRI344(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI344_SHIFT))&S32_NVIC_IP_PRI344_MASK)
#define S32_NVIC_IP_PRI344_MASK	                 0xFFu
#define S32_NVIC_IP_PRI344_SHIFT	             0u
#define S32_NVIC_IP_PRI344_WIDTH	             8u
#define S32_NVIC_IP_PRI344(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI344_SHIFT))&S32_NVIC_IP_PRI344_MASK)
#define S32_NVIC_IP_PRI345_MASK	                 0xFFu
#define S32_NVIC_IP_PRI345_SHIFT	             0u
#define S32_NVIC_IP_PRI345_WIDTH	             8u
#define S32_NVIC_IP_PRI345(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI345_SHIFT))&S32_NVIC_IP_PRI345_MASK)
#define S32_NVIC_IP_PRI345_MASK	                 0xFFu
#define S32_NVIC_IP_PRI346_SHIFT	             0u
#define S32_NVIC_IP_PRI346_WIDTH	             8u
#define S32_NVIC_IP_PRI346(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI346_SHIFT))&S32_NVIC_IP_PRI346_MASK)
#define S32_NVIC_IP_PRI346_MASK	                 0xFFu
#define S32_NVIC_IP_PRI346_SHIFT	             0u
#define S32_NVIC_IP_PRI347_WIDTH	             8u
#define S32_NVIC_IP_PRI347(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI347_SHIFT))&S32_NVIC_IP_PRI347_MASK)
#define S32_NVIC_IP_PRI347_MASK	                 0xFFu
#define S32_NVIC_IP_PRI347_SHIFT	             0u
#define S32_NVIC_IP_PRI347_WIDTH	             8u
#define S32_NVIC_IP_PRI348(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI348_SHIFT))&S32_NVIC_IP_PRI348_MASK)
#define S32_NVIC_IP_PRI348_MASK	                 0xFFu
#define S32_NVIC_IP_PRI348_SHIFT	             0u
#define S32_NVIC_IP_PRI348_WIDTH	             8u
#define S32_NVIC_IP_PRI348(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI348_SHIFT))&S32_NVIC_IP_PRI348_MASK)
#define S32_NVIC_IP_PRI349_MASK	                 0xFFu
#define S32_NVIC_IP_PRI349_SHIFT	             0u
#define S32_NVIC_IP_PRI349_WIDTH	             8u
#define S32_NVIC_IP_PRI349(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI349_SHIFT))&S32_NVIC_IP_PRI349_MASK)
#define S32_NVIC_IP_PRI349_MASK	                 0xFFu
#define S32_NVIC_IP_PRI350_SHIFT	             0u
#define S32_NVIC_IP_PRI350_WIDTH	             8u
#define S32_NVIC_IP_PRI350(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI350_SHIFT))&S32_NVIC_IP_PRI350_MASK)
#define S32_NVIC_IP_PRI350_MASK	                 0xFFu
#define S32_NVIC_IP_PRI350_SHIFT	             0u
#define S32_NVIC_IP_PRI351_WIDTH	             8u
#define S32_NVIC_IP_PRI351(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI351_SHIFT))&S32_NVIC_IP_PRI351_MASK)
#define S32_NVIC_IP_PRI351_MASK	                 0xFFu
#define S32_NVIC_IP_PRI351_SHIFT	             0u
#define S32_NVIC_IP_PRI351_WIDTH	             8u
#define S32_NVIC_IP_PRI352(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI352_SHIFT))&S32_NVIC_IP_PRI352_MASK)
#define S32_NVIC_IP_PRI352_MASK	                 0xFFu
#define S32_NVIC_IP_PRI352_SHIFT	             0u
#define S32_NVIC_IP_PRI352_WIDTH	             8u
#define S32_NVIC_IP_PRI352(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI352_SHIFT))&S32_NVIC_IP_PRI352_MASK)
#define S32_NVIC_IP_PRI353_MASK	                 0xFFu
#define S32_NVIC_IP_PRI353_SHIFT	             0u
#define S32_NVIC_IP_PRI353_WIDTH	             8u
#define S32_NVIC_IP_PRI353(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI353_SHIFT))&S32_NVIC_IP_PRI353_MASK)
#define S32_NVIC_IP_PRI353_MASK	                 0xFFu
#define S32_NVIC_IP_PRI354_SHIFT	             0u
#define S32_NVIC_IP_PRI354_WIDTH	             8u
#define S32_NVIC_IP_PRI354(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI354_SHIFT))&S32_NVIC_IP_PRI354_MASK)
#define S32_NVIC_IP_PRI354_MASK	                 0xFFu
#define S32_NVIC_IP_PRI354_SHIFT	             0u
#define S32_NVIC_IP_PRI355_WIDTH	             8u
#define S32_NVIC_IP_PRI355(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI355_SHIFT))&S32_NVIC_IP_PRI355_MASK)
#define S32_NVIC_IP_PRI355_MASK	                 0xFFu
#define S32_NVIC_IP_PRI355_SHIFT	             0u
#define S32_NVIC_IP_PRI355_WIDTH	             8u
#define S32_NVIC_IP_PRI356(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI356_SHIFT))&S32_NVIC_IP_PRI356_MASK)
#define S32_NVIC_IP_PRI356_MASK	                 0xFFu
#define S32_NVIC_IP_PRI356_SHIFT	             0u
#define S32_NVIC_IP_PRI356_WIDTH	             8u
#define S32_NVIC_IP_PRI356(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI356_SHIFT))&S32_NVIC_IP_PRI356_MASK)
#define S32_NVIC_IP_PRI357_MASK	                 0xFFu
#define S32_NVIC_IP_PRI357_SHIFT	             0u
#define S32_NVIC_IP_PRI357_WIDTH	             8u
#define S32_NVIC_IP_PRI357(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI357_SHIFT))&S32_NVIC_IP_PRI357_MASK)
#define S32_NVIC_IP_PRI357_MASK	                 0xFFu
#define S32_NVIC_IP_PRI358_SHIFT	             0u
#define S32_NVIC_IP_PRI358_WIDTH	             8u
#define S32_NVIC_IP_PRI358(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI358_SHIFT))&S32_NVIC_IP_PRI358_MASK)
#define S32_NVIC_IP_PRI358_MASK	                 0xFFu
#define S32_NVIC_IP_PRI358_SHIFT	             0u
#define S32_NVIC_IP_PRI359_WIDTH	             8u
#define S32_NVIC_IP_PRI359(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI359_SHIFT))&S32_NVIC_IP_PRI359_MASK)
#define S32_NVIC_IP_PRI359_MASK	                 0xFFu
#define S32_NVIC_IP_PRI359_SHIFT	             0u
#define S32_NVIC_IP_PRI359_WIDTH	             8u
#define S32_NVIC_IP_PRI360(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI360_SHIFT))&S32_NVIC_IP_PRI360_MASK)
#define S32_NVIC_IP_PRI360_MASK	                 0xFFu
#define S32_NVIC_IP_PRI360_SHIFT	             0u
#define S32_NVIC_IP_PRI360_WIDTH	             8u
#define S32_NVIC_IP_PRI360(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI360_SHIFT))&S32_NVIC_IP_PRI360_MASK)
#define S32_NVIC_IP_PRI361_MASK	                 0xFFu
#define S32_NVIC_IP_PRI361_SHIFT	             0u
#define S32_NVIC_IP_PRI361_WIDTH	             8u
#define S32_NVIC_IP_PRI361(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI361_SHIFT))&S32_NVIC_IP_PRI361_MASK)
#define S32_NVIC_IP_PRI361_MASK	                 0xFFu
#define S32_NVIC_IP_PRI362_SHIFT	             0u
#define S32_NVIC_IP_PRI362_WIDTH	             8u
#define S32_NVIC_IP_PRI362(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI362_SHIFT))&S32_NVIC_IP_PRI362_MASK)
#define S32_NVIC_IP_PRI362_MASK	                 0xFFu
#define S32_NVIC_IP_PRI362_SHIFT	             0u
#define S32_NVIC_IP_PRI363_WIDTH	             8u
#define S32_NVIC_IP_PRI363(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI363_SHIFT))&S32_NVIC_IP_PRI363_MASK)
#define S32_NVIC_IP_PRI363_MASK	                 0xFFu
#define S32_NVIC_IP_PRI363_SHIFT	             0u
#define S32_NVIC_IP_PRI363_WIDTH	             8u
#define S32_NVIC_IP_PRI364(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI364_SHIFT))&S32_NVIC_IP_PRI364_MASK)
#define S32_NVIC_IP_PRI364_MASK	                 0xFFu
#define S32_NVIC_IP_PRI364_SHIFT	             0u
#define S32_NVIC_IP_PRI364_WIDTH	             8u
#define S32_NVIC_IP_PRI364(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI364_SHIFT))&S32_NVIC_IP_PRI364_MASK)
#define S32_NVIC_IP_PRI365_MASK	                 0xFFu
#define S32_NVIC_IP_PRI365_SHIFT	             0u
#define S32_NVIC_IP_PRI365_WIDTH	             8u
#define S32_NVIC_IP_PRI365(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI365_SHIFT))&S32_NVIC_IP_PRI365_MASK)
#define S32_NVIC_IP_PRI365_MASK	                 0xFFu
#define S32_NVIC_IP_PRI366_SHIFT	             0u
#define S32_NVIC_IP_PRI366_WIDTH	             8u
#define S32_NVIC_IP_PRI366(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI366_SHIFT))&S32_NVIC_IP_PRI366_MASK)
#define S32_NVIC_IP_PRI366_MASK	                 0xFFu
#define S32_NVIC_IP_PRI366_SHIFT	             0u
#define S32_NVIC_IP_PRI367_WIDTH	             8u
#define S32_NVIC_IP_PRI367(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI367_SHIFT))&S32_NVIC_IP_PRI367_MASK)
#define S32_NVIC_IP_PRI367_MASK	                 0xFFu
#define S32_NVIC_IP_PRI367_SHIFT	             0u
#define S32_NVIC_IP_PRI367_WIDTH	             8u
#define S32_NVIC_IP_PRI368(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI368_SHIFT))&S32_NVIC_IP_PRI368_MASK)
#define S32_NVIC_IP_PRI368_MASK	                 0xFFu
#define S32_NVIC_IP_PRI368_SHIFT	             0u
#define S32_NVIC_IP_PRI368_WIDTH	             8u
#define S32_NVIC_IP_PRI368(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI368_SHIFT))&S32_NVIC_IP_PRI368_MASK)
#define S32_NVIC_IP_PRI369_MASK	                 0xFFu
#define S32_NVIC_IP_PRI369_SHIFT	             0u
#define S32_NVIC_IP_PRI369_WIDTH	             8u
#define S32_NVIC_IP_PRI369(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI369_SHIFT))&S32_NVIC_IP_PRI369_MASK)
#define S32_NVIC_IP_PRI369_MASK	                 0xFFu
#define S32_NVIC_IP_PRI370_SHIFT	             0u
#define S32_NVIC_IP_PRI370_WIDTH	             8u
#define S32_NVIC_IP_PRI370(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI370_SHIFT))&S32_NVIC_IP_PRI370_MASK)
#define S32_NVIC_IP_PRI370_MASK	                 0xFFu
#define S32_NVIC_IP_PRI370_SHIFT	             0u
#define S32_NVIC_IP_PRI371_WIDTH	             8u
#define S32_NVIC_IP_PRI371(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI371_SHIFT))&S32_NVIC_IP_PRI371_MASK)
#define S32_NVIC_IP_PRI371_MASK	                 0xFFu
#define S32_NVIC_IP_PRI371_SHIFT	             0u
#define S32_NVIC_IP_PRI371_WIDTH	             8u
#define S32_NVIC_IP_PRI372(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI372_SHIFT))&S32_NVIC_IP_PRI372_MASK)
#define S32_NVIC_IP_PRI372_MASK	                 0xFFu
#define S32_NVIC_IP_PRI372_SHIFT	             0u
#define S32_NVIC_IP_PRI372_WIDTH	             8u
#define S32_NVIC_IP_PRI372(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI372_SHIFT))&S32_NVIC_IP_PRI372_MASK)
#define S32_NVIC_IP_PRI373_MASK	                 0xFFu
#define S32_NVIC_IP_PRI373_SHIFT	             0u
#define S32_NVIC_IP_PRI373_WIDTH	             8u
#define S32_NVIC_IP_PRI373(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI373_SHIFT))&S32_NVIC_IP_PRI373_MASK)
#define S32_NVIC_IP_PRI373_MASK	                 0xFFu
#define S32_NVIC_IP_PRI374_SHIFT	             0u
#define S32_NVIC_IP_PRI374_WIDTH	             8u
#define S32_NVIC_IP_PRI374(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI374_SHIFT))&S32_NVIC_IP_PRI374_MASK)
#define S32_NVIC_IP_PRI374_MASK	                 0xFFu
#define S32_NVIC_IP_PRI374_SHIFT	             0u
#define S32_NVIC_IP_PRI375_WIDTH	             8u
#define S32_NVIC_IP_PRI375(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI375_SHIFT))&S32_NVIC_IP_PRI375_MASK)
#define S32_NVIC_IP_PRI375_MASK	                 0xFFu
#define S32_NVIC_IP_PRI375_SHIFT	             0u
#define S32_NVIC_IP_PRI375_WIDTH	             8u
#define S32_NVIC_IP_PRI376(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI376_SHIFT))&S32_NVIC_IP_PRI376_MASK)
#define S32_NVIC_IP_PRI376_MASK	                 0xFFu
#define S32_NVIC_IP_PRI376_SHIFT	             0u
#define S32_NVIC_IP_PRI376_WIDTH	             8u
#define S32_NVIC_IP_PRI376(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI376_SHIFT))&S32_NVIC_IP_PRI376_MASK)
#define S32_NVIC_IP_PRI377_MASK	                 0xFFu
#define S32_NVIC_IP_PRI377_SHIFT	             0u
#define S32_NVIC_IP_PRI377_WIDTH	             8u
#define S32_NVIC_IP_PRI377(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI377_SHIFT))&S32_NVIC_IP_PRI377_MASK)
#define S32_NVIC_IP_PRI377_MASK	                 0xFFu
#define S32_NVIC_IP_PRI378_SHIFT	             0u
#define S32_NVIC_IP_PRI378_WIDTH	             8u
#define S32_NVIC_IP_PRI378(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI378_SHIFT))&S32_NVIC_IP_PRI378_MASK)
#define S32_NVIC_IP_PRI378_MASK	                 0xFFu
#define S32_NVIC_IP_PRI378_SHIFT	             0u
#define S32_NVIC_IP_PRI379_WIDTH	             8u
#define S32_NVIC_IP_PRI379(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI379_SHIFT))&S32_NVIC_IP_PRI379_MASK)
#define S32_NVIC_IP_PRI379_MASK	                 0xFFu
#define S32_NVIC_IP_PRI379_SHIFT	             0u
#define S32_NVIC_IP_PRI379_WIDTH	             8u
#define S32_NVIC_IP_PRI380(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI380_SHIFT))&S32_NVIC_IP_PRI380_MASK)
#define S32_NVIC_IP_PRI380_MASK	                 0xFFu
#define S32_NVIC_IP_PRI380_SHIFT	             0u
#define S32_NVIC_IP_PRI380_WIDTH	             8u
#define S32_NVIC_IP_PRI380(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI380_SHIFT))&S32_NVIC_IP_PRI380_MASK)
#define S32_NVIC_IP_PRI381_MASK	                 0xFFu
#define S32_NVIC_IP_PRI381_SHIFT	             0u
#define S32_NVIC_IP_PRI381_WIDTH	             8u
#define S32_NVIC_IP_PRI381(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI381_SHIFT))&S32_NVIC_IP_PRI381_MASK)
#define S32_NVIC_IP_PRI381_MASK	                 0xFFu
#define S32_NVIC_IP_PRI382_SHIFT	             0u
#define S32_NVIC_IP_PRI382_WIDTH	             8u
#define S32_NVIC_IP_PRI382(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI382_SHIFT))&S32_NVIC_IP_PRI382_MASK)
#define S32_NVIC_IP_PRI382_MASK	                 0xFFu
#define S32_NVIC_IP_PRI382_SHIFT	             0u
#define S32_NVIC_IP_PRI383_WIDTH	             8u
#define S32_NVIC_IP_PRI383(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI383_SHIFT))&S32_NVIC_IP_PRI383_MASK)
#define S32_NVIC_IP_PRI383_MASK	                 0xFFu
#define S32_NVIC_IP_PRI383_SHIFT	             0u
#define S32_NVIC_IP_PRI383_WIDTH	             8u
#define S32_NVIC_IP_PRI384(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI384_SHIFT))&S32_NVIC_IP_PRI384_MASK)
#define S32_NVIC_IP_PRI384_MASK	                 0xFFu
#define S32_NVIC_IP_PRI384_SHIFT	             0u
#define S32_NVIC_IP_PRI384_WIDTH	             8u
#define S32_NVIC_IP_PRI384(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI384_SHIFT))&S32_NVIC_IP_PRI384_MASK)
#define S32_NVIC_IP_PRI385_MASK	                 0xFFu
#define S32_NVIC_IP_PRI385_SHIFT	             0u
#define S32_NVIC_IP_PRI385_WIDTH	             8u
#define S32_NVIC_IP_PRI385(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI385_SHIFT))&S32_NVIC_IP_PRI385_MASK)
#define S32_NVIC_IP_PRI385_MASK	                 0xFFu
#define S32_NVIC_IP_PRI386_SHIFT	             0u
#define S32_NVIC_IP_PRI386_WIDTH	             8u
#define S32_NVIC_IP_PRI386(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI386_SHIFT))&S32_NVIC_IP_PRI386_MASK)
#define S32_NVIC_IP_PRI386_MASK	                 0xFFu
#define S32_NVIC_IP_PRI386_SHIFT	             0u
#define S32_NVIC_IP_PRI387_WIDTH	             8u
#define S32_NVIC_IP_PRI387(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI387_SHIFT))&S32_NVIC_IP_PRI387_MASK)
#define S32_NVIC_IP_PRI387_MASK	                 0xFFu
#define S32_NVIC_IP_PRI387_SHIFT	             0u
#define S32_NVIC_IP_PRI387_WIDTH	             8u
#define S32_NVIC_IP_PRI388(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI388_SHIFT))&S32_NVIC_IP_PRI388_MASK)
#define S32_NVIC_IP_PRI388_MASK	                 0xFFu
#define S32_NVIC_IP_PRI388_SHIFT	             0u
#define S32_NVIC_IP_PRI388_WIDTH	             8u
#define S32_NVIC_IP_PRI388(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI388_SHIFT))&S32_NVIC_IP_PRI388_MASK)
#define S32_NVIC_IP_PRI389_MASK	                 0xFFu
#define S32_NVIC_IP_PRI389_SHIFT	             0u
#define S32_NVIC_IP_PRI389_WIDTH	             8u
#define S32_NVIC_IP_PRI389(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI389_SHIFT))&S32_NVIC_IP_PRI389_MASK)
#define S32_NVIC_IP_PRI389_MASK	                 0xFFu
#define S32_NVIC_IP_PRI390_SHIFT	             0u
#define S32_NVIC_IP_PRI390_WIDTH	             8u
#define S32_NVIC_IP_PRI390(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI390_SHIFT))&S32_NVIC_IP_PRI390_MASK)
#define S32_NVIC_IP_PRI390_MASK	                 0xFFu
#define S32_NVIC_IP_PRI390_SHIFT	             0u
#define S32_NVIC_IP_PRI391_WIDTH	             8u
#define S32_NVIC_IP_PRI391(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI391_SHIFT))&S32_NVIC_IP_PRI391_MASK)
#define S32_NVIC_IP_PRI391_MASK	                 0xFFu
#define S32_NVIC_IP_PRI391_SHIFT	             0u
#define S32_NVIC_IP_PRI391_WIDTH	             8u
#define S32_NVIC_IP_PRI392(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI392_SHIFT))&S32_NVIC_IP_PRI392_MASK)
#define S32_NVIC_IP_PRI392_MASK	                 0xFFu
#define S32_NVIC_IP_PRI392_SHIFT	             0u
#define S32_NVIC_IP_PRI392_WIDTH	             8u
#define S32_NVIC_IP_PRI392(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI392_SHIFT))&S32_NVIC_IP_PRI392_MASK)
#define S32_NVIC_IP_PRI393_MASK	                 0xFFu
#define S32_NVIC_IP_PRI393_SHIFT	             0u
#define S32_NVIC_IP_PRI393_WIDTH	             8u
#define S32_NVIC_IP_PRI393(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI393_SHIFT))&S32_NVIC_IP_PRI393_MASK)
#define S32_NVIC_IP_PRI393_MASK	                 0xFFu
#define S32_NVIC_IP_PRI394_SHIFT	             0u
#define S32_NVIC_IP_PRI394_WIDTH	             8u
#define S32_NVIC_IP_PRI394(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI394_SHIFT))&S32_NVIC_IP_PRI394_MASK)
#define S32_NVIC_IP_PRI394_MASK	                 0xFFu
#define S32_NVIC_IP_PRI394_SHIFT	             0u
#define S32_NVIC_IP_PRI395_WIDTH	             8u
#define S32_NVIC_IP_PRI395(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI395_SHIFT))&S32_NVIC_IP_PRI395_MASK)
#define S32_NVIC_IP_PRI395_MASK	                 0xFFu
#define S32_NVIC_IP_PRI395_SHIFT	             0u
#define S32_NVIC_IP_PRI395_WIDTH	             8u
#define S32_NVIC_IP_PRI396(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI396_SHIFT))&S32_NVIC_IP_PRI396_MASK)
#define S32_NVIC_IP_PRI396_MASK	                 0xFFu
#define S32_NVIC_IP_PRI396_SHIFT	             0u
#define S32_NVIC_IP_PRI396_WIDTH	             8u
#define S32_NVIC_IP_PRI396(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI396_SHIFT))&S32_NVIC_IP_PRI396_MASK)
#define S32_NVIC_IP_PRI397_MASK	                 0xFFu
#define S32_NVIC_IP_PRI397_SHIFT	             0u
#define S32_NVIC_IP_PRI397_WIDTH	             8u
#define S32_NVIC_IP_PRI397(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI397_SHIFT))&S32_NVIC_IP_PRI397_MASK)
#define S32_NVIC_IP_PRI397_MASK	                 0xFFu
#define S32_NVIC_IP_PRI398_SHIFT	             0u
#define S32_NVIC_IP_PRI398_WIDTH	             8u
#define S32_NVIC_IP_PRI398(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI398_SHIFT))&S32_NVIC_IP_PRI398_MASK)
#define S32_NVIC_IP_PRI398_MASK	                 0xFFu
#define S32_NVIC_IP_PRI398_SHIFT	             0u
#define S32_NVIC_IP_PRI399_WIDTH	             8u
#define S32_NVIC_IP_PRI399(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI399_SHIFT))&S32_NVIC_IP_PRI399_MASK)
#define S32_NVIC_IP_PRI399_MASK	                 0xFFu
#define S32_NVIC_IP_PRI399_SHIFT	             0u
#define S32_NVIC_IP_PRI399_WIDTH	             8u
#define S32_NVIC_IP_PRI400(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI400_SHIFT))&S32_NVIC_IP_PRI400_MASK)
#define S32_NVIC_IP_PRI400_MASK	                 0xFFu
#define S32_NVIC_IP_PRI400_SHIFT	             0u
#define S32_NVIC_IP_PRI400_WIDTH	             8u
#define S32_NVIC_IP_PRI400(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI400_SHIFT))&S32_NVIC_IP_PRI400_MASK)
#define S32_NVIC_IP_PRI401_MASK	                 0xFFu
#define S32_NVIC_IP_PRI401_SHIFT	             0u
#define S32_NVIC_IP_PRI401_WIDTH	             8u
#define S32_NVIC_IP_PRI401(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI401_SHIFT))&S32_NVIC_IP_PRI401_MASK)
#define S32_NVIC_IP_PRI401_MASK	                 0xFFu
#define S32_NVIC_IP_PRI402_SHIFT	             0u
#define S32_NVIC_IP_PRI402_WIDTH	             8u
#define S32_NVIC_IP_PRI402(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI402_SHIFT))&S32_NVIC_IP_PRI402_MASK)
#define S32_NVIC_IP_PRI402_MASK	                 0xFFu
#define S32_NVIC_IP_PRI402_SHIFT	             0u
#define S32_NVIC_IP_PRI403_WIDTH	             8u
#define S32_NVIC_IP_PRI403(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI403_SHIFT))&S32_NVIC_IP_PRI403_MASK)
#define S32_NVIC_IP_PRI403_MASK	                 0xFFu
#define S32_NVIC_IP_PRI403_SHIFT	             0u
#define S32_NVIC_IP_PRI403_WIDTH	             8u
#define S32_NVIC_IP_PRI404(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI404_SHIFT))&S32_NVIC_IP_PRI404_MASK)
#define S32_NVIC_IP_PRI404_MASK	                 0xFFu
#define S32_NVIC_IP_PRI404_SHIFT	             0u
#define S32_NVIC_IP_PRI404_WIDTH	             8u
#define S32_NVIC_IP_PRI404(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI404_SHIFT))&S32_NVIC_IP_PRI404_MASK)
#define S32_NVIC_IP_PRI405_MASK	                 0xFFu
#define S32_NVIC_IP_PRI405_SHIFT	             0u
#define S32_NVIC_IP_PRI405_WIDTH	             8u
#define S32_NVIC_IP_PRI405(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI405_SHIFT))&S32_NVIC_IP_PRI405_MASK)
#define S32_NVIC_IP_PRI405_MASK	                 0xFFu
#define S32_NVIC_IP_PRI406_SHIFT	             0u
#define S32_NVIC_IP_PRI406_WIDTH	             8u
#define S32_NVIC_IP_PRI406(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI406_SHIFT))&S32_NVIC_IP_PRI406_MASK)
#define S32_NVIC_IP_PRI406_MASK	                 0xFFu
#define S32_NVIC_IP_PRI406_SHIFT	             0u
#define S32_NVIC_IP_PRI407_WIDTH	             8u
#define S32_NVIC_IP_PRI407(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI407_SHIFT))&S32_NVIC_IP_PRI407_MASK)
#define S32_NVIC_IP_PRI407_MASK	                 0xFFu
#define S32_NVIC_IP_PRI407_SHIFT	             0u
#define S32_NVIC_IP_PRI407_WIDTH	             8u
#define S32_NVIC_IP_PRI408(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI408_SHIFT))&S32_NVIC_IP_PRI408_MASK)
#define S32_NVIC_IP_PRI408_MASK	                 0xFFu
#define S32_NVIC_IP_PRI408_SHIFT	             0u
#define S32_NVIC_IP_PRI408_WIDTH	             8u
#define S32_NVIC_IP_PRI408(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI408_SHIFT))&S32_NVIC_IP_PRI408_MASK)
#define S32_NVIC_IP_PRI409_MASK	                 0xFFu
#define S32_NVIC_IP_PRI409_SHIFT	             0u
#define S32_NVIC_IP_PRI409_WIDTH	             8u
#define S32_NVIC_IP_PRI409(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI409_SHIFT))&S32_NVIC_IP_PRI409_MASK)
#define S32_NVIC_IP_PRI409_MASK	                 0xFFu
#define S32_NVIC_IP_PRI410_SHIFT	             0u
#define S32_NVIC_IP_PRI410_WIDTH	             8u
#define S32_NVIC_IP_PRI410(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI410_SHIFT))&S32_NVIC_IP_PRI410_MASK)
#define S32_NVIC_IP_PRI410_MASK	                 0xFFu
#define S32_NVIC_IP_PRI410_SHIFT	             0u
#define S32_NVIC_IP_PRI411_WIDTH	             8u
#define S32_NVIC_IP_PRI411(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI411_SHIFT))&S32_NVIC_IP_PRI411_MASK)
#define S32_NVIC_IP_PRI411_MASK	                 0xFFu
#define S32_NVIC_IP_PRI411_SHIFT	             0u
#define S32_NVIC_IP_PRI411_WIDTH	             8u
#define S32_NVIC_IP_PRI412(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI412_SHIFT))&S32_NVIC_IP_PRI412_MASK)
#define S32_NVIC_IP_PRI412_MASK	                 0xFFu
#define S32_NVIC_IP_PRI412_SHIFT	             0u
#define S32_NVIC_IP_PRI412_WIDTH	             8u
#define S32_NVIC_IP_PRI412(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI412_SHIFT))&S32_NVIC_IP_PRI412_MASK)
#define S32_NVIC_IP_PRI413_MASK	                 0xFFu
#define S32_NVIC_IP_PRI413_SHIFT	             0u
#define S32_NVIC_IP_PRI413_WIDTH	             8u
#define S32_NVIC_IP_PRI413(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI413_SHIFT))&S32_NVIC_IP_PRI413_MASK)
#define S32_NVIC_IP_PRI413_MASK	                 0xFFu
#define S32_NVIC_IP_PRI414_SHIFT	             0u
#define S32_NVIC_IP_PRI414_WIDTH	             8u
#define S32_NVIC_IP_PRI414(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI414_SHIFT))&S32_NVIC_IP_PRI414_MASK)
#define S32_NVIC_IP_PRI414_MASK	                 0xFFu
#define S32_NVIC_IP_PRI414_SHIFT	             0u
#define S32_NVIC_IP_PRI415_WIDTH	             8u
#define S32_NVIC_IP_PRI415(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI415_SHIFT))&S32_NVIC_IP_PRI415_MASK)
#define S32_NVIC_IP_PRI415_MASK	                 0xFFu
#define S32_NVIC_IP_PRI415_SHIFT	             0u
#define S32_NVIC_IP_PRI415_WIDTH	             8u
#define S32_NVIC_IP_PRI416(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI416_SHIFT))&S32_NVIC_IP_PRI416_MASK)
#define S32_NVIC_IP_PRI416_MASK	                 0xFFu
#define S32_NVIC_IP_PRI416_SHIFT	             0u
#define S32_NVIC_IP_PRI416_WIDTH	             8u
#define S32_NVIC_IP_PRI416(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI416_SHIFT))&S32_NVIC_IP_PRI416_MASK)
#define S32_NVIC_IP_PRI417_MASK	                 0xFFu
#define S32_NVIC_IP_PRI417_SHIFT	             0u
#define S32_NVIC_IP_PRI417_WIDTH	             8u
#define S32_NVIC_IP_PRI417(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI417_SHIFT))&S32_NVIC_IP_PRI417_MASK)
#define S32_NVIC_IP_PRI417_MASK	                 0xFFu
#define S32_NVIC_IP_PRI418_SHIFT	             0u
#define S32_NVIC_IP_PRI418_WIDTH	             8u
#define S32_NVIC_IP_PRI418(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI418_SHIFT))&S32_NVIC_IP_PRI418_MASK)
#define S32_NVIC_IP_PRI418_MASK	                 0xFFu
#define S32_NVIC_IP_PRI418_SHIFT	             0u
#define S32_NVIC_IP_PRI419_WIDTH	             8u
#define S32_NVIC_IP_PRI419(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI419_SHIFT))&S32_NVIC_IP_PRI419_MASK)
#define S32_NVIC_IP_PRI419_MASK	                 0xFFu
#define S32_NVIC_IP_PRI419_SHIFT	             0u
#define S32_NVIC_IP_PRI419_WIDTH	             8u
#define S32_NVIC_IP_PRI420(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI420_SHIFT))&S32_NVIC_IP_PRI420_MASK)
#define S32_NVIC_IP_PRI420_MASK	                 0xFFu
#define S32_NVIC_IP_PRI420_SHIFT	             0u
#define S32_NVIC_IP_PRI420_WIDTH	             8u
#define S32_NVIC_IP_PRI420(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI420_SHIFT))&S32_NVIC_IP_PRI420_MASK)
#define S32_NVIC_IP_PRI421_MASK	                 0xFFu
#define S32_NVIC_IP_PRI421_SHIFT	             0u
#define S32_NVIC_IP_PRI421_WIDTH	             8u
#define S32_NVIC_IP_PRI421(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI421_SHIFT))&S32_NVIC_IP_PRI421_MASK)
#define S32_NVIC_IP_PRI421_MASK	                 0xFFu
#define S32_NVIC_IP_PRI422_SHIFT	             0u
#define S32_NVIC_IP_PRI422_WIDTH	             8u
#define S32_NVIC_IP_PRI422(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI422_SHIFT))&S32_NVIC_IP_PRI422_MASK)
#define S32_NVIC_IP_PRI422_MASK	                 0xFFu
#define S32_NVIC_IP_PRI422_SHIFT	             0u
#define S32_NVIC_IP_PRI423_WIDTH	             8u
#define S32_NVIC_IP_PRI423(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI423_SHIFT))&S32_NVIC_IP_PRI423_MASK)
#define S32_NVIC_IP_PRI423_MASK	                 0xFFu
#define S32_NVIC_IP_PRI423_SHIFT	             0u
#define S32_NVIC_IP_PRI423_WIDTH	             8u
#define S32_NVIC_IP_PRI424(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI424_SHIFT))&S32_NVIC_IP_PRI424_MASK)
#define S32_NVIC_IP_PRI424_MASK	                 0xFFu
#define S32_NVIC_IP_PRI424_SHIFT	             0u
#define S32_NVIC_IP_PRI424_WIDTH	             8u
#define S32_NVIC_IP_PRI424(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI424_SHIFT))&S32_NVIC_IP_PRI424_MASK)
#define S32_NVIC_IP_PRI425_MASK	                 0xFFu
#define S32_NVIC_IP_PRI425_SHIFT	             0u
#define S32_NVIC_IP_PRI425_WIDTH	             8u
#define S32_NVIC_IP_PRI425(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI425_SHIFT))&S32_NVIC_IP_PRI425_MASK)
#define S32_NVIC_IP_PRI425_MASK	                 0xFFu
#define S32_NVIC_IP_PRI426_SHIFT	             0u
#define S32_NVIC_IP_PRI426_WIDTH	             8u
#define S32_NVIC_IP_PRI426(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI426_SHIFT))&S32_NVIC_IP_PRI426_MASK)
#define S32_NVIC_IP_PRI426_MASK	                 0xFFu
#define S32_NVIC_IP_PRI426_SHIFT	             0u
#define S32_NVIC_IP_PRI427_WIDTH	             8u
#define S32_NVIC_IP_PRI427(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI427_SHIFT))&S32_NVIC_IP_PRI427_MASK)
#define S32_NVIC_IP_PRI427_MASK	                 0xFFu
#define S32_NVIC_IP_PRI427_SHIFT	             0u
#define S32_NVIC_IP_PRI427_WIDTH	             8u
#define S32_NVIC_IP_PRI428(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI428_SHIFT))&S32_NVIC_IP_PRI428_MASK)
#define S32_NVIC_IP_PRI428_MASK	                 0xFFu
#define S32_NVIC_IP_PRI428_SHIFT	             0u
#define S32_NVIC_IP_PRI428_WIDTH	             8u
#define S32_NVIC_IP_PRI428(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI428_SHIFT))&S32_NVIC_IP_PRI428_MASK)
#define S32_NVIC_IP_PRI429_MASK	                 0xFFu
#define S32_NVIC_IP_PRI429_SHIFT	             0u
#define S32_NVIC_IP_PRI429_WIDTH	             8u
#define S32_NVIC_IP_PRI429(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI429_SHIFT))&S32_NVIC_IP_PRI429_MASK)
#define S32_NVIC_IP_PRI429_MASK	                 0xFFu
#define S32_NVIC_IP_PRI430_SHIFT	             0u
#define S32_NVIC_IP_PRI430_WIDTH	             8u
#define S32_NVIC_IP_PRI430(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI430_SHIFT))&S32_NVIC_IP_PRI430_MASK)
#define S32_NVIC_IP_PRI430_MASK	                 0xFFu
#define S32_NVIC_IP_PRI430_SHIFT	             0u
#define S32_NVIC_IP_PRI431_WIDTH	             8u
#define S32_NVIC_IP_PRI431(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI431_SHIFT))&S32_NVIC_IP_PRI431_MASK)
#define S32_NVIC_IP_PRI431_MASK	                 0xFFu
#define S32_NVIC_IP_PRI431_SHIFT	             0u
#define S32_NVIC_IP_PRI431_WIDTH	             8u
#define S32_NVIC_IP_PRI432(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI432_SHIFT))&S32_NVIC_IP_PRI432_MASK)
#define S32_NVIC_IP_PRI432_MASK	                 0xFFu
#define S32_NVIC_IP_PRI432_SHIFT	             0u
#define S32_NVIC_IP_PRI432_WIDTH	             8u
#define S32_NVIC_IP_PRI432(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI432_SHIFT))&S32_NVIC_IP_PRI432_MASK)
#define S32_NVIC_IP_PRI433_MASK	                 0xFFu
#define S32_NVIC_IP_PRI433_SHIFT	             0u
#define S32_NVIC_IP_PRI433_WIDTH	             8u
#define S32_NVIC_IP_PRI433(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI433_SHIFT))&S32_NVIC_IP_PRI433_MASK)
#define S32_NVIC_IP_PRI433_MASK	                 0xFFu
#define S32_NVIC_IP_PRI434_SHIFT	             0u
#define S32_NVIC_IP_PRI434_WIDTH	             8u
#define S32_NVIC_IP_PRI434(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI434_SHIFT))&S32_NVIC_IP_PRI434_MASK)
#define S32_NVIC_IP_PRI434_MASK	                 0xFFu
#define S32_NVIC_IP_PRI434_SHIFT	             0u
#define S32_NVIC_IP_PRI435_WIDTH	             8u
#define S32_NVIC_IP_PRI435(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI435_SHIFT))&S32_NVIC_IP_PRI435_MASK)
#define S32_NVIC_IP_PRI435_MASK	                 0xFFu
#define S32_NVIC_IP_PRI435_SHIFT	             0u
#define S32_NVIC_IP_PRI435_WIDTH	             8u
#define S32_NVIC_IP_PRI436(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI436_SHIFT))&S32_NVIC_IP_PRI436_MASK)
#define S32_NVIC_IP_PRI436_MASK	                 0xFFu
#define S32_NVIC_IP_PRI436_SHIFT	             0u
#define S32_NVIC_IP_PRI436_WIDTH	             8u
#define S32_NVIC_IP_PRI436(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI436_SHIFT))&S32_NVIC_IP_PRI436_MASK)
#define S32_NVIC_IP_PRI437_MASK	                 0xFFu
#define S32_NVIC_IP_PRI437_SHIFT	             0u
#define S32_NVIC_IP_PRI437_WIDTH	             8u
#define S32_NVIC_IP_PRI437(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI437_SHIFT))&S32_NVIC_IP_PRI437_MASK)
#define S32_NVIC_IP_PRI437_MASK	                 0xFFu
#define S32_NVIC_IP_PRI438_SHIFT	             0u
#define S32_NVIC_IP_PRI438_WIDTH	             8u
#define S32_NVIC_IP_PRI438(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI438_SHIFT))&S32_NVIC_IP_PRI438_MASK)
#define S32_NVIC_IP_PRI438_MASK	                 0xFFu
#define S32_NVIC_IP_PRI438_SHIFT	             0u
#define S32_NVIC_IP_PRI439_WIDTH	             8u
#define S32_NVIC_IP_PRI439(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI439_SHIFT))&S32_NVIC_IP_PRI439_MASK)
#define S32_NVIC_IP_PRI439_MASK	                 0xFFu
#define S32_NVIC_IP_PRI439_SHIFT	             0u
#define S32_NVIC_IP_PRI439_WIDTH	             8u
#define S32_NVIC_IP_PRI440(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI440_SHIFT))&S32_NVIC_IP_PRI440_MASK)
#define S32_NVIC_IP_PRI440_MASK	                 0xFFu
#define S32_NVIC_IP_PRI440_SHIFT	             0u
#define S32_NVIC_IP_PRI440_WIDTH	             8u
#define S32_NVIC_IP_PRI440(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI440_SHIFT))&S32_NVIC_IP_PRI440_MASK)
#define S32_NVIC_IP_PRI441_MASK	                 0xFFu
#define S32_NVIC_IP_PRI441_SHIFT	             0u
#define S32_NVIC_IP_PRI441_WIDTH	             8u
#define S32_NVIC_IP_PRI441(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI441_SHIFT))&S32_NVIC_IP_PRI441_MASK)
#define S32_NVIC_IP_PRI441_MASK	                 0xFFu
#define S32_NVIC_IP_PRI442_SHIFT	             0u
#define S32_NVIC_IP_PRI442_WIDTH	             8u
#define S32_NVIC_IP_PRI442(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI442_SHIFT))&S32_NVIC_IP_PRI442_MASK)
#define S32_NVIC_IP_PRI442_MASK	                 0xFFu
#define S32_NVIC_IP_PRI442_SHIFT	             0u
#define S32_NVIC_IP_PRI443_WIDTH	             8u
#define S32_NVIC_IP_PRI443(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI443_SHIFT))&S32_NVIC_IP_PRI443_MASK)
#define S32_NVIC_IP_PRI443_MASK	                 0xFFu
#define S32_NVIC_IP_PRI443_SHIFT	             0u
#define S32_NVIC_IP_PRI443_WIDTH	             8u
#define S32_NVIC_IP_PRI444(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI444_SHIFT))&S32_NVIC_IP_PRI444_MASK)
#define S32_NVIC_IP_PRI444_MASK	                 0xFFu
#define S32_NVIC_IP_PRI444_SHIFT	             0u
#define S32_NVIC_IP_PRI444_WIDTH	             8u
#define S32_NVIC_IP_PRI444(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI444_SHIFT))&S32_NVIC_IP_PRI444_MASK)
#define S32_NVIC_IP_PRI445_MASK	                 0xFFu
#define S32_NVIC_IP_PRI445_SHIFT	             0u
#define S32_NVIC_IP_PRI445_WIDTH	             8u
#define S32_NVIC_IP_PRI445(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI445_SHIFT))&S32_NVIC_IP_PRI445_MASK)
#define S32_NVIC_IP_PRI445_MASK	                 0xFFu
#define S32_NVIC_IP_PRI446_SHIFT	             0u
#define S32_NVIC_IP_PRI446_WIDTH	             8u
#define S32_NVIC_IP_PRI446(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI446_SHIFT))&S32_NVIC_IP_PRI446_MASK)
#define S32_NVIC_IP_PRI446_MASK	                 0xFFu
#define S32_NVIC_IP_PRI446_SHIFT	             0u
#define S32_NVIC_IP_PRI447_WIDTH	             8u
#define S32_NVIC_IP_PRI447(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI447_SHIFT))&S32_NVIC_IP_PRI447_MASK)
#define S32_NVIC_IP_PRI447_MASK	                 0xFFu
#define S32_NVIC_IP_PRI447_SHIFT	             0u
#define S32_NVIC_IP_PRI447_WIDTH	             8u
#define S32_NVIC_IP_PRI448(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI448_SHIFT))&S32_NVIC_IP_PRI448_MASK)
#define S32_NVIC_IP_PRI448_MASK	                 0xFFu
#define S32_NVIC_IP_PRI448_SHIFT	             0u
#define S32_NVIC_IP_PRI448_WIDTH	             8u
#define S32_NVIC_IP_PRI448(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI448_SHIFT))&S32_NVIC_IP_PRI448_MASK)
#define S32_NVIC_IP_PRI449_MASK	                 0xFFu
#define S32_NVIC_IP_PRI449_SHIFT	             0u
#define S32_NVIC_IP_PRI449_WIDTH	             8u
#define S32_NVIC_IP_PRI449(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI449_SHIFT))&S32_NVIC_IP_PRI449_MASK)
#define S32_NVIC_IP_PRI449_MASK	                 0xFFu
#define S32_NVIC_IP_PRI450_SHIFT	             0u
#define S32_NVIC_IP_PRI450_WIDTH	             8u
#define S32_NVIC_IP_PRI450(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI450_SHIFT))&S32_NVIC_IP_PRI450_MASK)
#define S32_NVIC_IP_PRI450_MASK	                 0xFFu
#define S32_NVIC_IP_PRI450_SHIFT	             0u
#define S32_NVIC_IP_PRI451_WIDTH	             8u
#define S32_NVIC_IP_PRI451(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI451_SHIFT))&S32_NVIC_IP_PRI451_MASK)
#define S32_NVIC_IP_PRI451_MASK	                 0xFFu
#define S32_NVIC_IP_PRI451_SHIFT	             0u
#define S32_NVIC_IP_PRI451_WIDTH	             8u
#define S32_NVIC_IP_PRI452(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI452_SHIFT))&S32_NVIC_IP_PRI452_MASK)
#define S32_NVIC_IP_PRI452_MASK	                 0xFFu
#define S32_NVIC_IP_PRI452_SHIFT	             0u
#define S32_NVIC_IP_PRI452_WIDTH	             8u
#define S32_NVIC_IP_PRI452(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI452_SHIFT))&S32_NVIC_IP_PRI452_MASK)
#define S32_NVIC_IP_PRI453_MASK	                 0xFFu
#define S32_NVIC_IP_PRI453_SHIFT	             0u
#define S32_NVIC_IP_PRI453_WIDTH	             8u
#define S32_NVIC_IP_PRI453(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI453_SHIFT))&S32_NVIC_IP_PRI453_MASK)
#define S32_NVIC_IP_PRI453_MASK	                 0xFFu
#define S32_NVIC_IP_PRI454_SHIFT	             0u
#define S32_NVIC_IP_PRI454_WIDTH	             8u
#define S32_NVIC_IP_PRI454(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI454_SHIFT))&S32_NVIC_IP_PRI454_MASK)
#define S32_NVIC_IP_PRI454_MASK	                 0xFFu
#define S32_NVIC_IP_PRI454_SHIFT	             0u
#define S32_NVIC_IP_PRI455_WIDTH	             8u
#define S32_NVIC_IP_PRI455(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI455_SHIFT))&S32_NVIC_IP_PRI455_MASK)
#define S32_NVIC_IP_PRI455_MASK	                 0xFFu
#define S32_NVIC_IP_PRI455_SHIFT	             0u
#define S32_NVIC_IP_PRI455_WIDTH	             8u
#define S32_NVIC_IP_PRI456(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI456_SHIFT))&S32_NVIC_IP_PRI456_MASK)
#define S32_NVIC_IP_PRI456_MASK	                 0xFFu
#define S32_NVIC_IP_PRI456_SHIFT	             0u
#define S32_NVIC_IP_PRI456_WIDTH	             8u
#define S32_NVIC_IP_PRI456(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI456_SHIFT))&S32_NVIC_IP_PRI456_MASK)
#define S32_NVIC_IP_PRI457_MASK	                 0xFFu
#define S32_NVIC_IP_PRI457_SHIFT	             0u
#define S32_NVIC_IP_PRI457_WIDTH	             8u
#define S32_NVIC_IP_PRI457(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI457_SHIFT))&S32_NVIC_IP_PRI457_MASK)
#define S32_NVIC_IP_PRI457_MASK	                 0xFFu
#define S32_NVIC_IP_PRI458_SHIFT	             0u
#define S32_NVIC_IP_PRI458_WIDTH	             8u
#define S32_NVIC_IP_PRI458(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI458_SHIFT))&S32_NVIC_IP_PRI458_MASK)
#define S32_NVIC_IP_PRI458_MASK	                 0xFFu
#define S32_NVIC_IP_PRI458_SHIFT	             0u
#define S32_NVIC_IP_PRI459_WIDTH	             8u
#define S32_NVIC_IP_PRI459(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI459_SHIFT))&S32_NVIC_IP_PRI459_MASK)
#define S32_NVIC_IP_PRI459_MASK	                 0xFFu
#define S32_NVIC_IP_PRI459_SHIFT	             0u
#define S32_NVIC_IP_PRI459_WIDTH	             8u
#define S32_NVIC_IP_PRI460(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI460_SHIFT))&S32_NVIC_IP_PRI460_MASK)
#define S32_NVIC_IP_PRI460_MASK	                 0xFFu
#define S32_NVIC_IP_PRI460_SHIFT	             0u
#define S32_NVIC_IP_PRI460_WIDTH	             8u
#define S32_NVIC_IP_PRI460(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI460_SHIFT))&S32_NVIC_IP_PRI460_MASK)
#define S32_NVIC_IP_PRI461_MASK	                 0xFFu
#define S32_NVIC_IP_PRI461_SHIFT	             0u
#define S32_NVIC_IP_PRI461_WIDTH	             8u
#define S32_NVIC_IP_PRI461(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI461_SHIFT))&S32_NVIC_IP_PRI461_MASK)
#define S32_NVIC_IP_PRI461_MASK	                 0xFFu
#define S32_NVIC_IP_PRI462_SHIFT	             0u
#define S32_NVIC_IP_PRI462_WIDTH	             8u
#define S32_NVIC_IP_PRI462(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI462_SHIFT))&S32_NVIC_IP_PRI462_MASK)
#define S32_NVIC_IP_PRI462_MASK	                 0xFFu
#define S32_NVIC_IP_PRI462_SHIFT	             0u
#define S32_NVIC_IP_PRI463_WIDTH	             8u
#define S32_NVIC_IP_PRI463(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI463_SHIFT))&S32_NVIC_IP_PRI463_MASK)
#define S32_NVIC_IP_PRI463_MASK	                 0xFFu
#define S32_NVIC_IP_PRI463_SHIFT	             0u
#define S32_NVIC_IP_PRI463_WIDTH	             8u
#define S32_NVIC_IP_PRI464(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI464_SHIFT))&S32_NVIC_IP_PRI464_MASK)
#define S32_NVIC_IP_PRI464_MASK	                 0xFFu
#define S32_NVIC_IP_PRI464_SHIFT	             0u
#define S32_NVIC_IP_PRI464_WIDTH	             8u
#define S32_NVIC_IP_PRI464(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI464_SHIFT))&S32_NVIC_IP_PRI464_MASK)
#define S32_NVIC_IP_PRI465_MASK	                 0xFFu
#define S32_NVIC_IP_PRI465_SHIFT	             0u
#define S32_NVIC_IP_PRI465_WIDTH	             8u
#define S32_NVIC_IP_PRI465(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI465_SHIFT))&S32_NVIC_IP_PRI465_MASK)
#define S32_NVIC_IP_PRI465_MASK	                 0xFFu
#define S32_NVIC_IP_PRI466_SHIFT	             0u
#define S32_NVIC_IP_PRI466_WIDTH	             8u
#define S32_NVIC_IP_PRI466(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI466_SHIFT))&S32_NVIC_IP_PRI466_MASK)
#define S32_NVIC_IP_PRI466_MASK	                 0xFFu
#define S32_NVIC_IP_PRI466_SHIFT	             0u
#define S32_NVIC_IP_PRI467_WIDTH	             8u
#define S32_NVIC_IP_PRI467(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI467_SHIFT))&S32_NVIC_IP_PRI467_MASK)
#define S32_NVIC_IP_PRI467_MASK	                 0xFFu
#define S32_NVIC_IP_PRI467_SHIFT	             0u
#define S32_NVIC_IP_PRI467_WIDTH	             8u
#define S32_NVIC_IP_PRI468(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI468_SHIFT))&S32_NVIC_IP_PRI468_MASK)
#define S32_NVIC_IP_PRI468_MASK	                 0xFFu
#define S32_NVIC_IP_PRI468_SHIFT	             0u
#define S32_NVIC_IP_PRI468_WIDTH	             8u
#define S32_NVIC_IP_PRI468(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI468_SHIFT))&S32_NVIC_IP_PRI468_MASK)
#define S32_NVIC_IP_PRI469_MASK	                 0xFFu
#define S32_NVIC_IP_PRI469_SHIFT	             0u
#define S32_NVIC_IP_PRI469_WIDTH	             8u
#define S32_NVIC_IP_PRI469(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI469_SHIFT))&S32_NVIC_IP_PRI469_MASK)
#define S32_NVIC_IP_PRI469_MASK	                 0xFFu
#define S32_NVIC_IP_PRI470_SHIFT	             0u
#define S32_NVIC_IP_PRI470_WIDTH	             8u
#define S32_NVIC_IP_PRI470(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI470_SHIFT))&S32_NVIC_IP_PRI470_MASK)
#define S32_NVIC_IP_PRI470_MASK	                 0xFFu
#define S32_NVIC_IP_PRI470_SHIFT	             0u
#define S32_NVIC_IP_PRI471_WIDTH	             8u
#define S32_NVIC_IP_PRI471(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI471_SHIFT))&S32_NVIC_IP_PRI471_MASK)
#define S32_NVIC_IP_PRI471_MASK	                 0xFFu
#define S32_NVIC_IP_PRI471_SHIFT	             0u
#define S32_NVIC_IP_PRI471_WIDTH	             8u
#define S32_NVIC_IP_PRI472(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI472_SHIFT))&S32_NVIC_IP_PRI472_MASK)
#define S32_NVIC_IP_PRI472_MASK	                 0xFFu
#define S32_NVIC_IP_PRI472_SHIFT	             0u
#define S32_NVIC_IP_PRI472_WIDTH	             8u
#define S32_NVIC_IP_PRI472(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI472_SHIFT))&S32_NVIC_IP_PRI472_MASK)
#define S32_NVIC_IP_PRI473_MASK	                 0xFFu
#define S32_NVIC_IP_PRI473_SHIFT	             0u
#define S32_NVIC_IP_PRI473_WIDTH	             8u
#define S32_NVIC_IP_PRI473(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI473_SHIFT))&S32_NVIC_IP_PRI473_MASK)
#define S32_NVIC_IP_PRI473_MASK	                 0xFFu
#define S32_NVIC_IP_PRI474_SHIFT	             0u
#define S32_NVIC_IP_PRI474_WIDTH	             8u
#define S32_NVIC_IP_PRI474(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI474_SHIFT))&S32_NVIC_IP_PRI474_MASK)
#define S32_NVIC_IP_PRI474_MASK	                 0xFFu
#define S32_NVIC_IP_PRI474_SHIFT	             0u
#define S32_NVIC_IP_PRI475_WIDTH	             8u
#define S32_NVIC_IP_PRI475(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI475_SHIFT))&S32_NVIC_IP_PRI475_MASK)
#define S32_NVIC_IP_PRI475_MASK	                 0xFFu
#define S32_NVIC_IP_PRI475_SHIFT	             0u
#define S32_NVIC_IP_PRI475_WIDTH	             8u
#define S32_NVIC_IP_PRI476(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI476_SHIFT))&S32_NVIC_IP_PRI476_MASK)
#define S32_NVIC_IP_PRI476_MASK	                 0xFFu
#define S32_NVIC_IP_PRI476_SHIFT	             0u
#define S32_NVIC_IP_PRI476_WIDTH	             8u
#define S32_NVIC_IP_PRI476(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI476_SHIFT))&S32_NVIC_IP_PRI476_MASK)
#define S32_NVIC_IP_PRI477_MASK	                 0xFFu
#define S32_NVIC_IP_PRI477_SHIFT	             0u
#define S32_NVIC_IP_PRI477_WIDTH	             8u
#define S32_NVIC_IP_PRI477(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI477_SHIFT))&S32_NVIC_IP_PRI477_MASK)
#define S32_NVIC_IP_PRI477_MASK	                 0xFFu
#define S32_NVIC_IP_PRI478_SHIFT	             0u
#define S32_NVIC_IP_PRI478_WIDTH	             8u
#define S32_NVIC_IP_PRI478(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI478_SHIFT))&S32_NVIC_IP_PRI478_MASK)
#define S32_NVIC_IP_PRI478_MASK	                 0xFFu
#define S32_NVIC_IP_PRI478_SHIFT	             0u
#define S32_NVIC_IP_PRI479_WIDTH	             8u
#define S32_NVIC_IP_PRI479(x)	                 (((uint8_t)(((uint8_t)(x))<<S32_NVIC_IP_PRI479_SHIFT))&S32_NVIC_IP_PRI479_MASK)
#define S32_NVIC_IP_PRI479_MASK	                 0xFFu
#define S32_NVIC_IP_PRI479_SHIFT	             0u
#define S32_NVIC_IP_PRI479_WIDTH	             8u
/* STIR Bit Fields */
#define S32_NVIC_STIR_INTID_MASK                 0x1FFu
#define S32_NVIC_STIR_INTID_SHIFT                0u
#define S32_NVIC_STIR_INTID_WIDTH                9u
#define S32_NVIC_STIR_INTID(x)                   (((uint32_t)(((uint32_t)(x))<<S32_NVIC_STIR_INTID_SHIFT))&S32_NVIC_STIR_INTID_MASK)

/*!
 * @}
 */ /* end of group S32_NVIC_Register_Masks */

/*!
 * @}
 */ /* end of group S32_NVIC_Peripheral_Access_Layer */

#endif  /* #if !defined(S32Z2_NVIC_H_) */