327 __STATIC_INLINE void SPII2S_ENABLE_TX_ZCD(SPI_T *i2s, uint32_t u32ChMask);
328 __STATIC_INLINE void SPII2S_DISABLE_TX_ZCD(SPI_T *i2s, uint32_t u32ChMask);
329 __STATIC_INLINE void SPII2S_SET_MONO_RX_CHANNEL(SPI_T *i2s, uint32_t u32Ch);
340 __STATIC_INLINE void SPII2S_ENABLE_TX_ZCD(SPI_T *i2s, uint32_t u32ChMask)  in SPII2S_ENABLE_TX_ZCD()  argument
344         i2s->I2SCTL |= SPI_I2SCTL_RZCEN_Msk;  in SPII2S_ENABLE_TX_ZCD()
348         i2s->I2SCTL |= SPI_I2SCTL_LZCEN_Msk;  in SPII2S_ENABLE_TX_ZCD()
361 __STATIC_INLINE void SPII2S_DISABLE_TX_ZCD(SPI_T *i2s, uint32_t u32ChMask)  in SPII2S_DISABLE_TX_ZCD()  argument
365         i2s->I2SCTL &= ~SPI_I2SCTL_RZCEN_Msk;  in SPII2S_DISABLE_TX_ZCD()
369         i2s->I2SCTL &= ~SPI_I2SCTL_LZCEN_Msk;  in SPII2S_DISABLE_TX_ZCD()
380 #define SPII2S_ENABLE_TXDMA(i2s)  ( (i2s)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk )  argument
389 #define SPII2S_DISABLE_TXDMA(i2s) ( (i2s)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )  argument
398 #define SPII2S_ENABLE_RXDMA(i2s) ( (i2s)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk )  argument
407 #define SPII2S_DISABLE_RXDMA(i2s) ( (i2s)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk )  argument
416 #define SPII2S_ENABLE_TX(i2s) ( (i2s)->I2SCTL |= SPI_I2SCTL_TXEN_Msk )  argument
425 #define SPII2S_DISABLE_TX(i2s) ( (i2s)->I2SCTL &= ~SPI_I2SCTL_TXEN_Msk )  argument
434 #define SPII2S_ENABLE_RX(i2s) ( (i2s)->I2SCTL |= SPI_I2SCTL_RXEN_Msk )  argument
443 #define SPII2S_DISABLE_RX(i2s) ( (i2s)->I2SCTL &= ~SPI_I2SCTL_RXEN_Msk )  argument
452 #define SPII2S_ENABLE_TX_MUTE(i2s)  ( (i2s)->I2SCTL |= SPI_I2SCTL_MUTE_Msk )  argument
461 #define SPII2S_DISABLE_TX_MUTE(i2s) ( (i2s)->I2SCTL &= ~SPI_I2SCTL_MUTE_Msk )  argument
470 #define SPII2S_CLR_TX_FIFO(i2s) ( (i2s)->FIFOCTL |= SPI_FIFOCTL_TXFBCLR_Msk )  argument
479 #define SPII2S_CLR_RX_FIFO(i2s) ( (i2s)->FIFOCTL |= SPI_FIFOCTL_RXFBCLR_Msk )  argument
491 __STATIC_INLINE void SPII2S_SET_MONO_RX_CHANNEL(SPI_T *i2s, uint32_t u32Ch)  in SPII2S_SET_MONO_RX_CHANNEL()  argument
494     (i2s->I2SCTL |= SPI_I2SCTL_RXLCH_Msk) :  in SPII2S_SET_MONO_RX_CHANNEL()
495     (i2s->I2SCTL &= ~SPI_I2SCTL_RXLCH_Msk);  in SPII2S_SET_MONO_RX_CHANNEL()
506 #define SPII2S_WRITE_TX_FIFO(i2s, u32Data)  ( (i2s)->TX = (u32Data) )  argument
515 #define SPII2S_READ_RX_FIFO(i2s) ( (i2s)->RX )  argument
525 #define SPII2S_GET_INT_FLAG(i2s, u32Mask) ( (i2s)->I2SSTS & (u32Mask) )  argument
536 #define SPII2S_CLR_INT_FLAG(i2s, u32Mask) ( (i2s)->I2SSTS = (u32Mask) )  argument
545 #define SPII2S_GET_TX_FIFO_LEVEL(i2s) ( ((i2s)->I2SSTS & SPI_I2SSTS_TXCNT_Msk) >> SPI_I2SSTS_TXCNT_…  argument
554 #define SPII2S_GET_RX_FIFO_LEVEL(i2s) ( ((i2s)->I2SSTS & SPI_I2SSTS_RXCNT_Msk) >> SPI_I2SSTS_RXCNT_…  argument
574 uint32_t SPII2S_Open(SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordW…
575 void SPII2S_Close(SPI_T *i2s);
576 void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask);
577 void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask);
578 uint32_t SPII2S_EnableMCLK(SPI_T *i2s, uint32_t u32BusClock);
579 void SPII2S_DisableMCLK(SPI_T *i2s);
580 void SPII2S_SetFIFO(SPI_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold);