251 …_TIMER_SYNC(epwm, u32ChannelMask, u32SyncSrc) ((epwm)->SSCTL = ((epwm)->SSCTL & ~EPWM_SSCTL_SSRC_M…  argument
262 #define EPWM_DISABLE_TIMER_SYNC(epwm, u32ChannelMask) \  argument
266             if((u32ChannelMask) & (1 << i)) \
290 #define EPWM_ENABLE_OUTPUT_INVERTER(epwm, u32ChannelMask) ((epwm)->POLCTL = (u32ChannelMask))  argument
323 #define EPWM_MASK_OUTPUT(epwm, u32ChannelMask, u32LevelMask) \  argument
325         (epwm)->MSKEN = (u32ChannelMask); \
423 #define EPWM_SET_ALIGNED_TYPE(epwm, u32ChannelMask, u32AlignedType) \  argument
427             if((u32ChannelMask) & (1 << i)) \
441 #define EPWM_SET_LOAD_WINDOW(epwm, u32ChannelMask) ((epwm)->LOAD |= (u32ChannelMask))  argument
463 #define EPWM_CLR_COUNTER(epwm, u32ChannelMask) ((epwm)->CNTCLR |= (u32ChannelMask))  argument
494 #define EPWM_SET_OUTPUT_LEVEL(epwm, u32ChannelMask, u32ZeroLevel, u32CmpUpLevel, u32PeriodLevel, u3…  argument
498             if((u32ChannelMask) & (1 << i)) { \
519 #define EPWM_TRIGGER_BRAKE(epwm, u32ChannelMask, u32BrakeType) ((epwm)->SWBRK |= ((u32ChannelMask) …  argument
540 void EPWM_Start(EPWM_T *epwm, uint32_t u32ChannelMask);
541 void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);
542 void EPWM_ForceStop(EPWM_T *epwm, uint32_t u32ChannelMask);
551 void EPWM_EnableFaultBrake(EPWM_T *epwm, uint32_t u32ChannelMask, uint32_t u32LevelMask, uint32_t u…
552 void EPWM_EnableCapture(EPWM_T *epwm, uint32_t u32ChannelMask);
553 void EPWM_DisableCapture(EPWM_T *epwm, uint32_t u32ChannelMask);
554 void EPWM_EnableOutput(EPWM_T *epwm, uint32_t u32ChannelMask);
555 void EPWM_DisableOutput(EPWM_T *epwm, uint32_t u32ChannelMask);
595 void EPWM_EnableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask);
596 void EPWM_DisableSyncPhase(EPWM_T *epwm, uint32_t u32ChannelMask);