119 #define SPI_CLR_UNIT_TRANS_INT_FLAG(spi)   ( (spi)->STATUS = SPI_STATUS_UNITIF_Msk )  argument
128 #define SPI_DISABLE_3WIRE_MODE(spi)   ( (spi)->SSCTL &= ~SPI_SSCTL_SLV3WIRE_Msk )  argument
137 #define SPI_ENABLE_3WIRE_MODE(spi)   ( (spi)->SSCTL |= SPI_SSCTL_SLV3WIRE_Msk )  argument
146 #define SPI_TRIGGER_RX_PDMA(spi)   ( (spi)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk )  argument
155 #define SPI_TRIGGER_TX_PDMA(spi)   ( (spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk )  argument
164 #define SPI_TRIGGER_TX_RX_PDMA(spi)   ( (spi)->PDMACTL |= (SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_R…  argument
173 #define SPI_DISABLE_RX_PDMA(spi) ( (spi)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk )  argument
182 #define SPI_DISABLE_TX_PDMA(spi) ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )  argument
191 #define SPI_DISABLE_TX_RX_PDMA(spi) ( (spi)->PDMACTL &= ~(SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_RX…  argument
200 #define SPI_GET_RX_FIFO_COUNT(spi)   ( ((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_P…  argument
210 #define SPI_GET_RX_FIFO_EMPTY_FLAG(spi)   ( ((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk) >> SPI_STATUS_…  argument
220 #define SPI_GET_TX_FIFO_EMPTY_FLAG(spi)   ( ((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk) >> SPI_STATUS_…  argument
230 #define SPI_GET_TX_FIFO_FULL_FLAG(spi)   ( ((spi)->STATUS & SPI_STATUS_TXFULL_Msk) >> SPI_STATUS_TX…  argument
239 #define SPI_READ_RX(spi)   ( (spi)->RX )  argument
249 #define SPI_WRITE_TX(spi, u32TxData)   ( (spi)->TX = (u32TxData) )  argument
258 #define SPI_SET_SS_HIGH(spi)   ( (spi)->SSCTL = ((spi)->SSCTL & (~SPI_SSCTL_AUTOSS_Msk)) | (SPI_SSC…  argument
267 #define SPI_SET_SS_LOW(spi)   ( (spi)->SSCTL = ((spi)->SSCTL & (~(SPI_SSCTL_AUTOSS_Msk | SPI_SSCTL_…  argument
276 #define SPI_ENABLE_BYTE_REORDER(spi)   ( (spi)->CTL |=  SPI_CTL_REORDER_Msk )  argument
285 #define SPI_DISABLE_BYTE_REORDER(spi)   ( (spi)->CTL &= ~SPI_CTL_REORDER_Msk )  argument
296 #define SPI_SET_SUSPEND_CYCLE(spi, u32SuspCycle)   ( (spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Ms…  argument
305 #define SPI_SET_LSB_FIRST(spi)   ( (spi)->CTL |= SPI_CTL_LSB_Msk )  argument
314 #define SPI_SET_MSB_FIRST(spi)   ( (spi)->CTL &= ~SPI_CTL_LSB_Msk )  argument
324 #define SPI_SET_DATA_WIDTH(spi, u32Width)   ( (spi)->CTL = ((spi)->CTL & ~SPI_CTL_DWIDTH_Msk) | (((…  argument
334 #define SPI_IS_BUSY(spi)   ( ((spi)->STATUS & SPI_STATUS_BUSY_Msk) >> SPI_STATUS_BUSY_Pos )  argument
343 #define SPI_ENABLE(spi)   ( (spi)->CTL |= SPI_CTL_SPIEN_Msk )  argument
352 #define SPI_DISABLE(spi)   ( (spi)->CTL &= ~SPI_CTL_SPIEN_Msk )  argument
582 uint32_t SPI_Open(SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, …
583 void SPI_Close(SPI_T *spi);
584 void SPI_ClearRxFIFO(SPI_T *spi);
585 void SPI_ClearTxFIFO(SPI_T *spi);
586 void SPI_DisableAutoSS(SPI_T *spi);
587 void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel);
588 uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock);
589 void SPI_SetFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold);
590 uint32_t SPI_GetBusClock(SPI_T *spi);
591 void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask);
592 void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask);
593 uint32_t SPI_GetIntFlag(SPI_T *spi, uint32_t u32Mask);
594 void SPI_ClearIntFlag(SPI_T *spi, uint32_t u32Mask);
595 uint32_t SPI_GetStatus(SPI_T *spi, uint32_t u32Mask);
596 uint32_t SPI_GetStatus2(SPI_T *spi, uint32_t u32Mask);