363 __STATIC_INLINE void SPII2S_ENABLE_TX_ZCD(SPI_T *i2s, uint32_t u32ChMask)  in SPII2S_ENABLE_TX_ZCD()  argument
367         i2s->I2SCTL |= SPI_I2SCTL_RZCEN_Msk;  in SPII2S_ENABLE_TX_ZCD()
371         i2s->I2SCTL |= SPI_I2SCTL_LZCEN_Msk;  in SPII2S_ENABLE_TX_ZCD()
384 __STATIC_INLINE void SPII2S_DISABLE_TX_ZCD(SPI_T *i2s, uint32_t u32ChMask)  in SPII2S_DISABLE_TX_ZCD()  argument
388         i2s->I2SCTL &= ~SPI_I2SCTL_RZCEN_Msk;  in SPII2S_DISABLE_TX_ZCD()
392         i2s->I2SCTL &= ~SPI_I2SCTL_LZCEN_Msk;  in SPII2S_DISABLE_TX_ZCD()
403 #define SPII2S_ENABLE_TXDMA(i2s)  ( (i2s)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk )  argument
412 #define SPII2S_DISABLE_TXDMA(i2s) ( (i2s)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )  argument
421 #define SPII2S_ENABLE_RXDMA(i2s) ( (i2s)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk )  argument
430 #define SPII2S_DISABLE_RXDMA(i2s) ( (i2s)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk )  argument
439 #define SPII2S_ENABLE_TX(i2s) ( (i2s)->I2SCTL |= SPI_I2SCTL_TXEN_Msk )  argument
448 #define SPII2S_DISABLE_TX(i2s) ( (i2s)->I2SCTL &= ~SPI_I2SCTL_TXEN_Msk )  argument
457 #define SPII2S_ENABLE_RX(i2s) ( (i2s)->I2SCTL |= SPI_I2SCTL_RXEN_Msk )  argument
466 #define SPII2S_DISABLE_RX(i2s) ( (i2s)->I2SCTL &= ~SPI_I2SCTL_RXEN_Msk )  argument
475 #define SPII2S_ENABLE_TX_MUTE(i2s)  ( (i2s)->I2SCTL |= SPI_I2SCTL_MUTE_Msk )  argument
484 #define SPII2S_DISABLE_TX_MUTE(i2s) ( (i2s)->I2SCTL &= ~SPI_I2SCTL_MUTE_Msk )  argument
493 #define SPII2S_CLR_TX_FIFO(i2s) ( (i2s)->FIFOCTL |= SPI_FIFOCTL_TXFBCLR_Msk )  argument
502 #define SPII2S_CLR_RX_FIFO(i2s) ( (i2s)->FIFOCTL |= SPI_FIFOCTL_RXFBCLR_Msk )  argument
514 __STATIC_INLINE void SPII2S_SET_MONO_RX_CHANNEL(SPI_T *i2s, uint32_t u32Ch)  in SPII2S_SET_MONO_RX_CHANNEL()  argument
517     (i2s->I2SCTL |= SPI_I2SCTL_RXLCH_Msk) :  in SPII2S_SET_MONO_RX_CHANNEL()
518     (i2s->I2SCTL &= ~SPI_I2SCTL_RXLCH_Msk);  in SPII2S_SET_MONO_RX_CHANNEL()
529 #define SPII2S_WRITE_TX_FIFO(i2s, u32Data)  ( (i2s)->TX = (u32Data) )  argument
538 #define SPII2S_READ_RX_FIFO(i2s) ( (i2s)->RX )  argument
548 #define SPII2S_GET_INT_FLAG(i2s, u32Mask) ( (i2s)->I2SSTS & (u32Mask) )  argument
559 #define SPII2S_CLR_INT_FLAG(i2s, u32Mask) ( (i2s)->I2SSTS = (u32Mask) )  argument
568 #define SPII2S_GET_TX_FIFO_LEVEL(i2s) ( ((i2s)->I2SSTS & SPI_I2SSTS_TXCNT_Msk) >> SPI_I2SSTS_TXCNT_…  argument
577 #define SPII2S_GET_RX_FIFO_LEVEL(i2s) ( ((i2s)->I2SSTS & SPI_I2SSTS_RXCNT_Msk) >> SPI_I2SSTS_RXCNT_…  argument
598 uint32_t SPII2S_Open(SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordW…
599 void SPII2S_Close(SPI_T *i2s);
600 void SPII2S_EnableInt(SPI_T *i2s, uint32_t u32Mask);
601 void SPII2S_DisableInt(SPI_T *i2s, uint32_t u32Mask);
602 uint32_t SPII2S_EnableMCLK(SPI_T *i2s, uint32_t u32BusClock);
603 void SPII2S_DisableMCLK(SPI_T *i2s);
604 void SPII2S_SetFIFO(SPI_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold);