Lines Matching refs:MEC_ECS

16         MEC_ECS->INTR_CTRL |= MEC_BIT(MEC_ECS_INTR_CTRL_DIRECT_Pos);  in mec_hal_ecs_ictrl()
18 MEC_ECS->INTR_CTRL &= (uint32_t)~MEC_BIT(MEC_ECS_INTR_CTRL_DIRECT_Pos); in mec_hal_ecs_ictrl()
24 if (MEC_ECS->INTR_CTRL & MEC_BIT(MEC_ECS_INTR_CTRL_DIRECT_Pos)) { in mec_hal_ecs_is_idirect()
34 MEC_ECS->AERRC &= (uint32_t)~MEC_BIT(MEC_ECS_AERRC_CAP_Pos); in mec_hal_ecs_ahb_error_ctrl()
36 MEC_ECS->AERRC |= MEC_BIT(MEC_ECS_AERRC_CAP_Pos); in mec_hal_ecs_ahb_error_ctrl()
42 uint32_t ahb_error_val = MEC_ECS->AERRA; in mec_hal_ecs_ahb_error_val()
45 MEC_ECS->AERRA = 0u; in mec_hal_ecs_ahb_error_val()
54 if (MEC_ECS->FEAT_LOCK & MEC_BIT(feature)) { in mec_hal_ecs_is_feature_disabled()
59 if (MEC_ECS->MISC_LOCK & MEC_BIT(feature)) { in mec_hal_ecs_is_feature_disabled()
70 MEC_ECS->ETM_CTRL |= MEC_BIT(MEC_ECS_ETM_CTRL_TRACE_EN_Pos); in mec_hal_ecs_etm_pins()
72 MEC_ECS->ETM_CTRL &= (uint32_t)~MEC_BIT(MEC_ECS_ETM_CTRL_TRACE_EN_Pos); in mec_hal_ecs_etm_pins()
101 temp = MEC_ECS->DBG_CTRL & ~msk; in mec_hal_ecs_debug_port()
103 MEC_ECS->DBG_CTRL = temp; in mec_hal_ecs_debug_port()
125 MEC_ECS->CMPSC = (MEC_ECS->CMPSC & (uint32_t)~msk) | val; in mec_hal_ecs_analog_comparator_config()
140 MEC_ECS->CMPC = (MEC_ECS->CMPC & (uint32_t)~msk) | val; in mec_hal_ecs_analog_comparator_config()
147 if (MEC_ECS->EMBRST_EN & MEC_BIT(MEC_ECS_EMBRST_EN_EN_Pos)) { in mec_hal_ecs_emb_reset_is_enabled()
156 MEC_ECS->EMBRST_EN |= MEC_BIT(MEC_ECS_EMBRST_EN_EN_Pos); in mec_hal_ecs_emb_reset_enable()
158 MEC_ECS->EMBRST_EN &= (uint32_t)~MEC_BIT(MEC_ECS_EMBRST_EN_EN_Pos); in mec_hal_ecs_emb_reset_enable()
164 return (uint8_t)((MEC_ECS->EMBRST_TMOUT & MEC_ECS_EMBRST_TMOUT_TM1_Msk) in mec_hal_ecs_emb_reset_timeout_get()
170 MEC_ECS->EMBRST_TMOUT = ((MEC_ECS->EMBRST_TMOUT & (uint32_t)~MEC_ECS_EMBRST_TMOUT_TM1_Msk) in mec_hal_ecs_emb_reset_timeout()
177 return MEC_ECS->EMBRST_STS; in mec_hal_ecs_emb_reset_status()
182 MEC_ECS->EMBRST_STS &= (uint32_t)~MEC_BIT(MEC_ECS_EMBRST_STS_RST_Pos); in mec_hal_ecs_emb_reset_status_clear()
187 return MEC_ECS->EMBRST_CNT; in mec_hal_ecs_emb_reset_count()
194 MEC_ECS->PECI_CTRL |= MEC_BIT(MEC_ECS_PECI_CTRL_PINS_Pos); in mec_hal_ecs_peci_vtt_ref_pin_ctrl()
196 MEC_ECS->PECI_CTRL &= (uint32_t)~MEC_BIT(MEC_ECS_PECI_CTRL_PINS_Pos); in mec_hal_ecs_peci_vtt_ref_pin_ctrl()
202 if (MEC_ECS->PECI_CTRL & MEC_BIT(MEC_ECS_PECI_CTRL_PINS_Pos)) { in mec_hal_ecs_peci_vtt_ref_pin_is_enabled()
217 ecs_pm_save_buf[0] = (uint8_t)(MEC_ECS->ETM_CTRL & 0xffu); in mec_hal_ecs_debug_ifc_save_disable()
218 MEC_ECS->ETM_CTRL = 0; in mec_hal_ecs_debug_ifc_save_disable()
220 ecs_pm_save_buf[1] = (uint8_t)(MEC_ECS->DBG_CTRL & 0xffu); in mec_hal_ecs_debug_ifc_save_disable()
221 MEC_ECS->DBG_CTRL = 0; in mec_hal_ecs_debug_ifc_save_disable()
226 MEC_ECS->ETM_CTRL = ecs_pm_save_buf[0]; in mec_hal_ecs_debug_ifc_restore()
227 MEC_ECS->DBG_CTRL = ecs_pm_save_buf[1]; in mec_hal_ecs_debug_ifc_restore()
233 ecs_pm_save_buf[0] = (uint8_t)(MEC_ECS->ETM_CTRL & 0xffu); in mec_hal_ecs_pm_save_disable()
234 ecs_pm_save_buf[1] = (uint8_t)(MEC_ECS->DBG_CTRL & 0xffu); in mec_hal_ecs_pm_save_disable()
235 ecs_pm_save_buf[2] = (uint8_t)(MEC_ECS->PECI_CTRL & 0xffu); in mec_hal_ecs_pm_save_disable()
237 MEC_ECS->ETM_CTRL = 0; in mec_hal_ecs_pm_save_disable()
238 MEC_ECS->DBG_CTRL = 0; in mec_hal_ecs_pm_save_disable()
239 MEC_ECS->PECI_CTRL = 1; /* disable VREF_VTT function */ in mec_hal_ecs_pm_save_disable()
250 MEC_ECS->PECI_CTRL = ecs_pm_save_buf[2]; in mec_hal_ecs_pm_restore()
251 MEC_ECS->ETM_CTRL = ecs_pm_save_buf[0]; in mec_hal_ecs_pm_restore()
252 MEC_ECS->DBG_CTRL = ecs_pm_save_buf[1]; in mec_hal_ecs_pm_restore()