Lines Matching +full:- +full:r

59 #define MCONTROL_TYPE(xlen)    (0xfULL<<((xlen)-4))
60 #define MCONTROL_DMODE(xlen)   (1ULL<<((xlen)-5))
61 #define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
180   __asm__ volatile ("fmv.x.w %0, " #reg : "=r"(__tmp)); \
187     __asm__ volatile ("fmv.w.x " #reg ", %0" :: "r"(val)); })
191   __asm__ volatile ("csrr %0, " #reg : "=r"(__tmp)); \
198     __asm__ volatile ("csrw " #reg ", %0" :: "r"(val)); })
202     __asm__ volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
204     __asm__ volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
209     __asm__ volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
211     __asm__ volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
216     __asm__ volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
218     __asm__ volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
231 /* Automatically generated by parse-opcodes */