395         TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE;  in timer_channel_control_shadow_config()
397         TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE);  in timer_channel_control_shadow_config()
414         TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCUC);  in timer_channel_control_shadow_update_config()
416         TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCUC;  in timer_channel_control_shadow_update_config()
483         TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_DMAS;  in timer_channel_dma_request_source_select()
485         TIMER_CTL1(timer_periph) &= ~(uint32_t)TIMER_CTL1_DMAS;  in timer_channel_dma_request_source_select()
738             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO0);  in timer_channel_output_config()
740             TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate;  in timer_channel_output_config()
743             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO0N);  in timer_channel_output_config()
745             TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocnidlestate;  in timer_channel_output_config()
771             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO1);  in timer_channel_output_config()
773             TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U);  in timer_channel_output_config()
775             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO1N);  in timer_channel_output_config()
777             TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocnidlestate) << 2U);  in timer_channel_output_config()
803             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO2);  in timer_channel_output_config()
805             TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U);  in timer_channel_output_config()
807             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO2N);  in timer_channel_output_config()
809             TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocnidlestate) << 4U);  in timer_channel_output_config()
835             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO3);  in timer_channel_output_config()
837             TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U);  in timer_channel_output_config()
839             TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_ISO3N);  in timer_channel_output_config()
841             TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocnidlestate) << 6U);  in timer_channel_output_config()
1888         TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_TI0S;  in timer_hall_mode_config()
1890         TIMER_CTL1(timer_periph) &= ~(uint32_t)TIMER_CTL1_TI0S;  in timer_hall_mode_config()
2101     reg  = TIMER_CTL1(timer_periph);  in timer_master_output_trigger_source_select()
2104     TIMER_CTL1(timer_periph) = reg;  in timer_master_output_trigger_source_select()