Lines Matching refs:regs
101 .hal.regs = &RMT,
151 … rmt_ll_rx_set_channel_clock_div(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), div_cnt); in rmt_set_clk_div()
153 rmt_ll_tx_set_channel_clock_div(rmt_contex.hal.regs, channel, div_cnt); in rmt_set_clk_div()
165 …*div_cnt = (uint8_t)rmt_ll_rx_get_channel_clock_div(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(cha… in rmt_get_clk_div()
167 *div_cnt = (uint8_t)rmt_ll_tx_get_channel_clock_div(rmt_contex.hal.regs, channel); in rmt_get_clk_div()
177 rmt_ll_rx_set_idle_thres(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), thresh); in rmt_set_rx_idle_thresh()
187 … *thresh = (uint16_t)rmt_ll_rx_get_idle_thres(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel)); in rmt_get_rx_idle_thresh()
198 rmt_ll_rx_set_mem_blocks(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), rmt_mem_num); in rmt_set_mem_block_num()
200 rmt_ll_tx_set_mem_blocks(rmt_contex.hal.regs, channel, rmt_mem_num); in rmt_set_mem_block_num()
212 …*rmt_mem_num = (uint8_t)rmt_ll_rx_get_mem_blocks(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channe… in rmt_get_mem_block_num()
214 *rmt_mem_num = (uint8_t)rmt_ll_tx_get_mem_blocks(rmt_contex.hal.regs, channel); in rmt_get_mem_block_num()
226 rmt_ll_tx_set_carrier_high_low_ticks(rmt_contex.hal.regs, channel, high_level, low_level); in rmt_set_tx_carrier()
227 rmt_ll_tx_set_carrier_level(rmt_contex.hal.regs, channel, carrier_level); in rmt_set_tx_carrier()
228 rmt_ll_tx_enable_carrier_modulation(rmt_contex.hal.regs, channel, carrier_en); in rmt_set_tx_carrier()
237 rmt_ll_power_down_mem(rmt_contex.hal.regs, pd_en); in rmt_set_mem_pd()
246 *pd_en = rmt_ll_is_mem_powered_down(rmt_contex.hal.regs); in rmt_get_mem_pd()
256 rmt_ll_tx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_tx_start()
258 rmt_ll_clear_interrupt_status(rmt_contex.hal.regs, RMT_LL_EVENT_TX_DONE(channel)); in rmt_tx_start()
260 if (!rmt_ll_tx_is_loop_enabled(rmt_contex.hal.regs, channel)) { in rmt_tx_start()
261 rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_TX_DONE(channel), true); in rmt_tx_start()
264 rmt_ll_tx_reset_loop_count(rmt_contex.hal.regs, channel); in rmt_tx_start()
265 rmt_ll_tx_enable_loop_count(rmt_contex.hal.regs, channel, true); in rmt_tx_start()
266 rmt_ll_clear_interrupt_status(rmt_contex.hal.regs, RMT_LL_EVENT_TX_LOOP_END(channel)); in rmt_tx_start()
267 rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_TX_LOOP_END(channel), true); in rmt_tx_start()
270 rmt_ll_tx_start(rmt_contex.hal.regs, channel); in rmt_tx_start()
280 rmt_ll_tx_stop(rmt_contex.hal.regs, channel); in rmt_tx_stop()
285 rmt_ll_tx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_tx_stop()
295 …uint32_t item_block_len = rmt_ll_rx_get_mem_blocks(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(chan… in rmt_set_rx_thr_intr_en()
298 rmt_ll_rx_set_limit(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), evt_thresh); in rmt_set_rx_thr_intr_en()
299 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_THRES(RMT_DECODE_RX_CHANNEL(channel))… in rmt_set_rx_thr_intr_en()
303 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_THRES(RMT_DECODE_RX_CHANNEL(channel))… in rmt_set_rx_thr_intr_en()
314 rmt_ll_rx_enable(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), false); in rmt_rx_start()
316 rmt_ll_rx_reset_pointer(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel)); in rmt_rx_start()
318 …rmt_ll_clear_interrupt_status(rmt_contex.hal.regs, RMT_LL_EVENT_RX_DONE(RMT_DECODE_RX_CHANNEL(chan… in rmt_rx_start()
319 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_DONE(RMT_DECODE_RX_CHANNEL(channel)),… in rmt_rx_start()
322 …const uint32_t item_block_len = rmt_ll_rx_get_mem_blocks(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNE… in rmt_rx_start()
328 rmt_ll_rx_enable(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), true); in rmt_rx_start()
337 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_DONE(RMT_DECODE_RX_CHANNEL(channel)),… in rmt_rx_stop()
338 rmt_ll_rx_enable(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), false); in rmt_rx_stop()
339 rmt_ll_rx_reset_pointer(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel)); in rmt_rx_stop()
341 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_THRES(RMT_DECODE_RX_CHANNEL(channel))… in rmt_rx_stop()
351 rmt_ll_tx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_tx_memory_reset()
360 rmt_ll_rx_reset_pointer(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel)); in rmt_rx_memory_reset()
370 rmt_ll_rx_set_mem_owner(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), owner); in rmt_set_memory_owner()
380 …*owner = (rmt_mem_owner_t)rmt_ll_rx_get_mem_owner(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(chann… in rmt_get_memory_owner()
389 rmt_ll_tx_enable_loop(rmt_contex.hal.regs, channel, loop_en); in rmt_set_tx_loop_mode()
398 *loop_en = rmt_ll_tx_is_loop_enabled(rmt_contex.hal.regs, channel); in rmt_get_tx_loop_mode()
407 rmt_ll_rx_enable_filter(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), rx_filter_en); in rmt_set_rx_filter()
408 rmt_ll_rx_set_filter_thres(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel), thresh); in rmt_set_rx_filter()
418 rmt_ll_set_group_clock_src(rmt_contex.hal.regs, channel, (rmt_clock_source_t)base_clk, 1, 0, 0); in rmt_set_source_clk()
428 *src_clk = (rmt_source_clk_t)rmt_ll_get_group_clock_src(rmt_contex.hal.regs, channel); in rmt_get_source_clk()
438 rmt_ll_tx_fix_idle_level(rmt_contex.hal.regs, channel, level, idle_out_en); in rmt_set_idle_level()
447 *idle_out_en = rmt_ll_tx_is_idle_enabled(rmt_contex.hal.regs, channel); in rmt_get_idle_level()
448 *level = rmt_ll_tx_get_idle_level(rmt_contex.hal.regs, channel); in rmt_get_idle_level()
458 *status = rmt_ll_rx_get_status_word(rmt_contex.hal.regs, RMT_DECODE_RX_CHANNEL(channel)); in rmt_get_status()
460 *status = rmt_ll_tx_get_status_word(rmt_contex.hal.regs, channel); in rmt_get_status()
470 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_DONE(RMT_DECODE_RX_CHANNEL(channel)),… in rmt_set_rx_intr_en()
480 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_ERROR(RMT_DECODE_RX_CHANNEL(channel))… in rmt_set_err_intr_en()
482 rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_TX_ERROR(channel), en); in rmt_set_err_intr_en()
492 rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_TX_DONE(channel), en); in rmt_set_tx_intr_en()
501 …uint32_t item_block_len = rmt_ll_tx_get_mem_blocks(rmt_contex.hal.regs, channel) * RMT_MEM_ITEM_NU… in rmt_set_tx_thr_intr_en()
504 rmt_ll_tx_set_limit(rmt_contex.hal.regs, channel, evt_thresh); in rmt_set_tx_thr_intr_en()
505 rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_TX_THRES(channel), true); in rmt_set_tx_thr_intr_en()
509 rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_TX_THRES(channel), false); in rmt_set_tx_thr_intr_en()
697 uint8_t mem_cnt = rmt_ll_tx_get_mem_blocks(rmt_contex.hal.regs, channel); in rmt_fill_tx_items()
725 status = rmt_ll_get_tx_end_interrupt_status(hal->regs); in rmt_driver_isr_default()
732 rmt_ll_tx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
743 rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_TX_DONE(channel)); in rmt_driver_isr_default()
747 status = rmt_ll_get_tx_thres_interrupt_status(hal->regs); in rmt_driver_isr_default()
772 rmt_idle_level_t idle_level = rmt_ll_tx_get_idle_level(hal->regs, channel); in rmt_driver_isr_default()
795 rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_TX_THRES(channel)); in rmt_driver_isr_default()
799 status = rmt_ll_get_rx_end_interrupt_status(hal->regs); in rmt_driver_isr_default()
805 rmt_ll_rx_enable(rmt_contex.hal.regs, channel, false); in rmt_driver_isr_default()
806 int item_len = rmt_ll_rx_get_memory_writer_offset(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
807 rmt_ll_rx_set_mem_owner(rmt_contex.hal.regs, channel, RMT_LL_MEM_OWNER_SW); in rmt_driver_isr_default()
832 rmt_ll_rx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
833 rmt_ll_rx_set_mem_owner(rmt_contex.hal.regs, channel, RMT_LL_MEM_OWNER_HW); in rmt_driver_isr_default()
834 rmt_ll_rx_enable(rmt_contex.hal.regs, channel, true); in rmt_driver_isr_default()
836 rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_RX_DONE(channel)); in rmt_driver_isr_default()
841 status = rmt_ll_get_rx_thres_interrupt_status(hal->regs); in rmt_driver_isr_default()
846 … int mem_item_size = rmt_ll_rx_get_mem_blocks(rmt_contex.hal.regs, channel) * RMT_MEM_ITEM_NUM; in rmt_driver_isr_default()
847 int rx_thres_lim = rmt_ll_rx_get_limit(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
850 rmt_ll_rx_set_mem_owner(rmt_contex.hal.regs, channel, RMT_LL_MEM_OWNER_SW); in rmt_driver_isr_default()
852 rmt_ll_rx_set_mem_owner(rmt_contex.hal.regs, channel, RMT_LL_MEM_OWNER_HW); in rmt_driver_isr_default()
861 rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_RX_THRES(channel)); in rmt_driver_isr_default()
867 status = rmt_ll_get_tx_loop_interrupt_status(hal->regs); in rmt_driver_isr_default()
876 rmt_ll_tx_stop(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
877 rmt_ll_tx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
885 rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_TX_LOOP_END(channel)); in rmt_driver_isr_default()
890 status = rmt_ll_get_rx_err_interrupt_status(hal->regs); in rmt_driver_isr_default()
897 rmt_ll_rx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
899 … ESP_DRAM_LOGD(TAG, "status: 0x%08x", rmt_ll_rx_get_status_word(rmt_contex.hal.regs, channel)); in rmt_driver_isr_default()
901 rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_RX_ERROR(channel)); in rmt_driver_isr_default()
905 status = rmt_ll_get_tx_err_interrupt_status(hal->regs); in rmt_driver_isr_default()
912 rmt_ll_tx_reset_pointer(rmt_contex.hal.regs, channel); in rmt_driver_isr_default()
914 … ESP_DRAM_LOGD(TAG, "status: 0x%08x", rmt_ll_tx_get_status_word(rmt_contex.hal.regs, channel)); in rmt_driver_isr_default()
916 rmt_ll_clear_interrupt_status(hal->regs, RMT_LL_EVENT_TX_ERROR(channel)); in rmt_driver_isr_default()
940 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_RX_MASK(RMT_DECODE_RX_CHANNEL(channel)) … in rmt_driver_uninstall()
942 …rmt_ll_enable_interrupt(rmt_contex.hal.regs, RMT_LL_EVENT_TX_MASK(channel) | RMT_LL_EVENT_TX_ERROR… in rmt_driver_uninstall()
1090 uint32_t mem_blocks = rmt_ll_tx_get_mem_blocks(rmt_contex.hal.regs, channel); in rmt_write_items()
1117 rmt_idle_level_t idle_level = rmt_ll_tx_get_idle_level(rmt_contex.hal.regs, channel); in rmt_write_items()
1129 if (rmt_ll_tx_is_loop_enabled(rmt_contex.hal.regs, channel)) { in rmt_write_items()
1182 uint32_t mem_blocks = rmt_ll_tx_get_mem_blocks(rmt_contex.hal.regs, channel); in rmt_translator_init()
1234 uint32_t mem_blocks = rmt_ll_tx_get_mem_blocks(rmt_contex.hal.regs, channel); in rmt_write_sample()
1260 rmt_idle_level_t idle_level = rmt_ll_tx_get_idle_level(rmt_contex.hal.regs, channel); in rmt_write_sample()
1310 …*clock_hz = rmt_source_clk_hz / rmt_ll_rx_get_channel_clock_div(rmt_contex.hal.regs, RMT_DECODE_RX… in rmt_get_counter_clock()
1312 … *clock_hz = rmt_source_clk_hz / rmt_ll_tx_get_channel_clock_div(rmt_contex.hal.regs, channel); in rmt_get_counter_clock()
1323 rmt_ll_tx_enable_sync(rmt_contex.hal.regs, true); in rmt_add_channel_to_group()
1325 rmt_ll_tx_sync_group_add_channels(rmt_contex.hal.regs, 1 << channel); in rmt_add_channel_to_group()
1326 rmt_ll_tx_reset_channels_clock_div(rmt_contex.hal.regs, rmt_contex.synchro_channel_mask); in rmt_add_channel_to_group()
1336 rmt_ll_tx_sync_group_remove_channels(rmt_contex.hal.regs, 1 << channel); in rmt_remove_channel_from_group()
1338 rmt_ll_tx_enable_sync(rmt_contex.hal.regs, false); in rmt_remove_channel_from_group()
1351 rmt_ll_tx_set_loop_count(rmt_contex.hal.regs, channel, count); in rmt_set_tx_loop_count()
1362 rmt_ll_tx_enable_loop_autostop(rmt_contex.hal.regs, channel, en); in rmt_enable_tx_loop_autostop()