Lines Matching +full:is +full:- +full:ram
2 # SPDX-License-Identifier: Apache-2.0
7 bool "Support for external, SPI-connected RAM"
12 This enables support for an external SPI RAM chip, connected in
15 menu "SPI RAM config"
23 regions. If the region of desired capability is exhausted,
34 bool "Run memory test on SPI RAM initialization"
40 prompt "Mode (QUAD/OCT) of SPI RAM chip in use"
53 prompt "Type of SPI RAM chip in use"
58 bool "ESP-PSRAM16 or APS1604"
62 bool "ESP-PSRAM32 or IS25WP032"
66 bool "ESP-PSRAM64, LY68L6400 or APS6408"
77 NOTE: If SPIRAM size is greater than 4MB, only
81 prompt "Set RAM clock speed"
84 Select the speed for the SPI RAM chip.
129 If SPIRAM_RODATA is also enabled, code that requires execution during an SPI1 Flash operation
130 can forgo being placed in IRAM, thus optimizing RAM usage (see External RAM documentation
134 bool "Move Read-Only Data in Flash to PSRAM"
139 …If SPIRAM_FETCH_INSTRUCTIONS is also enabled, code that requires execution during an SPI1 Flash op…
140 can forgo being placed in IRAM, thus optimizing RAM usage (see External RAM documentation
144 bool "Allow enabling SPI RAM ECC"
148 Enable MSPI Error-Correcting Code function when accessing SPIRAM.
149 If enabled, 1/16 of the SPI RAM total size will be reserved for error-correcting code.
153 menu "PSRAM clock and cs IO for ESP32-DOWD"
171 endmenu # PSRAM clock and cs IO for ESP32-DOWD
173 menu "PSRAM clock and cs IO for ESP32-D2WD"
180 …User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
188 …User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
191 endmenu # PSRAM clock and cs IO for ESP32-D2WD
193 menu "PSRAM clock and cs IO for ESP32-PICO"
202 For ESP32-PICO chip, the psram share clock with flash, so user do not need to configure the clock
204 https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf
206 endmenu # PSRAM clock and cs IO for ESP32-PICO
213 This setting is only used if the SPI flash pins have been overridden by setting the eFuses
214 SPI_PAD_CONFIG_xxx, and the SPI flash mode is DIO or DOUT.
216 …When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
217 ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
218 mode, so a WP pin setting is necessary.
220 If this config item is set to N (default), the correct WP pin will be automatically used for any
221 …Espressif chip or module with integrated flash. If a custom setting is needed, set this config item
224 …When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP p…
233 The option "Use custom SPI PSRAM WP(SD3) pin" must be set or this value is ignored