Lines Matching +full:0 +full:x38
48 dram1_0_seg : org = 0x3FFC0000, len = 0x20000
49 dram0_0_seg : org = 0x3FFE0000, len = 0x20000
50 iram0_0_seg : org = 0x40000000, len = 0x178
51 iram0_1_seg : org = 0x40000178, len = 0x8
52 iram0_2_seg : org = 0x40000180, len = 0x38
53 iram0_3_seg : org = 0x400001B8, len = 0x8
54 iram0_4_seg : org = 0x400001C0, len = 0x38
55 iram0_5_seg : org = 0x400001F8, len = 0x8
56 iram0_6_seg : org = 0x40000200, len = 0x38
57 iram0_7_seg : org = 0x40000238, len = 0x8
58 iram0_8_seg : org = 0x40000240, len = 0x38
59 iram0_9_seg : org = 0x40000278, len = 0x8
60 iram0_10_seg : org = 0x40000280, len = 0x38
61 iram0_11_seg : org = 0x400002B8, len = 0x8
62 iram0_12_seg : org = 0x400002C0, len = 0x38
63 iram0_13_seg : org = 0x400002F8, len = 0x8
64 iram0_14_seg : org = 0x40000300, len = 0x38
65 iram0_15_seg : org = 0x40000338, len = 0x8
66 iram0_16_seg : org = 0x40000340, len = 0x38
67 iram0_17_seg : org = 0x40000378, len = 0x48
68 iram0_18_seg : org = 0x400003C0, len = 0x40
69 iram0_19_seg : org = 0x40000400, len = 0x1FC00
71 vec_helpers : org = 0x40002400, len = (PHYS_RAM_ADDR - 0x00002400)
83 IDT_LIST : org = 0x3FFBE000, len = 0x2000
126 _rom_store_table = 0;
128 PROVIDE(_memmap_vecbase_reset = 0x40000000);
129 PROVIDE(_memmap_reset_vector = 0x50000000);
132 _memmap_cacheattr_wb_base = 0x00001110;
133 _memmap_cacheattr_wt_base = 0x00001110;
134 _memmap_cacheattr_bp_base = 0x00002220;
135 _memmap_cacheattr_unused_mask = 0xFFFF000F;
136 _memmap_cacheattr_wb_trapnull = 0x2222111F;
137 _memmap_cacheattr_wba_trapnull = 0x2222111F;
138 _memmap_cacheattr_wbna_trapnull = 0x2222111F;
139 _memmap_cacheattr_wt_trapnull = 0x2222111F;
140 _memmap_cacheattr_bp_trapnull = 0x2222222F;
141 _memmap_cacheattr_wb_strict = 0xFFFF111F;
142 _memmap_cacheattr_wt_strict = 0xFFFF111F;
143 _memmap_cacheattr_bp_strict = 0xFFFF222F;
144 _memmap_cacheattr_wb_allvalid = 0x22221112;
145 _memmap_cacheattr_wt_allvalid = 0x22221112;
146 _memmap_cacheattr_bp_allvalid = 0x22222222;
186 _memmap_seg_dram1_0_end = ALIGN(0x8);
217 _memmap_seg_dram0_0_end = ALIGN(0x8);
566 .xtensa.info 0 : { *(.xtensa.info) }
567 .xt.insn 0 :
572 .xt.prop 0 :
578 .xt.lit 0 :
584 .debug.xt.callgraph 0 :