Lines Matching +full:main +full:- +full:mode
2 * Copyright (c) 2013-2015 Wind River Systems, Inc.
5 * Copyright (c) 2019-2024 Gerson Fernando Budke <nandojve@gmail.com>
8 * SPDX-License-Identifier: Apache-2.0
15 * This module provides routines to initialize and support board-level hardware
28 * Setup Slow, Main, PLLA, Processor and Master clocks during the device boot.
33 /* Switch the main clock to the internal OSC with 12MHz */ in clock_init()
36 /* Switch MCK (Master Clock) to the main clock */ in clock_init()
39 EFC->EEFC_FMR = EEFC_FMR_FWS(0); in clock_init()
49 * Setup main external crystal oscillator. in clock_init()
68 EFC->EEFC_FMR = EEFC_FMR_FWS(5); in clock_init()
96 * Instruct CPU to enter Wait mode instead of Sleep mode to in soc_reset_hook()