Lines Matching +full:0 +full:x3
14 #define STM32_DMA_CH_CFG_MODE(val) ((val & 0x1) << 5)
15 #define STM32_DMA_MODE_NORMAL STM32_DMA_CH_CFG_MODE(0)
19 #define STM32_DMA_CH_CFG_DIRECTION(val) ((val & 0x3) << 6)
20 #define STM32_DMA_MEMORY_TO_MEMORY STM32_DMA_CH_CFG_DIRECTION(0)
26 #define STM32_DMA_CH_CFG_PERIPH_ADDR_INC(val) ((val & 0x1) << 9)
27 #define STM32_DMA_PERIPH_NO_INC STM32_DMA_CH_CFG_PERIPH_ADDR_INC(0)
31 #define STM32_DMA_CH_CFG_MEM_ADDR_INC(val) ((val & 0x1) << 10)
32 #define STM32_DMA_MEM_NO_INC STM32_DMA_CH_CFG_MEM_ADDR_INC(0)
36 #define STM32_DMA_CH_CFG_PERIPH_WIDTH(val) ((val & 0x3) << 11)
37 #define STM32_DMA_PERIPH_8BITS STM32_DMA_CH_CFG_PERIPH_WIDTH(0)
42 #define STM32_DMA_CH_CFG_MEM_WIDTH(val) ((val & 0x3) << 13)
43 #define STM32_DMA_MEM_8BITS STM32_DMA_CH_CFG_MEM_WIDTH(0)
48 #define STM32_DMA_CH_CFG_PERIPH_INC_FIXED(val) ((val & 0x1) << 15)
49 #define STM32_DMA_OFFSET_LINKED_BUS STM32_DMA_CH_CFG_PERIPH_INC_FIXED(0)
53 #define STM32_DMA_CH_CFG_PRIORITY(val) ((val & 0x3) << 16)
54 #define STM32_DMA_PRIORITY_LOW STM32_DMA_CH_CFG_PRIORITY(0)
60 #define STM32_DMA_FIFO_1_4 0U