Lines Matching +full:non +full:- +full:interrupt
4 * SPDX-License-Identifier: Apache-2.0
17 * Interrupt allocation flags - These flags can be used to specify
18 * which interrupt qualities the code calling esp_intr_alloc* needs.
30 #define ESP_INTR_FLAG_SHARED (1<<8) /* Interrupt can be shared between ISRs */
31 #define ESP_INTR_FLAG_EDGE (1<<9) /* Edge-triggered interrupt */
33 #define ESP_INTR_FLAG_INTRDISABLED (1<<11) /* Return with this interrupt disabled */
48 * Get the interrupt flags from the supplied priority.
54 * Check interrupt flags from input and filter unallowed values.
60 * are routed through the interrupt mux. Apart from these sources, each core also has some internal
61 * sources that do not pass through the interrupt mux. To allocate an interrupt for these sources,
62 * pass these pseudo-sources to the functions.
64 #define ETS_INTERNAL_TIMER0_INTR_SOURCE -1 /* Xtensa timer 0 interrupt source */
65 #define ETS_INTERNAL_TIMER1_INTR_SOURCE -2 /* Xtensa timer 1 interrupt source */
66 #define ETS_INTERNAL_TIMER2_INTR_SOURCE -3 /* Xtensa timer 2 interrupt source */
67 #define ETS_INTERNAL_SW0_INTR_SOURCE -4 /* Software int source 1 */
68 #define ETS_INTERNAL_SW1_INTR_SOURCE -5 /* Software int source 2 */
69 #define ETS_INTERNAL_PROFILING_INTR_SOURCE -6 /* Int source for profiling */
71 /* Function prototype for interrupt handler function */
94 /** Interrupt handler associated data structure */
101 * @brief Initializes interrupt table to its defaults
106 * @brief Mark an interrupt as a shared interrupt
108 * This will mark a certain interrupt on the specified CPU as
109 * an interrupt that can be used to hook shared interrupt handlers
112 * @param intno The number of the interrupt (0-31)
113 * @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
114 * @param is_in_iram Shared interrupt is for handlers that reside in IRAM and
117 * @return -EINVAL if cpu or intno is invalid
123 * @brief Reserve an interrupt to be used outside of this framework
125 * This will mark a certain interrupt on the specified CPU as
128 * @param intno The number of the interrupt (0-31)
129 * @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
131 * @return -EINVAL if cpu or intno is invalid
137 * @brief Allocate an interrupt with the given parameters.
139 * This finds an interrupt that matches the restrictions as given in the flags
140 * parameter, maps the given interrupt source to it and hooks up the given
141 * interrupt handler (with optional argument) as well. If needed, it can return
142 * a handle for the interrupt as well.
144 * The interrupt will always be allocated on the core that runs this function.
149 * @param source The interrupt source. One of the *_INTR_SOURCE interrupt mux
150 * sources, as defined in esp-xtensa-intmux.h, or one of the internal
154 * is 0, it will default to allocating a non-shared interrupt of level
156 * interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
157 * from this function with the interrupt disabled.
158 * @param handler The interrupt handler. Must be NULL when an interrupt of level >3
159 * is requested, because these types of interrupts aren't C-callable.
160 * @param arg Optional argument for passed to the interrupt handler
162 * later be used to request details or free the interrupt. Can be NULL if no handle
165 * @return -EINVAL if the combination of arguments is invalid.
166 * -ENODEV No free interrupt found with the specified flags
177 * @brief Allocate an interrupt with the given parameters.
182 * register, ANDed with the mask, returns non-zero. By passing an interrupt status register
183 * address and a fitting mask, this can be used to accelerate interrupt handling in the case
184 * a shared interrupt is triggered; by checking the interrupt statuses first, the code can
187 * @param source The interrupt source. One of the *_INTR_SOURCE interrupt mux
188 * sources, as defined in esp-xtensa-intmux.h, or one of the internal
192 * is 0, it will default to allocating a non-shared interrupt of level
194 * interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
195 * from this function with the interrupt disabled.
196 * @param intrstatusreg The address of an interrupt status register
200 * @param handler The interrupt handler. Must be NULL when an interrupt of level >3
201 * is requested, because these types of interrupts aren't C-callable.
202 * @param arg Optional argument for passed to the interrupt handler
204 * later be used to request details or free the interrupt. Can be NULL if no handle
207 * @return -EINVAL if the combination of arguments is invalid.
208 * -ENODEV No free interrupt found with the specified flags
221 * @brief Disable and free an interrupt.
223 * Use an interrupt handle to disable the interrupt and release the resources associated with it.
224 * If the current core is not the core that registered this interrupt, this routine will be
225 * assigned to the core that allocated this interrupt, blocking and waiting until the resource
229 * When the handler shares its source with other handlers, the interrupt status bits
235 * @return -EINVAL the handle is NULL
242 * @brief Get CPU number an interrupt is tied to
246 * @return The core number where the interrupt is allocated
251 * @brief Get the allocated interrupt for a certain handle
255 * @return The interrupt number
260 * @brief Disable the interrupt associated with the handle
264 * CPU the interrupt is allocated on. Other interrupts have no such restriction.
265 * 2. When several handlers sharing a same interrupt source, interrupt status bits, which are
267 * in other enabled interrupts properly. Miss of interrupt status handling will cause infinite
268 * interrupt calls and finally system crash.
272 * @return -EINVAL if the combination of arguments is invalid.
278 * @brief Enable the interrupt associated with the handle
281 * CPU the interrupt is allocated on. Other interrupts have no such restriction.
285 * @return -EINVAL if the combination of arguments is invalid.
299 * @return -EINVAL if the combination of arguments is invalid.
310 * @brief Re-enable interrupts disabled by esp_intr_noniram_disable