Lines Matching +full:xtal +full:- +full:freq
4 * SPDX-License-Identifier: Apache-2.0
7 #include <freq.h>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/clock/esp32_clock.h>
13 #include <zephyr/dt-bindings/interrupt-controller/esp-xtensa-intmux.h>
14 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
21 zephyr,flash-controller = &flash;
22 zephyr,bt-hci = &esp32_bt_hci;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "espressif,xtensa-lx6";
33 cpu-power-states = <&light_sleep &deep_sleep>;
34 clock-source = <ESP32_CPU_CLK_SRC_PLL>;
35 clock-frequency = <DT_FREQ_M(240)>;
36 xtal-freq = <DT_FREQ_M(40)>;
41 compatible = "espressif,xtensa-lx6";
43 clock-source = <ESP32_CPU_CLK_SRC_PLL>;
44 clock-frequency = <DT_FREQ_M(240)>;
45 xtal-freq = <DT_FREQ_M(40)>;
48 power-states {
50 compatible = "zephyr,power-state";
51 power-state-name = "standby";
52 min-residency-us = <200>;
53 exit-latency-us = <60>;
57 compatible = "zephyr,power-state";
58 power-state-name = "soft-off";
59 min-residency-us = <2000>;
60 exit-latency-us = <212>;
66 compatible = "espressif,esp32-wifi";
71 compatible = "espressif,esp32-bt-hci";
76 compatible = "espressif,esp32-eth";
78 interrupt-parent = <&intc>;
84 compatible = "espressif,esp32-mdio";
87 #address-cells = <1>;
88 #size-cells = <0>;
91 pinctrl: pin-controller {
92 compatible = "espressif,esp32-pinctrl";
98 compatible = "zephyr,memory-region", "mmio-sram";
100 zephyr,memory-region = "SRAM0";
104 compatible = "zephyr,memory-region", "mmio-sram";
106 zephyr,memory-region = "SRAM1";
110 compatible = "zephyr,memory-region", "mmio-sram";
112 zephyr,memory-region = "SRAM2";
116 compatible = "mmio-sram";
121 compatible = "mmio-sram";
126 compatible = "espressif,esp32-ipm";
129 shared-memory = <&ipmmem0>;
130 shared-memory-size = <0x400>;
134 interrupt-parent = <&intc>;
138 compatible = "espressif,mbox-esp32";
141 shared-memory = <&ipmmem0>;
142 shared-memory-size = <0x400>;
146 interrupt-parent = <&intc>;
147 #mbox-cells = <1>;
150 intc: interrupt-controller@3ff00104 {
151 #interrupt-cells = <3>;
152 #address-cells = <0>;
153 compatible = "espressif,esp32-intc";
154 interrupt-controller;
160 compatible = "espressif,esp32-rtc";
162 fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>;
163 slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>;
164 #clock-cells = <1>;
171 compatible = "espressif,esp32-rtc-timer";
174 interrupt-parent = <&intc>;
178 flash: flash-controller@3ff42000 {
179 compatible = "espressif,esp32-flash-controller";
181 #address-cells = <1>;
182 #size-cells = <1>;
185 compatible = "soc-nv-flash";
186 erase-block-size = <4096>;
187 write-block-size = <4>;
194 compatible = "mmio-sram";
201 compatible = "espressif,crosscore-interrupt";
204 interrupt-parent = <&intc>;
208 compatible = "espressif,crosscore-interrupt";
211 interrupt-parent = <&intc>;
215 compatible = "espressif,esp32-uart";
218 interrupt-parent = <&intc>;
224 compatible = "espressif,esp32-uart";
227 interrupt-parent = <&intc>;
233 compatible = "espressif,esp32-uart";
236 interrupt-parent = <&intc>;
242 compatible = "espressif,esp32-pcnt";
245 interrupt-parent = <&intc>;
251 compatible = "espressif,esp32-ledc";
252 #pwm-cells = <3>;
259 compatible = "espressif,esp32-mcpwm";
262 interrupt-parent = <&intc>;
264 #pwm-cells = <3>;
269 compatible = "espressif,esp32-mcpwm";
272 interrupt-parent = <&intc>;
274 #pwm-cells = <3>;
279 compatible = "simple-bus";
280 gpio-map-mask = <0xffffffe0 0xffffffc0>;
281 gpio-map-pass-thru = <0x1f 0x3f>;
282 gpio-map = <
286 #gpio-cells = <2>;
287 #address-cells = <1>;
288 #size-cells = <1>;
292 compatible = "espressif,esp32-gpio";
293 gpio-controller;
294 #gpio-cells = <2>;
297 interrupt-parent = <&intc>;
301 * the `gpio-reserved-ranges` property.
307 compatible = "espressif,esp32-gpio";
308 gpio-controller;
309 #gpio-cells = <2>;
312 interrupt-parent = <&intc>;
318 compatible = "espressif,esp32-touch";
321 interrupt-parent = <&intc>;
326 compatible = "espressif,esp32-i2c";
327 #address-cells = <1>;
328 #size-cells = <0>;
331 interrupt-parent = <&intc>;
337 compatible = "espressif,esp32-i2c";
338 #address-cells = <1>;
339 #size-cells = <0>;
342 interrupt-parent = <&intc>;
348 compatible = "espressif,esp32-trng";
354 compatible = "espressif,esp32-watchdog";
357 interrupt-parent = <&intc>;
363 compatible = "espressif,esp32-watchdog";
366 interrupt-parent = <&intc>;
372 compatible = "espressif,esp32-spi";
375 interrupt-parent = <&intc>;
377 dma-clk = <ESP32_SPI_DMA_MODULE>;
378 dma-host = <0>;
383 compatible = "espressif,esp32-spi";
386 interrupt-parent = <&intc>;
388 dma-clk = <ESP32_SPI_DMA_MODULE>;
389 dma-host = <1>;
394 compatible = "espressif,esp32-twai";
397 interrupt-parent = <&intc>;
403 compatible = "espressif,esp32-timer";
409 interrupt-parent = <&intc>;
414 compatible = "espressif,esp32-timer";
420 interrupt-parent = <&intc>;
425 compatible = "espressif,esp32-timer";
431 interrupt-parent = <&intc>;
436 compatible = "espressif,esp32-timer";
442 interrupt-parent = <&intc>;
447 compatible = "espressif,esp32-dac";
450 interrupt-parent = <&intc>;
452 #io-channel-cells = <1>;
457 compatible = "espressif,esp32-adc";
460 channel-count = <8>;
461 #io-channel-cells = <1>;
466 compatible = "espressif,esp32-adc";
469 channel-count = <10>;
470 #io-channel-cells = <1>;
475 compatible = "espressif,esp32-sdhc";
478 interrupt-parent = <&intc>;
480 #address-cells = <1>;
481 #size-cells = <0>;
484 compatible = "espressif,esp32-sdhc-slot";
490 compatible = "espressif,esp32-sdhc-slot";