Lines Matching +full:0 +full:x01
16 #address-cells = < 0x01 >;
17 #size-cells = < 0x01 >;
22 bank-width = < 0x04 >;
23 reg = < 0x20000000 0x2000000 0x22000000 0x2000000 >;
28 interrupts = < 0x0a 1 >;
30 clock-frequency = < 0x384000 >;
31 reg = < 0x10000000 0x100 >;
33 reg-shift = < 0 >;
37 #address-cells = < 0x01 >;
38 #size-cells = < 0x00 >;
40 cpu@0 {
42 reg = < 0x00 >;
48 #address-cells = <0>;
49 #interrupt-cells = < 0x01 >;
56 reg = < 0x01 >;
62 #address-cells = <0>;
63 #interrupt-cells = < 0x01 >;
70 reg = < 0x02 >;
76 #address-cells = <0>;
77 #interrupt-cells = < 0x01 >;
84 reg = < 0x03 >;
90 #address-cells = <0>;
91 #interrupt-cells = < 0x01 >;
98 reg = < 0x04 >;
104 #address-cells = <0>;
105 #interrupt-cells = < 0x01 >;
112 reg = < 0x05 >;
118 #address-cells = <0>;
119 #interrupt-cells = < 0x01 >;
126 reg = < 0x06 >;
132 #address-cells = <0>;
133 #interrupt-cells = < 0x01 >;
140 reg = < 0x07 >;
146 #address-cells = <0>;
147 #interrupt-cells = < 0x01 >;
155 reg = < 0x80000000 0x10000000 >;
159 #address-cells = < 0x01 >;
160 #size-cells = < 0x01 >;
167 reg = <0x0c000000 0x04000000>;
169 &hlic0 0x0b &hlic0 0x09
170 &hlic1 0x0b &hlic1 0x09
171 &hlic2 0x0b &hlic2 0x09
172 &hlic3 0x0b &hlic3 0x09
173 &hlic4 0x0b &hlic4 0x09
174 &hlic5 0x0b &hlic5 0x09
175 &hlic6 0x0b &hlic6 0x09
176 &hlic7 0x0b &hlic7 0x09
179 compatible = "sifive,plic-1.0.0";
180 #address-cells = < 0x00 >;
181 #interrupt-cells = < 0x02 >;
186 reg = <0x2000000 0x10000>;
187 interrupts-extended = <&hlic0 0x03 &hlic0 0x07
188 &hlic1 0x03 &hlic1 0x07
189 &hlic2 0x03 &hlic2 0x07
190 &hlic3 0x03 &hlic3 0x07
191 &hlic4 0x03 &hlic4 0x07
192 &hlic5 0x03 &hlic5 0x07
193 &hlic6 0x03 &hlic6 0x07
194 &hlic7 0x03 &hlic7 0x07>;