Lines Matching +full:1 +full:- +full:bit
4 * SPDX-License-Identifier: Apache-2.0
12 compatible = "mmio-sram";
16 intc: interrupt-controller@f03f00 {
17 compatible = "ite,it8xxx2-intc-v2";
18 #address-cells = <0>;
19 #interrupt-cells = <2>;
20 interrupt-controller;
25 compatible = "ite,it8xxx2-watchdog";
29 interrupt-parent = <&intc>;
32 gpiogcr: gpio-gcr@f03e00 {
33 compatible = "ite,it8xxx2-gpiogcr";
38 compatible = "ite,it8xxx2-gpio-v2";
39 reg = <0x00f01601 1 /* GPDR (set) */
40 0x00f01618 1 /* GPDMR (get) */
41 0x00f01630 1 /* GPOTR */
42 0x00f01648 1 /* P18SCR */
45 gpio-controller;
54 interrupt-parent = <&intc>;
55 wuc-base = <0xf01b20 0xf01b20 0xf01b20 0xf01b1c
57 wuc-mask = <BIT(3) BIT(4) BIT(5) BIT(0)
58 BIT(1) BIT(2) BIT(3) BIT(4) >;
59 has-volt-sel = <1 1 1 1 1 1 1 1>;
60 #gpio-cells = <2>;
64 compatible = "ite,it8xxx2-gpio-v2";
65 reg = <0x00f01602 1 /* GPDR (set) */
66 0x00f01619 1 /* GPDMR (get) */
67 0x00f01631 1 /* GPOTR */
68 0x00f01649 1 /* P18SCR */
71 gpio-controller;
80 interrupt-parent = <&intc>;
81 wuc-base = <0xf01b24 0xf01b24 0xf01b1c 0xf01b24
83 wuc-mask = <BIT(5) BIT(6) BIT(4) BIT(7)
84 BIT(6) BIT(0) BIT(1) 0 >;
85 has-volt-sel = <1 1 1 1 1 1 1 0>;
86 #gpio-cells = <2>;
90 compatible = "ite,it8xxx2-gpio-v2";
91 reg = <0x00f01603 1 /* GPDR (set) */
92 0x00f0161a 1 /* GPDMR (get) */
93 0x00f01632 1 /* GPOTR */
94 0x00f0164a 1 /* P18SCR */
97 gpio-controller;
106 interrupt-parent = <&intc>;
107 wuc-base = <0xf01b1c 0xf01b28 0xf01b20 0xf01b28
109 wuc-mask = <BIT(5) BIT(3) BIT(7) BIT(4)
110 BIT(2) BIT(5) BIT(3) BIT(6) >;
111 has-volt-sel = <1 1 1 1 1 1 1 1>;
112 #gpio-cells = <2>;
116 compatible = "ite,it8xxx2-gpio-v2";
117 reg = <0x00f01604 1 /* GPDR (set) */
118 0x00f0161b 1 /* GPDMR (get) */
119 0x00f01633 1 /* GPOTR */
120 0x00f0164b 1 /* P18SCR */
123 gpio-controller;
132 interrupt-parent = <&intc>;
133 wuc-base = <0xf01b04 0xf01b04 0xf01b04 0xf01b28
135 wuc-mask = <BIT(0) BIT(1) BIT(4) BIT(6)
136 BIT(7) BIT(0) BIT(1) BIT(7) >;
137 has-volt-sel = <1 1 1 1 1 1 1 1>;
138 #gpio-cells = <2>;
142 compatible = "ite,it8xxx2-gpio-v2";
143 reg = <0x00f01605 1 /* GPDR (set) */
144 0x00f0161c 1 /* GPDMR (get) */
145 0x00f01634 1 /* GPOTR */
146 0x00f0164c 1 /* P18SCR */
149 gpio-controller;
158 interrupt-parent = <&intc>;
159 wuc-base = <0xf01b18 0xf01b18 0xf01b18 0xf01b18
161 wuc-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
162 BIT(2) BIT(0) BIT(5) BIT(6) >;
163 has-volt-sel = <1 1 1 1 1 1 1 1>;
164 #gpio-cells = <2>;
168 compatible = "ite,it8xxx2-gpio-v2";
169 reg = <0x00f01606 1 /* GPDR (set) */
170 0x00f0161d 1 /* GPDMR (get) */
171 0x00f01635 1 /* GPOTR */
172 0x00f0164d 1 /* P18SCR */
175 gpio-controller;
184 interrupt-parent = <&intc>;
185 wuc-base = <0xf01b24 0xf01b24 0xf01b24 0xf01b24
187 wuc-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
188 BIT(4) BIT(5) BIT(6) BIT(7) >;
189 has-volt-sel = <1 1 1 1 1 1 1 1>;
190 #gpio-cells = <2>;
194 compatible = "ite,it8xxx2-gpio-v2";
195 reg = <0x00f01607 1 /* GPDR (set) */
196 0x00f0161e 1 /* GPDMR (get) */
197 0x00f01636 1 /* GPOTR */
198 0x00f0164e 1 /* P18SCR */
201 gpio-controller;
210 interrupt-parent = <&intc>;
211 wuc-base = <0xf01b2c 0xf01b2c 0xf01b2c 0xf01b30
213 wuc-mask = <BIT(3) BIT(4) BIT(5) BIT(3)
214 BIT(4) BIT(5) BIT(6) BIT(6) >;
215 has-volt-sel = <1 1 1 0 0 0 1 0>;
216 #gpio-cells = <2>;
220 compatible = "ite,it8xxx2-gpio-v2";
221 reg = <0x00f01608 1 /* GPDR (set) */
222 0x00f0161f 1 /* GPDMR (get) */
223 0x00f01637 1 /* GPOTR */
224 0x00f0164f 1 /* P18SCR */
227 gpio-controller;
236 interrupt-parent = <&intc>;
237 wuc-base = <0xf01b14 0xf01b14 0xf01b14 0xf01b14
239 wuc-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
240 BIT(0) BIT(1) BIT(2) 0 >;
241 has-volt-sel = <1 1 1 1 1 1 1 0>;
242 #gpio-cells = <2>;
246 compatible = "ite,it8xxx2-gpio-v2";
247 reg = <0x00f01609 1 /* GPDR (set) */
248 0x00f01620 1 /* GPDMR (get) */
249 0x00f01638 1 /* GPOTR */
250 0x00f01650 1 /* P18SCR */
253 gpio-controller;
262 interrupt-parent = <&intc>;
263 wuc-base = <0xf01b2c 0xf01b30 0xf01b30 0xf01b30
265 wuc-mask = <BIT(7) BIT(0) BIT(1) BIT(2)
266 BIT(4) BIT(5) BIT(6) BIT(7) >;
267 has-volt-sel = <1 1 1 1 1 1 1 1>;
268 #gpio-cells = <2>;
272 compatible = "ite,it8xxx2-gpio-v2";
273 reg = <0x00f0160a 1 /* GPDR (set) */
274 0x00f01621 1 /* GPDMR (get) */
275 0x00f01639 1 /* GPOTR */
276 0x00f01651 1 /* P18SCR */
279 gpio-controller;
288 interrupt-parent = <&intc>;
289 wuc-base = <0xf01b34 0xf01b34 0xf01b34 0xf01b34
291 wuc-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
292 BIT(4) BIT(5) BIT(6) BIT(7)>;
293 has-volt-sel = <1 1 1 1 1 1 1 1>;
294 #gpio-cells = <2>;
298 compatible = "ite,it8xxx2-gpio-v2";
299 reg = <0x00f0160b 1 /* GPDR (set) */
300 0x00f01622 1 /* GPDMR (get) */
301 0x00f0163a 1 /* GPOTR */
302 0x00f01652 1 /* P18SCR */
305 gpio-controller;
314 interrupt-parent = <&intc>;
315 wuc-base = <0xf01b10 0xf01b10 0xf01b10 0xf01b10
317 wuc-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
318 BIT(4) BIT(5) BIT(6) BIT(7) >;
319 has-volt-sel = <1 1 1 1 1 1 1 1>;
320 #gpio-cells = <2>;
324 compatible = "ite,it8xxx2-gpio-v2";
325 reg = <0x00f0160c 1 /* GPDR (set) */
326 0x00f01623 1 /* GPDMR (get) */
327 0x00f0163b 1 /* GPOTR */
328 0x00f01653 1 /* P18SCR */
331 gpio-controller;
340 interrupt-parent = <&intc>;
341 wuc-base = <0xf01b38 0xf01b38 0xf01b38 0xf01b38
343 wuc-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
344 BIT(4) BIT(5) BIT(6) BIT(7) >;
345 has-volt-sel = <1 1 1 1 1 1 1 1>;
346 #gpio-cells = <2>;
350 compatible = "ite,it8xxx2-gpio-v2";
351 reg = <0x00f0160d 1 /* GPDR (set) */
352 0x00f01624 1 /* GPDMR (get) */
353 0x00f0163c 1 /* GPOTR */
354 0x00f01654 1 /* P18SCR */
357 gpio-controller;
366 interrupt-parent = <&intc>;
367 wuc-base = <0xf01b3c 0xf01b3c 0xf01b3c 0xf01b3c
369 wuc-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
370 BIT(4) BIT(5) BIT(6) 0 >;
371 has-volt-sel = <1 1 1 1 1 1 1 0>;
372 #gpio-cells = <2>;
376 compatible = "ite,it8xxx2-gpio-v2";
377 reg = <0x00f01d08 1 /* GPDR (set) */
378 0x00f01d09 1 /* GPDMR (get) */
379 0x00f01d2c 1 /* GPOTR */
380 NO_FUNC 1 /* P18SCR */
383 gpio-controller;
392 interrupt-parent = <&intc>;
393 keyboard-controller;
394 #gpio-cells = <2>;
398 compatible = "ite,it8xxx2-gpio-v2";
399 reg = <0x00f01d01 1 /* GPDR (set) */
400 0x00f01d0c 1 /* GPDMR (get) */
401 0x00f01d2d 1 /* GPOTR */
402 NO_FUNC 1 /* P18SCR */
405 gpio-controller;
414 interrupt-parent = <&intc>;
415 keyboard-controller;
416 #gpio-cells = <2>;
420 compatible = "ite,it8xxx2-gpio-v2";
421 reg = <0x00f01d00 1 /* GPDR (set) */
422 0x00f01d0f 1 /* GPDMR (get) */
423 0x00f01d2e 1 /* GPOTR */
424 NO_FUNC 1 /* P18SCR */
427 gpio-controller;
436 interrupt-parent = <&intc>;
437 keyboard-controller;
438 #gpio-cells = <2>;
441 pinctrl: pin-controller {
442 compatible = "ite,it8xxx2-pinctrl";
443 #address-cells = <1>;
444 #size-cells = <1>;
449 compatible = "ite,it8xxx2-pinctrl-func";
451 0x00f03e30 1>; /* PDSCA */
452 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
454 func3-en-mask = <0 0 0 0
456 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
458 func4-en-mask = <0 0 0 0
460 volt-sel = <0xf01648 0xf01648 0xf01648 0xf01648
462 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
463 BIT(4) BIT(5) BIT(6) BIT(7) >;
464 #pinmux-cells = <2>;
465 gpio-group;
469 compatible = "ite,it8xxx2-pinctrl-func";
471 0x00f03e31 1>; /* PDSCB */
472 func3-gcr = <0xf03e15 0xf03e15 0xf03e11 NO_FUNC
474 func3-en-mask = <0x01 0x02 0x20 0
476 func3-ext = <NO_FUNC NO_FUNC 0xf03e16 NO_FUNC
478 func3-ext-mask = <0 0 0x40 0
480 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
482 func4-en-mask = <0 0 0 0
484 volt-sel = <0xf01649 0xf01649 0xf01649 0xf01649
486 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
487 BIT(4) BIT(5) BIT(6) 0 >;
488 #pinmux-cells = <2>;
489 gpio-group;
493 compatible = "ite,it8xxx2-pinctrl-func";
495 0x00f03e32 1>; /* PDSCC */
496 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC 0xf03e10
498 func3-en-mask = <0 0 0 0x10
500 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
502 func4-en-mask = <0 0 0 0
504 volt-sel = <0xf0164a 0xf0164a 0xf0164a 0xf0164a
506 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
507 BIT(4) BIT(5) BIT(6) BIT(7) >;
508 #pinmux-cells = <2>;
509 gpio-group;
513 compatible = "ite,it8xxx2-pinctrl-func";
515 0x00f03e33 1>; /* PDSCD */
516 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
518 func3-en-mask = <0 0 0 0
520 func4-gcr = <0xf03e16 NO_FUNC NO_FUNC NO_FUNC
522 func4-en-mask = <0x80 0 0 0
524 volt-sel = <0xf0164b 0xf0164b 0xf0164b 0xf0164b
526 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
527 BIT(4) BIT(5) BIT(6) BIT(7) >;
528 #pinmux-cells = <2>;
529 gpio-group;
533 compatible = "ite,it8xxx2-pinctrl-func";
535 0x00f03e34 1>; /* PDSCE */
536 func3-gcr = <NO_FUNC 0xf03e16 0xf03e16 NO_FUNC
538 func3-en-mask = <0 0x20 0x20 0
540 func3-ext = <0xf02032 0xf02032 0xf02032 NO_FUNC
542 func3-ext-mask = <0x01 0x02 0x02 0
544 func4-gcr = <0xf03e13 NO_FUNC NO_FUNC NO_FUNC
546 func4-en-mask = <0x01 0 0 0
548 volt-sel = <0xf0164c 0xf0164c 0xf0164c 0xf0164c
550 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
551 BIT(4) BIT(5) BIT(6) BIT(7) >;
552 #pinmux-cells = <2>;
553 gpio-group;
557 compatible = "ite,it8xxx2-pinctrl-func";
559 0x00f03e35 1>; /* PDSCF */
560 func3-gcr = <0xf03e15 0xf03e15 0xf03e10 0xf03e10
562 func3-en-mask = <0x04 0x08 0x02 0x02
564 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
566 func4-en-mask = <0 0 0 0
568 volt-sel = <0xf0164d 0xf0164d 0xf0164d 0xf0164d
570 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
571 BIT(4) BIT(5) BIT(6) BIT(7) >;
572 #pinmux-cells = <2>;
573 gpio-group;
577 compatible = "ite,it8xxx2-pinctrl-func";
579 0x00f03e36 1>; /* PDSCG */
580 func3-gcr = <0xf03e10 0xf03e10 0xf03e10 NO_FUNC
582 func3-en-mask = <0x20 0x08 0x10 0
584 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
586 func4-en-mask = <0 0 0 0
588 volt-sel = <0xf0164e 0xf0164e 0xf0164e NO_FUNC
590 volt-sel-mask = <BIT(0) BIT(1) BIT(2) 0
591 0 0 BIT(6) 0 >;
592 #pinmux-cells = <2>;
593 gpio-group;
597 compatible = "ite,it8xxx2-pinctrl-func";
599 0x00f03e37 1>; /* PDSCH */
600 func3-gcr = <NO_FUNC 0xf03e11 0xf03e11 NO_FUNC
602 func3-en-mask = <0 0x20 0x20 0
604 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
606 func4-en-mask = <0 0 0 0
608 volt-sel = <0xf0164f 0xf0164f 0xf0164f 0xf0164f
610 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
611 BIT(4) BIT(5) BIT(6) 0 >;
612 #pinmux-cells = <2>;
613 gpio-group;
617 compatible = "ite,it8xxx2-pinctrl-func";
619 NO_FUNC 1>;
620 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
622 func3-en-mask = <0 0 0 0
624 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
626 func4-en-mask = <0 0 0 0
628 volt-sel = <0xf01650 0xf01650 0xf01650 0xf01650
630 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
631 BIT(4) BIT(5) BIT(6) BIT(7) >;
632 #pinmux-cells = <2>;
633 gpio-group;
637 compatible = "ite,it8xxx2-pinctrl-func";
639 0x00f03e39 1>; /* PDSCJ */
640 func3-gcr = <0xf03e14 NO_FUNC 0xf03e14 0xf03e14
642 func3-en-mask = <0x01 0 0x01 0x02
644 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
646 func4-en-mask = <0 0 0 0
648 volt-sel = <0xf01651 0xf01651 0xf01651 0xf01651
650 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
651 BIT(4) BIT(5) 0 0 >;
652 #pinmux-cells = <2>;
653 gpio-group;
657 compatible = "ite,it8xxx2-pinctrl-func";
659 0x00f03e3A 1>; /* PDSCK */
660 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
662 func3-en-mask = <0 0 0 0
664 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
666 func4-en-mask = <0 0 0 0
668 volt-sel = <0xf01652 0xf01652 0xf01652 0xf01652
670 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
671 BIT(4) BIT(5) BIT(6) BIT(7) >;
672 #pinmux-cells = <2>;
673 gpio-group;
677 compatible = "ite,it8xxx2-pinctrl-func";
679 0x00f03e3B 1>; /* PDSCL */
680 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
682 func3-en-mask = <0 0 0 0
684 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
686 func4-en-mask = <0 0 0 0
688 volt-sel = <0xf01653 0xf01653 0xf01653 0xf01653
690 volt-sel-mask = <BIT(0) BIT(1) BIT(2) BIT(3)
691 BIT(4) BIT(5) BIT(6) BIT(7) >;
692 #pinmux-cells = <2>;
693 gpio-group;
697 compatible = "ite,it8xxx2-pinctrl-func";
699 NO_FUNC 1>;
700 func3-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
702 func3-en-mask = <0 0 0 0
704 func4-gcr = <NO_FUNC NO_FUNC NO_FUNC NO_FUNC
706 func4-en-mask = <0 0 0 0
708 volt-sel = <0xf03e2d 0xf03e2d 0xf03e2d 0xf03e2d
710 volt-sel-mask = <BIT(4) BIT(4) BIT(4) BIT(4)
711 BIT(4) BIT(4) BIT(4) 0 >;
712 #pinmux-cells = <2>;
713 gpio-group;
717 compatible = "ite,it8xxx2-pinctrl-func";
719 0x00f01d05 1>; /* KSICTRL */
720 pp-od-mask = <NO_FUNC>;
721 pullup-mask = <BIT(2)>;
722 #pinmux-cells = <2>;
726 compatible = "ite,it8xxx2-pinctrl-func";
728 0x00f01d02 1>; /* KSOCTRL */
729 pp-od-mask = <BIT(0)>;
730 pullup-mask = <BIT(2)>;
731 #pinmux-cells = <2>;
735 compatible = "ite,it8xxx2-pinctrl-func";
737 0x00f01d02 1>; /* KSOCTRL */
738 pp-od-mask = <BIT(0)>;
739 pullup-mask = <BIT(2)>;
740 #pinmux-cells = <2>;
743 wuc1: wakeup-controller@f01b00 {
744 compatible = "ite,it8xxx2-wuc";
745 reg = <0x00f01b00 1 /* WUEMR1 */
746 0x00f01b01 1 /* WUESR1 */
747 0x00f01b02 1 /* WUENR1 */
748 0x00f01b03 1>; /* WUBEMR1 */
749 wakeup-controller;
750 #wuc-cells = <1>;
753 wuc2: wakeup-controller@f01b04 {
754 compatible = "ite,it8xxx2-wuc";
755 reg = <0x00f01b04 1 /* WUEMR2 */
756 0x00f01b05 1 /* WUESR2 */
757 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR2 */
758 0x00f01b07 1>; /* WUBEMR2 */
759 wakeup-controller;
760 #wuc-cells = <1>;
763 wuc3: wakeup-controller@f01b08 {
764 compatible = "ite,it8xxx2-wuc";
765 reg = <0x00f01b08 1 /* WUEMR3 */
766 0x00f01b09 1 /* WUESR3 */
767 0x00f01b0a 1 /* WUENR3 */
768 0x00f01b0b 1>; /* WUBEMR3 */
769 wakeup-controller;
770 #wuc-cells = <1>;
773 wuc4: wakeup-controller@f01b0c {
774 compatible = "ite,it8xxx2-wuc";
775 reg = <0x00f01b0c 1 /* WUEMR4 */
776 0x00f01b0d 1 /* WUESR4 */
777 0x00f01b0e 1 /* WUENR4 */
778 0x00f01b0f 1>; /* WUBEMR4 */
779 wakeup-controller;
780 #wuc-cells = <1>;
783 wuc5: wakeup-controller@f01b10 {
784 compatible = "ite,it8xxx2-wuc";
785 reg = <0x00f01b10 1 /* WUEMR5 */
786 0x00f01b11 1 /* WUESR5 */
787 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR5 */
788 0x00f01b13 1>; /* WUBEMR5 */
789 wakeup-controller;
790 #wuc-cells = <1>;
793 wuc6: wakeup-controller@f01b14 {
794 compatible = "ite,it8xxx2-wuc";
795 reg = <0x00f01b14 1 /* WUEMR6 */
796 0x00f01b15 1 /* WUESR6 */
797 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR6 */
798 0x00f01b17 1>; /* WUBEMR6 */
799 wakeup-controller;
800 #wuc-cells = <1>;
803 wuc7: wakeup-controller@f01b18 {
804 compatible = "ite,it8xxx2-wuc";
805 reg = <0x00f01b18 1 /* WUEMR7 */
806 0x00f01b19 1 /* WUESR7 */
807 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR7 */
808 0x00f01b1b 1>; /* WUBEMR7 */
809 wakeup-controller;
810 #wuc-cells = <1>;
813 wuc8: wakeup-controller@f01b1c {
814 compatible = "ite,it8xxx2-wuc";
815 reg = <0x00f01b1c 1 /* WUEMR8 */
816 0x00f01b1d 1 /* WUESR8 */
817 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR8 */
818 0x00f01b1f 1>; /* WUBEMR8 */
819 wakeup-controller;
820 #wuc-cells = <1>;
823 wuc9: wakeup-controller@f01b20 {
824 compatible = "ite,it8xxx2-wuc";
825 reg = <0x00f01b20 1 /* WUEMR9 */
826 0x00f01b21 1 /* WUESR9 */
827 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR9 */
828 0x00f01b23 1>; /* WUBEMR9 */
829 wakeup-controller;
830 #wuc-cells = <1>;
833 wuc10: wakeup-controller@f01b24 {
834 compatible = "ite,it8xxx2-wuc";
835 reg = <0x00f01b24 1 /* WUEMR10 */
836 0x00f01b25 1 /* WUESR10 */
837 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR10 */
838 0x00f01b27 1>; /* WUBEMR10 */
839 wakeup-controller;
840 #wuc-cells = <1>;
843 wuc11: wakeup-controller@f01b28 {
844 compatible = "ite,it8xxx2-wuc";
845 reg = <0x00f01b28 1 /* WUEMR11 */
846 0x00f01b29 1 /* WUESR11 */
847 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR11 */
848 0x00f01b2b 1>; /* WUBEMR11 */
849 wakeup-controller;
850 #wuc-cells = <1>;
853 wuc12: wakeup-controller@f01b2c {
854 compatible = "ite,it8xxx2-wuc";
855 reg = <0x00f01b2c 1 /* WUEMR12 */
856 0x00f01b2d 1 /* WUESR12 */
857 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR12 */
858 0x00f01b2f 1>; /* WUBEMR12 */
859 wakeup-controller;
860 #wuc-cells = <1>;
863 wuc13: wakeup-controller@f01b30 {
864 compatible = "ite,it8xxx2-wuc";
865 reg = <0x00f01b30 1 /* WUEMR13 */
866 0x00f01b31 1 /* WUESR13 */
867 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR13 */
868 0x00f01b33 1>; /* WUBEMR13 */
869 wakeup-controller;
870 #wuc-cells = <1>;
873 wuc14: wakeup-controller@f01b34 {
874 compatible = "ite,it8xxx2-wuc";
875 reg = <0x00f01b34 1 /* WUEMR14 */
876 0x00f01b35 1 /* WUESR14 */
877 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR14 */
878 0x00f01b37 1>; /* WUBEMR14 */
879 wakeup-controller;
880 #wuc-cells = <1>;
883 wuc15: wakeup-controller@f01b38 {
884 compatible = "ite,it8xxx2-wuc";
885 reg = <0x00f01b38 1 /* WUEMR15 */
886 0x00f01b39 1 /* WUESR15 */
887 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR15 */
888 0x00f01b3b 1>; /* WUBEMR15 */
889 wakeup-controller;
890 #wuc-cells = <1>;
893 wuc16: wakeup-controller@f01b3c {
894 compatible = "ite,it8xxx2-wuc";
895 reg = <0x00f01b3c 1 /* WUEMR16 */
896 0x00f01b3d 1 /* WUESR16 */
897 IT8XXX2_WUC_UNUSED_REG 1 /* WUENR16 */
898 0x00f01b3f 1>; /* WUBEMR16 */
899 wakeup-controller;
900 #wuc-cells = <1>;
904 compatible = "ite,enhance-i2c";
905 #address-cells = <1>;
906 #size-cells = <0>;
909 interrupt-parent = <&intc>;
911 port-num = <SMB_CHANNEL_A>;
912 channel-switch-sel = <I2C_CHA_LOCATE>;
913 scl-gpios = <&gpiob 3 0>;
914 sda-gpios = <&gpiob 4 0>;
915 clock-gate-offset = <CGC_OFFSET_SMBA>;
919 compatible = "ite,enhance-i2c";
920 #address-cells = <1>;
921 #size-cells = <0>;
924 interrupt-parent = <&intc>;
926 port-num = <SMB_CHANNEL_B>;
927 channel-switch-sel = <I2C_CHB_LOCATE>;
928 scl-gpios = <&gpioc 1 0>;
929 sda-gpios = <&gpioc 2 0>;
930 clock-gate-offset = <CGC_OFFSET_SMBB>;
934 compatible = "ite,enhance-i2c";
935 #address-cells = <1>;
936 #size-cells = <0>;
939 interrupt-parent = <&intc>;
941 port-num = <SMB_CHANNEL_C>;
942 channel-switch-sel = <I2C_CHC_LOCATE>;
943 scl-gpios = <&gpiof 6 0>;
944 sda-gpios = <&gpiof 7 0>;
945 clock-gate-offset = <CGC_OFFSET_SMBC>;
949 compatible = "ite,enhance-i2c";
950 #address-cells = <1>;
951 #size-cells = <0>;
954 interrupt-parent = <&intc>;
956 port-num = <I2C_CHANNEL_D>;
957 channel-switch-sel = <I2C_CHD_LOCATE>;
958 scl-gpios = <&gpioh 1 0>;
959 sda-gpios = <&gpioh 2 0>;
960 clock-gate-offset = <CGC_OFFSET_SMBD>;
964 compatible = "ite,enhance-i2c";
965 #address-cells = <1>;
966 #size-cells = <0>;
969 interrupt-parent = <&intc>;
971 port-num = <I2C_CHANNEL_E>;
972 channel-switch-sel = <I2C_CHE_LOCATE>;
973 scl-gpios = <&gpioe 0 0>;
974 sda-gpios = <&gpioe 7 0>;
975 clock-gate-offset = <CGC_OFFSET_SMBE>;
979 compatible = "ite,enhance-i2c";
980 #address-cells = <1>;
981 #size-cells = <0>;
984 interrupt-parent = <&intc>;
986 port-num = <I2C_CHANNEL_F>;
987 channel-switch-sel = <I2C_CHF_LOCATE>;
988 scl-gpios = <&gpioa 4 0>;
989 sda-gpios = <&gpioa 5 0>;
990 clock-gate-offset = <CGC_OFFSET_SMBF>;
994 compatible = "ite,it8xxx2-uart";
997 port-num = <2>;
999 uart-dev = <&uart2>;
1003 compatible = "ite,it82xx2-usb";
1006 interrupt-parent = <&intc>;
1010 num-bidir-endpoints = <1>;
1011 num-in-endpoints = <10>;
1012 num-out-endpoints = <5>;
1016 compatible = "ite,it8xxx2-sha-v2";
1022 #address-cells = <1>;
1023 #size-cells = <0>;
1024 compatible = "ite,it8xxx2-spi";
1026 interrupt-parent = <&intc>;