Lines Matching +full:reg +full:- +full:io +full:- +full:width
4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/adc/nrf-saadc.h>
11 #include <zephyr/dt-bindings/misc/nordic-nrf-ficr-nrf54h20.h>
12 #include <zephyr/dt-bindings/misc/nordic-domain-id-nrf54h20.h>
13 #include <zephyr/dt-bindings/misc/nordic-owner-id-nrf54h20.h>
14 #include <zephyr/dt-bindings/misc/nordic-tddconf.h>
15 #include <zephyr/dt-bindings/reserved-memory/nordic-owned-memory.h>
16 #include <zephyr/dt-bindings/power/nordic-nrf-gpd.h>
18 /delete-node/ &sw_pwm;
21 #address-cells = <1>;
22 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
29 compatible = "arm,cortex-m33";
30 reg = <2>;
33 clock-frequency = <DT_FREQ_M(320)>;
34 cpu-power-states = <&idle_cache_disabled &s2ram>;
38 compatible = "arm,cortex-m33";
39 reg = <3>;
42 clock-frequency = <DT_FREQ_M(256)>;
43 cpu-power-states = <&idle_cache_disabled>;
48 reg = <13>;
51 clock-frequency = <DT_FREQ_M(16)>;
53 nordic,bus-width = <32>;
56 compatible = "nordic,nrf-vevif-task-rx";
58 interrupt-parent = <&cpuppr_clic>;
75 #mbox-cells = <1>;
77 nordic,tasks-mask = <0xfffffff0>;
83 reg = <14>;
85 clock-frequency = <DT_FREQ_M(320)>;
87 nordic,bus-width = <64>;
90 compatible = "nordic,nrf-vevif-task-rx";
92 interrupt-parent = <&cpuflpr_clic>;
125 #mbox-cells = <1>;
127 nordic,tasks-mask = <0xffff0000>;
131 power-states {
132 // substate-id = <0>; is reserved for "idle", cache powered on
133 // substate-id = <1>; is reserved for "idle-cache-retained"
135 compatible = "zephyr,power-state";
136 power-state-name = "suspend-to-idle";
137 substate-id = <2>;
138 min-residency-us = <1000>;
139 exit-latency-us = <30>;
142 compatible = "zephyr,power-state";
143 power-state-name = "suspend-to-ram";
144 min-residency-us = <2000>;
145 exit-latency-us = <260>;
150 reserved-memory {
151 #address-cells = <1>;
152 #size-cells = <1>;
155 reg = <0xe1ed000 DT_SIZE_K(20)>;
161 compatible = "nordic,nrf54h-hfxo";
163 #clock-cells = <0>;
164 clock-frequency = <DT_FREQ_M(32)>;
168 compatible = "nordic,nrf54h-lfxo";
170 #clock-cells = <0>;
171 clock-frequency = <32768>;
175 compatible = "nordic,nrf-fll16m";
176 #clock-cells = <0>;
177 clock-frequency = <DT_FREQ_M(16)>;
178 open-loop-accuracy-ppm = <20000>;
179 closed-loop-base-accuracy-ppm = <5000>;
181 clock-names = "hfxo", "lfxo";
185 compatible = "nordic,nrf-hsfll-global";
187 #clock-cells = <0>;
188 clock-frequency = <320000000>;
189 supported-clock-frequencies = <64000000
196 compatible = "nordic,nrf-lfclk";
197 #clock-cells = <0>;
198 clock-frequency = <32768>;
200 lfrc-accuracy-ppm = <500>;
201 lflprc-accuracy-ppm = <1000>;
203 clock-names = "hfxo", "lfxo";
207 gpd: global-power-domain {
208 compatible = "nordic,nrf-gpd";
209 #power-domain-cells = <1>;
213 #address-cells = <1>;
214 #size-cells = <1>;
218 reg = <0xe000000 DT_SIZE_K(2048)>;
219 power-domains = <&gpd NRF_GPD_FAST_ACTIVE0>;
220 erase-block-size = <4096>;
221 write-block-size = <16>;
225 compatible = "nordic,nrf-uicr-v2";
226 reg = <0xfff8000 DT_SIZE_K(2)>;
227 #address-cells = <1>;
228 #size-cells = <1>;
233 compatible = "nordic,nrf-bicr";
234 reg = <0x7b0 48>;
239 compatible = "nordic,nrf-uicr-v2";
240 reg = <0xfffa000 DT_SIZE_K(2)>;
245 compatible = "nordic,nrf-ficr";
246 reg = <0xfffe000 DT_SIZE_K(2)>;
247 #nordic,ficr-cells = <1>;
251 compatible = "mmio-sram";
252 reg = <0x22000000 DT_SIZE_K(32)>;
253 #address-cells = <1>;
254 #size-cells = <1>;
259 compatible = "mmio-sram";
260 reg = <0x23000000 DT_SIZE_K(192)>;
261 #address-cells = <1>;
262 #size-cells = <1>;
267 #address-cells = <1>;
268 #size-cells = <1>;
272 compatible = "nordic,nrf-hsfll-local";
273 #clock-cells = <0>;
274 reg = <0xd000 0x1000>;
276 clock-frequency = <DT_FREQ_M(320)>;
281 nordic,ficr-names = "vsup", "coarse", "fine";
285 compatible = "nordic,nrf-ipct-local";
286 reg = <0x13000 0x1000>;
294 compatible = "nordic,nrf-wdt";
295 reg = <0x14000 0x1000>;
302 compatible = "nordic,nrf-wdt";
303 reg = <0x15000 0x1000>;
310 compatible = "nordic,nrf-resetinfo";
311 reg = <0x1e000 0x1000>;
315 compatible = "nordic,nrf-ieee802154";
321 #address-cells = <1>;
322 #size-cells = <1>;
326 compatible = "nordic,nrf-hsfll-local";
327 #clock-cells = <0>;
328 reg = <0xd000 0x1000>;
330 clock-frequency = <DT_FREQ_M(256)>;
335 nordic,ficr-names = "vsup", "coarse", "fine";
339 compatible = "nordic,nrf-wdt";
340 reg = <0x13000 0x1000>;
347 compatible = "nordic,nrf-wdt";
348 reg = <0x14000 0x1000>;
355 compatible = "nordic,nrf-resetinfo";
356 reg = <0x1e000 0x1000>;
360 compatible = "nordic,nrf-dppic-local";
361 reg = <0x22000 0x1000>;
366 compatible = "nordic,nrf-ipct-local";
367 reg = <0x24000 0x1000>;
375 compatible = "nordic,nrf-egu";
376 reg = <0x25000 0x1000>;
382 compatible = "nordic,nrf-timer";
383 reg = <0x28000 0x1000>;
385 cc-num = <8>;
388 max-bit-width = <32>;
389 max-frequency = <DT_FREQ_M(32)>;
394 compatible = "nordic,nrf-timer";
395 reg = <0x29000 0x1000>;
397 cc-num = <8>;
400 max-bit-width = <32>;
401 max-frequency = <DT_FREQ_M(32)>;
406 compatible = "nordic,nrf-timer";
407 reg = <0x2a000 0x1000>;
409 cc-num = <8>;
412 max-bit-width = <32>;
413 max-frequency = <DT_FREQ_M(32)>;
418 compatible = "nordic,nrf-rtc";
419 reg = <0x2b000 0x1000>;
421 cc-num = <4>;
422 clock-frequency = <32768>;
429 compatible = "nordic,nrf-radio";
430 reg = <0x2c000 0x1000>;
432 ble-2mbps-supported;
433 ble-coded-phy-supported;
434 cs-supported;
435 dfe-supported;
436 ieee802154-supported;
441 compatible = "nordic,nrf-ieee802154";
447 compatible = "nordic,nrf-ccm";
448 reg = <0x3a000 0x1000>;
454 compatible = "nordic,nrf-ecb";
455 reg = <0x3b000 0x1000>;
461 compatible = "nordic,nrf-ccm";
462 reg = <0x3c000 0x1000>;
468 compatible = "nordic,nrf-ecb";
469 reg = <0x3d000 0x1000>;
476 #address-cells = <1>;
477 #size-cells = <1>;
481 compatible = "nordic,nrf-tbm";
482 reg = <0x3000 0x408>;
488 compatible = "nordic,nrf-tddconf";
489 reg = <0x1000 0x10>;
495 #address-cells = <1>;
496 #size-cells = <1>;
500 compatible = "nordic,nrf-usbhs", "snps,dwc2";
501 reg = <0x86000 0x1000>, <0x2f700000 0x40000>;
502 reg-names = "wrapper", "core";
504 power-domains = <&gpd NRF_GPD_FAST_ACTIVE0>;
505 num-in-eps = <8>;
506 num-out-eps = <10>;
514 compatible = "nordic,nrf-exmif";
515 #address-cells = <1>;
516 #size-cells = <0>;
517 reg = <0x95000 0x500 0x95500 0xb00>;
518 reg-names = "wrapper", "core";
520 power-domains = <&gpd NRF_GPD_FAST_ACTIVE0>;
521 clock-frequency = <DT_FREQ_M(400)>;
522 fifo-depth = <32>;
523 max-xfer-size = <16>;
528 reg = <0x99000 0x1000>;
530 power-domains = <&gpd NRF_GPD_FAST_ACTIVE0>;
531 #mbox-cells = <1>;
535 reg = <0x9a000 0x1000>;
537 power-domains = <&gpd NRF_GPD_FAST_ACTIVE0>;
538 #mbox-cells = <1>;
542 reg = <0x9b000 0x1000>;
544 power-domains = <&gpd NRF_GPD_FAST_ACTIVE0>;
545 #mbox-cells = <1>;
548 canpll: clock-controller@8c2000{
549 compatible = "nordic,nrf-auxpll";
550 reg = <0x8c2000 0x1000>;
553 #clock-cells = <0>;
556 nordic,out-div = <2>;
557 nordic,out-drive = <0>;
558 nordic,current-tune = <6>;
559 nordic,sdm-disable;
565 compatible = "nordic,nrf-vevif-task-tx";
566 reg = <0x8c8000 0x1000>;
568 #mbox-cells = <1>;
570 nordic,tasks-mask = <0xfffff0ff>;
574 compatible = "nordic,nrf-ipct-global";
575 reg = <0x8d1000 0x1000>;
578 global-domain-id = <12>;
582 compatible = "nordic,nrf-vpr-coprocessor";
583 reg = <0x8d4000 0x1000>;
585 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
586 #address-cells = <1>;
587 #size-cells = <1>;
591 compatible = "nordic,nrf-vevif-task-tx";
592 reg = <0x0 0x1000>;
594 #mbox-cells = <1>;
596 nordic,tasks-mask = <0xffff0000>;
601 compatible = "nordic,nrf-can";
602 reg = <0x8d8000 0x400>, <0x2fbef800 0x800>, <0x2fbe8000 0x7800>;
603 reg-names = "wrapper", "m_can", "message_ram";
606 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
607 bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
612 compatible = "nordic,nrf-dppic-global";
613 reg = <0x8e1000 0x1000>;
615 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
619 compatible = "nordic,nrf-timer";
620 reg = <0x8e2000 0x1000>;
622 cc-num = <6>;
624 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
625 max-bit-width = <32>;
626 max-frequency = <DT_FREQ_M(320)>;
631 compatible = "nordic,nrf-timer";
632 reg = <0x8e3000 0x1000>;
634 cc-num = <6>;
636 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
637 max-bit-width = <32>;
638 max-frequency = <DT_FREQ_M(320)>;
643 compatible = "nordic,nrf-pwm";
644 reg = <0x8e4000 0x1000>;
648 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
649 #pwm-cells = <3>;
653 compatible = "nordic,nrf-spim";
654 reg = <0x8e6000 0x1000>;
656 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
657 easydma-maxcnt-bits = <15>;
660 max-frequency = <DT_FREQ_M(32)>;
661 #address-cells = <1>;
662 #size-cells = <0>;
663 rx-delay-supported;
664 rx-delay = <1>;
665 nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
670 compatible = "nordic,nrf-uarte";
671 reg = <0x8e6000 0x1000>;
675 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
676 endtx-stoptx-supported;
677 frame-timeout-supported;
681 compatible = "nordic,nrf-spim";
682 reg = <0x8e7000 0x1000>;
684 easydma-maxcnt-bits = <15>;
687 power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
688 max-frequency = <DT_FREQ_M(32)>;
689 #address-cells = <1>;
690 #size-cells = <0>;
691 rx-delay-supported;
692 rx-delay = <1>;
693 nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
698 compatible = "nordic,nrf-vpr-coprocessor";
699 reg = <0x908000 0x1000>;
701 #address-cells = <1>;
702 #size-cells = <1>;
704 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
707 compatible = "nordic,nrf-vevif-task-tx";
708 reg = <0x0 0x1000>;
710 #mbox-cells = <1>;
712 nordic,tasks-mask = <0xfffffff0>;
717 compatible = "nordic,nrf-ipct-global";
718 reg = <0x921000 0x1000>;
720 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
722 global-domain-id = <13>;
726 compatible = "nordic,nrf-dppic-global";
727 reg = <0x922000 0x1000>;
729 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
733 compatible = "nordic,nrf-rtc";
734 reg = <0x928000 0x1000>;
736 cc-num = <4>;
737 clock-frequency = <32768>;
739 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
745 compatible = "nordic,nrf-rtc";
746 reg = <0x929000 0x1000>;
748 cc-num = <4>;
749 clock-frequency = <32768>;
751 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
757 compatible = "nordic,nrf-wdt";
758 reg = <0x92b000 0x1000>;
762 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
766 compatible = "nordic,nrf-wdt";
767 reg = <0x92c000 0x1000>;
771 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
775 compatible = "nordic,nrf-egu";
776 reg = <0x92d000 0x1000>;
779 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
783 compatible = "nordic,nrf-gpiote";
784 reg = <0x934000 0x1000>;
786 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
791 compatible = "nordic,nrf-gpio";
792 reg = <0x938000 0x200>;
794 #gpio-cells = <2>;
795 gpio-controller;
796 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
797 gpiote-instance = <&gpiote130>;
803 compatible = "nordic,nrf-gpio";
804 reg = <0x938200 0x200>;
806 #gpio-cells = <2>;
807 gpio-controller;
808 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
809 gpiote-instance = <&gpiote130>;
815 compatible = "nordic,nrf-gpio";
816 reg = <0x938400 0x200>;
818 #gpio-cells = <2>;
819 gpio-controller;
820 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
821 gpiote-instance = <&gpiote130>;
827 compatible = "nordic,nrf-gpio";
828 reg = <0x938c00 0x200>;
830 #gpio-cells = <2>;
831 gpio-controller;
832 power-domains = <&gpd NRF_GPD_SLOW_MAIN>,
834 power-domain-names = "peripheral", "pad";
840 compatible = "nordic,nrf-gpio";
841 reg = <0x938e00 0x200>;
843 #gpio-cells = <2>;
844 gpio-controller;
845 power-domains = <&gpd NRF_GPD_SLOW_MAIN>,
847 power-domain-names = "peripheral", "pad";
853 compatible = "nordic,nrf-gpio";
854 reg = <0x939200 0x200>;
856 #gpio-cells = <2>;
857 gpio-controller;
858 power-domains = <&gpd NRF_GPD_SLOW_MAIN>;
859 gpiote-instance = <&gpiote130>;
865 compatible = "nordic,nrf-dppic-global";
866 reg = <0x981000 0x1000>;
868 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
872 compatible = "nordic,nrf-saadc";
873 reg = <0x982000 0x1000>;
876 #io-channel-cells = <1>;
877 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
882 * Use compatible "nordic,nrf-comp" to configure as COMP
883 * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP
885 compatible = "nordic,nrf-comp";
886 reg = <0x983000 0x1000>;
889 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
892 temp: temperature-sensor@984000 {
893 compatible = "nordic,nrf-temp";
894 reg = <0x984000 0x1000>;
897 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
901 compatible = "nordic,nrf-nfct";
902 reg = <0x985000 0x1000>;
905 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
909 compatible = "nordic,nrf-dppic-global";
910 reg = <0x991000 0x1000>;
912 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
916 compatible = "nordic,nrf-pdm";
917 reg = <0x993000 0x1000>;
920 nordic,clockpin-enable = <NRF_FUN_PDM_CLK>;
921 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
925 compatible = "nordic,nrf-qdec";
926 reg = <0x994000 0x1000>;
929 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
933 compatible = "nordic,nrf-qdec";
934 reg = <0x995000 0x1000>;
937 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
941 compatible = "nordic,nrf-grtc";
942 reg = <0x99c000 0x1000>;
944 cc-num = <16>;
950 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
954 compatible = "nordic,nrf-dppic-global";
955 reg = <0x9a1000 0x1000>;
957 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
961 compatible = "nordic,nrf-timer";
962 reg = <0x9a2000 0x1000>;
964 cc-num = <6>;
967 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
968 max-bit-width = <32>;
973 compatible = "nordic,nrf-timer";
974 reg = <0x9a3000 0x1000>;
976 cc-num = <6>;
979 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
980 max-bit-width = <32>;
985 compatible = "nordic,nrf-pwm";
986 reg = <0x9a4000 0x1000>;
990 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
991 #pwm-cells = <3>;
995 compatible = "nordic,nrf-twim";
996 reg = <0x9a5000 0x1000>;
1000 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1001 easydma-maxcnt-bits = <15>;
1002 #address-cells = <1>;
1003 #size-cells = <0>;
1004 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1006 zephyr,pm-device-runtime-auto;
1010 compatible = "nordic,nrf-spim";
1011 reg = <0x9a5000 0x1000>;
1013 easydma-maxcnt-bits = <15>;
1016 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1017 max-frequency = <DT_FREQ_M(8)>;
1018 #address-cells = <1>;
1019 #size-cells = <0>;
1020 rx-delay-supported;
1021 rx-delay = <1>;
1022 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1029 compatible = "nordic,nrf-uarte";
1030 reg = <0x9a5000 0x1000>;
1034 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1035 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1036 endtx-stoptx-supported;
1037 frame-timeout-supported;
1041 compatible = "nordic,nrf-twim";
1042 reg = <0x9a6000 0x1000>;
1046 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1047 easydma-maxcnt-bits = <15>;
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1050 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1052 zephyr,pm-device-runtime-auto;
1056 compatible = "nordic,nrf-spim";
1057 reg = <0x9a6000 0x1000>;
1059 easydma-maxcnt-bits = <15>;
1062 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1063 max-frequency = <DT_FREQ_M(8)>;
1064 #address-cells = <1>;
1065 #size-cells = <0>;
1066 rx-delay-supported;
1067 rx-delay = <1>;
1068 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1075 compatible = "nordic,nrf-uarte";
1076 reg = <0x9a6000 0x1000>;
1080 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1081 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1082 endtx-stoptx-supported;
1083 frame-timeout-supported;
1087 compatible = "nordic,nrf-dppic-global";
1088 reg = <0x9b1000 0x1000>;
1090 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1094 compatible = "nordic,nrf-timer";
1095 reg = <0x9b2000 0x1000>;
1097 cc-num = <6>;
1100 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1101 max-bit-width = <32>;
1106 compatible = "nordic,nrf-timer";
1107 reg = <0x9b3000 0x1000>;
1109 cc-num = <6>;
1112 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1113 max-bit-width = <32>;
1118 compatible = "nordic,nrf-pwm";
1119 reg = <0x9b4000 0x1000>;
1123 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1124 #pwm-cells = <3>;
1128 compatible = "nordic,nrf-twim";
1129 reg = <0x9b5000 0x1000>;
1133 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1134 easydma-maxcnt-bits = <15>;
1135 #address-cells = <1>;
1136 #size-cells = <0>;
1137 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1139 zephyr,pm-device-runtime-auto;
1143 compatible = "nordic,nrf-spim";
1144 reg = <0x9b5000 0x1000>;
1146 easydma-maxcnt-bits = <15>;
1149 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1150 max-frequency = <DT_FREQ_M(8)>;
1151 #address-cells = <1>;
1152 #size-cells = <0>;
1153 rx-delay-supported;
1154 rx-delay = <1>;
1155 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1162 compatible = "nordic,nrf-uarte";
1163 reg = <0x9b5000 0x1000>;
1167 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1168 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1169 endtx-stoptx-supported;
1170 frame-timeout-supported;
1174 compatible = "nordic,nrf-twim";
1175 reg = <0x9b6000 0x1000>;
1179 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1180 easydma-maxcnt-bits = <15>;
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1183 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1185 zephyr,pm-device-runtime-auto;
1189 compatible = "nordic,nrf-spim";
1190 reg = <0x9b6000 0x1000>;
1192 easydma-maxcnt-bits = <15>;
1195 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1196 max-frequency = <DT_FREQ_M(8)>;
1197 #address-cells = <1>;
1198 #size-cells = <0>;
1199 rx-delay-supported;
1200 rx-delay = <1>;
1201 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1208 compatible = "nordic,nrf-uarte";
1209 reg = <0x9b6000 0x1000>;
1213 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1214 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1215 endtx-stoptx-supported;
1216 frame-timeout-supported;
1220 compatible = "nordic,nrf-dppic-global";
1221 reg = <0x9c1000 0x1000>;
1223 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1227 compatible = "nordic,nrf-timer";
1228 reg = <0x9c2000 0x1000>;
1230 cc-num = <6>;
1233 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1234 max-bit-width = <32>;
1239 compatible = "nordic,nrf-timer";
1240 reg = <0x9c3000 0x1000>;
1242 cc-num = <6>;
1245 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1246 max-bit-width = <32>;
1251 compatible = "nordic,nrf-pwm";
1252 reg = <0x9c4000 0x1000>;
1256 #pwm-cells = <3>;
1257 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1261 compatible = "nordic,nrf-twim";
1262 reg = <0x9c5000 0x1000>;
1266 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1267 easydma-maxcnt-bits = <15>;
1268 #address-cells = <1>;
1269 #size-cells = <0>;
1270 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1272 zephyr,pm-device-runtime-auto;
1276 compatible = "nordic,nrf-spim";
1277 reg = <0x9c5000 0x1000>;
1279 easydma-maxcnt-bits = <15>;
1282 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1283 max-frequency = <DT_FREQ_M(8)>;
1284 #address-cells = <1>;
1285 #size-cells = <0>;
1286 rx-delay-supported;
1287 rx-delay = <1>;
1288 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1295 compatible = "nordic,nrf-uarte";
1296 reg = <0x9c5000 0x1000>;
1300 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1301 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1302 endtx-stoptx-supported;
1303 frame-timeout-supported;
1307 compatible = "nordic,nrf-twim";
1308 reg = <0x9c6000 0x1000>;
1312 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1313 easydma-maxcnt-bits = <15>;
1314 #address-cells = <1>;
1315 #size-cells = <0>;
1316 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1318 zephyr,pm-device-runtime-auto;
1322 compatible = "nordic,nrf-spim";
1323 reg = <0x9c6000 0x1000>;
1325 easydma-maxcnt-bits = <15>;
1328 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1329 max-frequency = <DT_FREQ_M(8)>;
1330 #address-cells = <1>;
1331 #size-cells = <0>;
1332 rx-delay-supported;
1333 rx-delay = <1>;
1334 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1341 compatible = "nordic,nrf-uarte";
1342 reg = <0x9c6000 0x1000>;
1346 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1347 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1348 endtx-stoptx-supported;
1349 frame-timeout-supported;
1353 compatible = "nordic,nrf-dppic-global";
1354 reg = <0x9d1000 0x1000>;
1356 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1360 compatible = "nordic,nrf-timer";
1361 reg = <0x9d2000 0x1000>;
1363 cc-num = <6>;
1366 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1367 max-bit-width = <32>;
1372 compatible = "nordic,nrf-timer";
1373 reg = <0x9d3000 0x1000>;
1375 cc-num = <6>;
1378 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1379 max-bit-width = <32>;
1384 compatible = "nordic,nrf-pwm";
1385 reg = <0x9d4000 0x1000>;
1389 #pwm-cells = <3>;
1390 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1394 compatible = "nordic,nrf-twim";
1395 reg = <0x9d5000 0x1000>;
1399 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1400 easydma-maxcnt-bits = <15>;
1401 #address-cells = <1>;
1402 #size-cells = <0>;
1403 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1405 zephyr,pm-device-runtime-auto;
1409 compatible = "nordic,nrf-spim";
1410 reg = <0x9d5000 0x1000>;
1412 easydma-maxcnt-bits = <15>;
1415 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1416 max-frequency = <DT_FREQ_M(8)>;
1417 #address-cells = <1>;
1418 #size-cells = <0>;
1419 rx-delay-supported;
1420 rx-delay = <1>;
1421 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1428 compatible = "nordic,nrf-uarte";
1429 reg = <0x9d5000 0x1000>;
1433 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1434 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1435 endtx-stoptx-supported;
1436 frame-timeout-supported;
1440 compatible = "nordic,nrf-twim";
1441 reg = <0x9d6000 0x1000>;
1445 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1446 easydma-maxcnt-bits = <15>;
1447 #address-cells = <1>;
1448 #size-cells = <0>;
1449 nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
1451 zephyr,pm-device-runtime-auto;
1455 compatible = "nordic,nrf-spim";
1456 reg = <0x9d6000 0x1000>;
1458 easydma-maxcnt-bits = <15>;
1461 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1462 max-frequency = <DT_FREQ_M(8)>;
1463 #address-cells = <1>;
1464 #size-cells = <0>;
1465 rx-delay-supported;
1466 rx-delay = <1>;
1467 nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
1474 compatible = "nordic,nrf-uarte";
1475 reg = <0x9d6000 0x1000>;
1479 power-domains = <&gpd NRF_GPD_SLOW_ACTIVE>;
1480 nordic,clockpin-enable = <NRF_FUN_UART_TX>;
1481 endtx-stoptx-supported;
1482 frame-timeout-supported;
1487 cpuapp_ppb: cpuapp-ppb-bus {
1488 #address-cells = <1>;
1489 #size-cells = <1>;
1492 compatible = "arm,armv8m-systick";
1493 reg = <0xe000e010 0x10>;
1497 cpuapp_nvic: interrupt-controller@e000e100 {
1498 compatible = "arm,v8m-nvic";
1499 reg = <0xe000e100 0xc00>;
1500 arm,num-irq-priority-bits = <3>;
1501 #interrupt-cells = <2>;
1502 interrupt-controller;
1503 #address-cells = <1>;
1507 cpurad_ppb: cpurad-ppb-bus {
1508 #address-cells = <1>;
1509 #size-cells = <1>;
1512 compatible = "arm,armv8m-systick";
1513 reg = <0xe000e010 0x10>;
1517 cpurad_nvic: interrupt-controller@e000e100 {
1518 compatible = "arm,v8m-nvic";
1519 reg = <0xe000e100 0xc00>;
1520 arm,num-irq-priority-bits = <3>;
1521 #interrupt-cells = <2>;
1522 interrupt-controller;
1523 #address-cells = <1>;
1527 cpuppr_private: cpuppr-private-bus {
1528 #address-cells = <1>;
1529 #size-cells = <1>;
1531 cpuppr_clic: interrupt-controller@f0000000 {
1532 compatible = "nordic,nrf-clic";
1533 reg = <0xf0000000 0x3000>;
1535 #interrupt-cells = <2>;
1536 interrupt-controller;
1537 #address-cells = <1>;
1541 cpuflpr_private: cpuflpr-private-bus {
1542 #address-cells = <1>;
1543 #size-cells = <1>;
1545 cpuflpr_clic: interrupt-controller@f0000000 {
1546 compatible = "nordic,nrf-clic";
1547 reg = <0xf0000000 0x3000>;
1549 #interrupt-cells = <2>;
1550 interrupt-controller;
1551 #address-cells = <1>;
1556 compatible = "nordic,nrf-temp-nrfs";