Lines Matching +full:a +full:- +full:dll +full:- +full:coarse +full:- +full:delay
2 # SPDX-License-Identifier: Apache-2.0
10 compatible: "nxp,s32-qspi"
12 include: [base.yaml, pinctrl-device.yaml]
20 "#address-cells":
23 "#size-cells":
26 data-rate:
29 - SDR
30 - DDR
33 - Single Data Rate (SDR): sampling of incoming data occurs on single edges.
34 - Double Data Rate (DDR): sampling of incoming data occurs on both edges.
36 hold-time-2x:
43 sample-delay-half-cycle:
46 Set to use half-cycle early DQS delay when sampling received data.
48 sample-phase-inverted:
53 cs-setup-time:
57 Chip select setup time, in serial clock cycles. A bigger value will pull
61 cs-hold-time:
65 Chip select hold time, in serial clock cycles. A bigger value will release
69 column-space:
79 word-addressable:
85 byte-swapping:
88 In case of Octal DDR mode, specifies whether a word unit composed of two
89 bytes from posedge and negedge of a single DQS cycle needs to be swapped.
91 ahb-buffers-masters:
99 ahb-buffers-sizes:
105 ahb-buffers-all-masters:
108 Any access from a master not associated with any other buffer is routed to
111 a-rx-clock-source:
114 - LOOPBACK
115 - LOOPBACK DQS
116 - INTERNAL DQS
117 - EXTERNAL DQS
119 Selects DQS clock source for sampling read data at side A:
120 - LOOPBACK: use loopback clock from dummy internal PAD as strobe signal.
121 - LOOPBACK DQS: use loopback clock from PAD as strobe signal.
122 - INTERNAL DQS: use internally generated strobe signal.
123 - EXTERNAL DQS: use external strobe signal.
125 a-io2-idle-high:
130 This property applies to side A of the controller.
132 a-io3-idle-high:
137 This property applies to side A of the controller.
139 a-dll-mode:
142 - BYPASSED
143 - MANUAL UPDATE
144 - AUTO UPDATE
147 DLL mode. The supported modes depends on the SoC.
148 This property applies to side A of the controller.
150 a-dll-freq-enable:
153 Selects delay-chain for high frequency of operation.
154 This property applies to side A of the controller.
156 a-dll-ref-counter:
161 Select the "n+1" interval of DLL phase detection and reference delay
164 This property applies to side A of the controller.
166 a-dll-resolution:
171 Minimum resolution for DLL phase detector to remain locked/unlocked based
174 This property applies to side A of the controller.
176 a-dll-coarse-delay:
181 This field sets the number of delay elements in each delay tap. The field
182 is used to overwrite DLL-generated delay values.
184 This property applies to side A of the controller.
186 a-dll-fine-delay:
191 This field sets the number of fine offset delay elements up to 16 in
194 This property applies to side A of the controller.
196 a-dll-tap-select:
201 Selects the Nth tap provided by the slave delay-chain.
203 This property applies to side A of the controller.
205 child-binding:
208 include: nxp,s32-qspi-device.yaml