Lines Matching +full:pin +full:- +full:pue
2 # SPDX-License-Identifier: Apache-2.0
15 drive-strength = "r0-6";
16 slew-rate = "slow";
17 nxp,speed = "100-mhz";
21 Both pins will be configured with a weak latch, drive strength of "r0-6",
26 input-schmitt-enable: HYS=1
27 drive-open-drain: ODE=1
28 input-enable: SION=1 (in SW_MUX_CTL_PAD register)
29 bias-pull-down: PUE=1, PUS=<bias-pull-down-value>
30 bias-pull-up: PUE=1, PUS=<bias-pull-up-value>
31 bias-disable: PKE=0
32 slew-rate: SRE=<enum_idx>
33 drive-strength: DSE=<enum_idx>
36 If only required properties are supplied, the pin will have the following
41 PUE=0,
44 SRE=<slew-rate>,
45 DSE=<drive-strength>,
49 compatible: "nxp,mcux-rt-pinctrl"
53 child-binding:
54 description: MCUX RT pin controller pin group
55 child-binding:
57 MCUX RT pin controller pin configuration node.
60 - name: pincfg-node.yaml
61 property-allowlist:
62 - input-schmitt-enable
63 - drive-open-drain
64 - input-enable
65 - bias-disable
66 - bias-pull-down
67 - bias-pull-up
74 Pin mux selections for this group. See the soc level iomuxc DTSI file
76 drive-strength:
80 - "disabled"
81 - "r0"
82 - "r0-2"
83 - "r0-3"
84 - "r0-4"
85 - "r0-5"
86 - "r0-6"
87 - "r0-7"
89 Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
101 bias-pull-up-value:
105 - "unused"
106 - "47k"
107 - "100k"
108 - "22k"
110 Select the value of the pull up resistor present on this pin
114 00 Unused- no change will be applied to pin
119 bias-pull-down-value:
123 - "100k"
125 Select the value of the pull up resistor present on this pin
128 00 PUS_0_100K_Ohm_Pull_Down - 100K Ohm Pull Down
129 slew-rate:
133 - "slow"
134 - "fast"
136 Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
142 - "50-mhz"
143 - "100-mhz"
144 - "150-mhz"
145 - "200-mhz"
147 Sets pin speed. Corresponds to SPEED field in IOMUXC peripheral