Lines Matching +full:max +full:- +full:pins
2 # SPDX-License-Identifier: Apache-2.0
8 fields in a group select the pins to be configured, and the remaining
9 devicetree properties set configuration values for those pins
10 for example, here is an group configuring LPUART1 pins:
15 drive-strength = "r0-6";
16 slew-rate = "slow";
17 nxp,speed = "100-mhz";
21 Both pins will be configured with a weak latch, drive strength of "r0-6",
26 input-schmitt-enable: HYS=1
27 drive-open-drain: ODE=1
28 input-enable: SION=1 (in SW_MUX_CTL_PAD register)
29 bias-pull-down: PUE=1, PUS=<bias-pull-down-value>
30 bias-pull-up: PUE=1, PUS=<bias-pull-up-value>
31 bias-disable: PKE=0
32 slew-rate: SRE=<enum_idx>
33 drive-strength: DSE=<enum_idx>
44 SRE=<slew-rate>,
45 DSE=<drive-strength>,
49 compatible: "nxp,mcux-rt-pinctrl"
53 child-binding:
55 child-binding:
60 - name: pincfg-node.yaml
61 property-allowlist:
62 - input-schmitt-enable
63 - drive-open-drain
64 - input-enable
65 - bias-disable
66 - bias-pull-down
67 - bias-pull-up
76 drive-strength:
80 - "disabled"
81 - "r0"
82 - "r0-2"
83 - "r0-3"
84 - "r0-4"
85 - "r0-5"
86 - "r0-6"
87 - "r0-7"
101 bias-pull-up-value:
105 - "unused"
106 - "47k"
107 - "100k"
108 - "22k"
113 value on most SOC pins
114 00 Unused- no change will be applied to pin
119 bias-pull-down-value:
123 - "100k"
128 00 PUS_0_100K_Ohm_Pull_Down - 100K Ohm Pull Down
129 slew-rate:
133 - "slow"
134 - "fast"
142 - "50-mhz"
143 - "100-mhz"
144 - "150-mhz"
145 - "200-mhz"
151 11 SPEED_3_max_200MHz_ — max(200MHz)