Lines Matching +full:output +full:- +full:high

2 # SPDX-License-Identifier: Apache-2.0
7     Based on pincfg-node.yaml binding.
23     pins, such as the 'bias-pull-up' property in group 2. Here is a list of
26     - bias-disable: Disable pull-up/down (default behavior, not required).
27     - bias-pull-down: Enable pull-down resistor.
28     - bias-pull-up: Enable pull-up resistor.
29     - drive-push-pull: Output driver is push-pull (default, not required).
30     - drive-open-drain: Output driver is open-drain.
31     - output-high: Set output state high when pin configured.
32     - output-low: Set output state low when pin configured.
35     - drive-strength
36     - slew-rate
43       #include <microchip/mec5/mec1743qlj-a0-pinctrl.dtsi>
46     and want the chip select 0 to be open-drain.
52         pinctrl-0 = < &shd_cs0_n_gpio055
57         pinctrl-names = "default";
61         drive-open-drain;
64 compatible: "microchip,mec5-pinctrl"
72 child-binding:
78     - name: pincfg-node.yaml
79       property-allowlist:
80         - bias-disable
81         - bias-pull-down
82         - bias-pull-up
83         - drive-push-pull
84         - drive-open-drain
85         - low-power-enable
86         - output-disable
87         - output-enable
88         - output-high
89         - output-low
97     slew-rate:
100         - "low-speed"
101         - "high-speed"
103         Pin speed. The default value of slew-rate is the SoC power-on-reset
108     drive-strength:
111         - "1x"
112         - "2x"
113         - "4x"
114         - "6x"
116         Pin output drive strength for PIO and PIO-24 pin types. Default
117         is "1x" for most pins. PIO pins are 2, 4, 8, or 12 mA. PIO-24 pins
121     microchip,output-func-invert:
124         Invert polarity of an output alternate function. Input functions