Lines Matching +full:4 +full:- +full:pin

2 # SPDX-License-Identifier: Apache-2.0
5     Microchip XEC Pin controller Node
6     Based on pincfg-node.yaml binding.
7     The MCHP XEC pin controller is a singleton node responsible for controlling
8     pin function selection and pin properties. For example, you can use this
9     node to select peripheral pin functions.
18     All device pin configurations should be placed in child nodes of the
21     A group can also specify shared pin properties common to all the specified
22     pins, such as the 'bias-pull-up' property in group 2. Here is a list of
23     supported standard pin properties:
25     - bias-disable: Disable pull-up/down (default behavior, not required).
26     - bias-pull-down: Enable pull-down resistor.
27     - bias-pull-up: Enable pull-up resistor.
28     - drive-push-pull: Output driver is push-pull (default, not required).
29     - drive-open-drain: Output driver is open-drain.
30     - output-high: Set output state high when pin configured.
31     - output-low: Set output state low when pin configured.
33     Custom pin properties for drive strength and slew rate are available:
34     - drive-strength
35     - slew-rate
37     Driver strength and slew rate hardware defaults vary by SoC and pin.
42       #include <microchip/mec5/mec1743qlj-a0-pinctrl.dtsi>
45     and want the chip select 0 to be open-drain.
47     To change a pin's pinctrl default properties add a reference to the
48     pin in the board's DTS file and set the properties.
51         pinctrl-0 = < &shd_cs0_n_gpio055
56         pinctrl-names = "default";
60         drive-open-drain;
63 compatible: "microchip,mec5-pinctrl"
71 child-binding:
77     - name: pincfg-node.yaml
78       property-allowlist:
79         - bias-disable
80         - bias-pull-down
81         - bias-pull-up
82         - drive-push-pull
83         - drive-open-drain
84         - low-power-enable
85         - output-disable
86         - output-enable
87         - output-high
88         - output-low
96     slew-rate:
99         - "low-speed"
100         - "high-speed"
102         Pin speed. The default value of slew-rate is the SoC power-on-reset
107     drive-strength:
110         - "1x"
111         - "2x"
112         - "4x"
113         - "6x"
115         Pin output drive strength for PIO and PIO-24 pin types. Default
116         is "1x" for most pins. PIO pins are 2, 4, 8, or 12 mA. PIO-24 pins
117         are 4, 8, 16, or 24 mA. Please refer to the data sheet for each
118         pin's PIO type and default drive strength.
120     microchip,output-func-invert: