Lines Matching +full:cs +full:- +full:mode
2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "renesas,smartbond-nor-psram"
14 is-ram:
19 dev-size:
25 dev-type:
31 dev-density:
40 dev-id:
46 reset-delay-us:
52 read-cs-idle-min-ns:
56 Min. time, in nanoseconds, the #CS line should remain inactive between
59 erase-cs-idle-min-ns:
62 Min. time, in nanoseconds, the #CS line should remain inactive after the execution
64 is not used if is-ram property is present.
66 enter-qpi-cmd:
69 Command to enter the QPI mode supported by a memory device
70 (should be transmitted in single bus mode).
72 exit-qpi-cmd:
75 Command to exit the QPI mode supported by a memory device
76 (should be transmitted in quad bus mode).
78 enter-qpi-mode:
81 If present, the memory device will enter the QPI mode which typically reflects that
82 all bytes be sent in quad bus mode. It's a pre-requisite that read and write
83 commands, that should be read-cmd and write-cmd respectively, reflect the QPI mode.
85 read-cmd:
89 Read command for single/burst read accesses in auto mode. Default value is the opcode
90 for single mode which is supported by all memory devices.
92 write-cmd:
96 Write command for single/burst write accesses in auto mode. Default value is the opcode
97 for single mode which is supported by all memory devices.
99 clock-mode:
102 - "spi-mode0"
103 - "spi-mode3"
104 default: "spi-mode0"
106 Clock mode when #CS is idle/inactive
108 - Mode0: #CLK is low when #CS is inactive
109 - Mode3: #CLK is high when #CS is inactive
113 addr-range:
116 - "addr-range-24bit"
117 - "addr-range-32bit"
118 default: "addr-range-24bit"
120 Address size to use in auto mode. In 24-bit mode up to 16MB can be
121 accessed whilst in 32-bit mode up to 32MB can be accessed which is
122 the max. address space supported by QSPICx. Default value is 24-bit
123 mode which is supported by all memory devices.
125 clock-div:
132 tcem-max-us:
138 (at the cost of extra cycles required for re-sending the instruction,
140 is-ram is present. This value reflects the max. time in microseconds
141 the #CS line can be driven low in a write/read burst access
142 (required for the auto-refresh mechanism, when supported).
144 dummy-bytes-count:
148 - "dummy-bytes-count0"
149 - "dummy-bytes-count1"
150 - "dummy-bytes-count2"
151 - "dummy-bytes-count4"
153 Number of dummy bytes to send for single/burst read access in auto mode.
155 extra-byte-enable:
160 dummy-bytes-count should be set to 2.
162 extra-byte:
165 Extra byte to be sent, if extra-byte-enable is present.
167 rx-addr-mode:
170 - "single-spi"
171 - "dual-spi"
172 - "quad-spi"
173 default: "single-spi"
175 Describes the mode of SPI bus during the address phase for single/burst
176 read accesses in auto mode. Default value is single mode which should be
179 rx-inst-mode:
182 - "single-spi"
183 - "dual-spi"
184 - "quad-spi"
185 default: "single-spi"
187 Describes the mode of SPI bus during the instruction phase for single/burst
188 read accesses in auto mode. Default value is single mode which should be
191 rx-data-mode:
194 - "single-spi"
195 - "dual-spi"
196 - "quad-spi"
197 default: "single-spi"
199 Describes the mode of SPI bus during the data phase for single/burst
200 read accesses in auto mode. Default value is single mode which should
203 rx-dummy-mode:
206 - "single-spi"
207 - "dual-spi"
208 - "quad-spi"
209 default: "single-spi"
211 Describes the mode of SPI bus during the dummy bytes phase for single/burst
212 read accesses in auto mode. The single mode should be supported by all
215 rx-extra-mode:
218 - "single-spi"
219 - "dual-spi"
220 - "quad-spi"
222 Describes the mode of SPI bus during the extra byte phase for single/burst
223 read accesses in auto mode. Default value is single mode which should be
226 tx-addr-mode:
229 - "single-spi"
230 - "dual-spi"
231 - "quad-spi"
232 default: "single-spi"
234 Describes the mode of SPI bus during the address phase for single/burst
235 write accesses in auto mode. Default value is single mode which should
238 tx-inst-mode:
241 - "single-spi"
242 - "dual-spi"
243 - "quad-spi"
244 default: "single-spi"
246 Describes the mode of SPI bus during the instruction phase for single/burst
247 write accesses in auto mode. The single mode should be supported by all
250 tx-data-mode:
253 - "single-spi"
254 - "dual-spi"
255 - "quad-spi"
256 default: "single-spi"
258 Describes the mode of SPI bus during the data phase for single/burst
259 write accesses in auto mode. Default value is single mode which should