Lines Matching full:mode
69 Command to enter the QPI mode supported by a memory device
70 (should be transmitted in single bus mode).
75 Command to exit the QPI mode supported by a memory device
76 (should be transmitted in quad bus mode).
78 enter-qpi-mode:
81 If present, the memory device will enter the QPI mode which typically reflects that
82 all bytes be sent in quad bus mode. It's a pre-requisite that read and write
83 commands, that should be read-cmd and write-cmd respectively, reflect the QPI mode.
89 Read command for single/burst read accesses in auto mode. Default value is the opcode
90 for single mode which is supported by all memory devices.
96 Write command for single/burst write accesses in auto mode. Default value is the opcode
97 for single mode which is supported by all memory devices.
99 clock-mode:
106 Clock mode when #CS is idle/inactive
120 Address size to use in auto mode. In 24-bit mode up to 16MB can be
121 accessed whilst in 32-bit mode up to 32MB can be accessed which is
123 mode which is supported by all memory devices.
153 Number of dummy bytes to send for single/burst read access in auto mode.
167 rx-addr-mode:
175 Describes the mode of SPI bus during the address phase for single/burst
176 read accesses in auto mode. Default value is single mode which should be
179 rx-inst-mode:
187 Describes the mode of SPI bus during the instruction phase for single/burst
188 read accesses in auto mode. Default value is single mode which should be
191 rx-data-mode:
199 Describes the mode of SPI bus during the data phase for single/burst
200 read accesses in auto mode. Default value is single mode which should
203 rx-dummy-mode:
211 Describes the mode of SPI bus during the dummy bytes phase for single/burst
212 read accesses in auto mode. The single mode should be supported by all
215 rx-extra-mode:
222 Describes the mode of SPI bus during the extra byte phase for single/burst
223 read accesses in auto mode. Default value is single mode which should be
226 tx-addr-mode:
234 Describes the mode of SPI bus during the address phase for single/burst
235 write accesses in auto mode. Default value is single mode which should
238 tx-inst-mode:
246 Describes the mode of SPI bus during the instruction phase for single/burst
247 write accesses in auto mode. The single mode should be supported by all
250 tx-data-mode:
258 Describes the mode of SPI bus during the data phase for single/burst
259 write accesses in auto mode. Default value is single mode which should