Lines Matching +full:leading +full:- +full:clocks

2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "lattice,ice40-fpga-base"
8 include: spi-device.yaml
11   cdone-gpios:
12     type: phandle-array
17       cdone-gpios = <&gpio0 0 0>;
18   creset-gpios:
19     type: phandle-array
24       creset-gpios = <&gpio0 1 GPIO_PUSH_PULL);
25   creset-delay-us:
32   config-delay-us:
38   leading-clocks:
42       Prior to sending the bitstream, issue this number of leading clocks with SPI_CS pulled high.
44   trailing-clocks:
48       After sending the bitstream, issue this number of trailing clocks with SPI_CS pulled high.