Lines Matching +full:qspi +full:- +full:max +full:- +full:frequency
2 # SPDX-License-Identifier: Apache-2.0
5 STM32 QSPI Flash controller supporting the JEDEC CFI interface
9 mx25r6435f: qspi-nor-flash@90000000 {
10 compatible = "st,stm32-qspi-nor";
12 qspi-max-frequency = <80000000>;
13 reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
14 reset-gpios-duration = <1>;
15 spi-bus-width = <4>;
19 compatible: "st,stm32-qspi-nor"
21 include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
23 on-bus: qspi
29 qspi-max-frequency:
32 description: Maximum clock frequency of device's QSPI interface in Hz
33 reset-gpios:
34 type: phandle-array
36 reset-gpios-duration:
39 reset-cmd:
42 reset-cmd-wait:
46 spi-bus-width:
53 - "PP_1_1_4" # Quad data line SPI, PP 1-1-4 (0x32)
54 - "PP_1_4_4" # Quad data line SPI, PP 1-4-4 (0x38)
61 supporting 1-4-4 mode also would support fast page programming.
63 If absent, then 1-4-4 program page is used in quad mode.
65 requires-ulbpr:
71 protection register that initializes to write-protected. Use this