Lines Matching +full:128 +full:- +full:bit
2 # SPDX - License - Identifier : Apache - 2.0
9 - name: reset-device.yaml
10 - name: ethernet-controller.yaml
17 max-frame-size:
23 means that normally xgmac will reject any frame above max-frame-size
27 max-speed:
30 - 10
31 - 100
32 - 1000
33 - 2500
40 soft PCS is connected to XGMAC through GMII. make sure the phy-connection-type is
42 tx-fifo-size:
45 - 1024
46 - 2048
47 - 4096
48 - 8192
49 - 16384
50 - 32768
51 - 65536
52 - 131072
53 - 262144
57 rx-fifo-size:
60 - 1024
61 - 2048
62 - 4096
63 - 8192
64 - 16384
65 - 32768
66 - 65536
67 - 131072
68 - 262144
72 num-dma-ch:
77 num-tx-queues:
82 num-rx-queues:
87 num-tc:
92 full-duplex-mode-en:
97 wr-osr-lmt:
104 rd-osr-lmt:
115 Programmable burst length range: 4,5,16,32,64,128,256
116 edma-tdps:
120 Tx Descriptor Pre-fetch threshold Size.
122 which the DMA starts pre-fetching the TxDMA descriptors. The
128 edma-rdps:
132 Rx Descriptor Pre-fetch threshold Size.
134 which the DMA starts pre-fetching the RxDMA descriptors. The
145 Therefore, the DMA transfers the data in 8, 16, 32, 64, 128, and 256
194 AXI Burst Length 128.
196 can select a burst length of 128 on the AXI interface.
208 Address-Aligned Beats.
209 When this is enabled, the AXI master performs address-aligned
215 DMA master enables the enhanced address mode (40-bit or 48-bit addressing mode).
216 In this mode, the DMA engine uses either the 40-bit or 48-bit address, depending
218 dma-ch-mss:
226 dma-ch-tdrl:
234 dma-ch-rdrl:
242 dma-ch-rbsz:
252 dma-ch-arbs:
258 to a non-zero value (when split header(SPH) feature is not enabled).
261 limited to 1016 or 1008-bytes depending on the data bus
262 widths (64-bit or 128-bit respectively). When ARBS=0, Rx
264 ARBS field is 7 or 6-bits depending on the data bus widths
265 (64-bit or 128-bit respectively).
266 dma-ch-rxpbl:
273 dma-ch-txpbl:
280 dma-ch-sph:
283 Header-Payload Split.
291 dma-ch-edse:
297 dma-ch-tse:
305 dma-ch-osp:
312 mtl-raa:
318 mtl-etsalg:
329 rxq-dyn-dma-en:
334 Each bit position of this field maps to a queue. there are total 8 queues
335 rxq-dma-ch-sel:
336 type: uint8-array
340 effect when rxQ-DynDma-En is enabled.
341 range 0 - 7
342 txq-size:
343 type: uint8-array
347 in blocks of 256 bytes. = (txQ-size + 1) x 256
348 range: 0 - 7
349 map-queue-tc:
350 type: uint8-array
353 Queue to Traffic Class Mapping. range 0 - 7
354 tx-threshold-ctrl:
355 type: uint8-array
364 range 0 - 7
368 3: 128
373 rx-threshold-ctrl:
374 type: uint8-array
381 applicable if the size of the configured Rx Queue is 128 bytes.
382 This field is valid only when the RSF bit is zero. This field is
384 range 0 - 3
388 3: 128
389 rxq-size:
390 type: uint8-array
394 Receive queues in blocks 256 bytes. = (rxQ-size + 1) x 256
395 Range: 0 - 127 ,
396 tx-store-fwrd-en:
402 Each bit position of this field maps to a queue. there are total 8 queues
403 hfc-en:
408 signal operation, based on the fill-level of Rx queue, is enabled.
409 Each bit position of this field maps to a queue. there are total 8 queues
410 cs-error-pkt-drop-dis:
415 Each bit position of this field maps to a queue. there are total 8 queues
416 rx-store-fwrd-en:
422 Each bit position of this field maps to a queue. there are total 8 queues
423 fep-en:
427 Forward Error Packets. When this bit is set, all packets except the runt error
429 Each bit position of this field maps to a queue. there are total 8 queues
430 fup-en:
436 Each bit position of this field maps to a queue. there are total 8 queues
437 priorities-map-tc:
445 range: 0 - 7 and max array size is 8
447 tx-sel-algorithm:
448 type: uint8-array
453 range: 0 -strict priority
454 1 - Credit based shaper
455 2 - Enhanced Transmission Selection
456 jumbo-pkt-en:
460 When this bit is set, the MAC allows jumbo packets of 9018
463 gaint-pkt-size-limit: