Lines Matching +full:is +full:- +full:32 +full:bit
2 # SPDX-License-Identifier: Apache-2.0
7 It is present on stm32 devices like stm32F4 or stm32F2.
10 described in the dma.txt file, using a four-cell specifier for each
12 1. channel: the dma stream from 0 to <dma-requests>
13 2. slot: DMA periph request ID, which is written in the DMAREQ_ID of the DMAMUX_CxCR
14 this value is 0 for Memory-to-memory transfers
15 or a value between <1> .. <dma-generators> (not supported yet)
16 or a value between <dma-generators>+1 .. <dma-generators>+<dma-requests>
17 3. channel-config: A 32bit mask specifying the DMA channel configuration
18 which is device dependent. See stm32_dma.h:
19 -bit 6-7 : Direction (see dma.h)
24 -bit 9 : Peripheral Increment Address
27 -bit 10 : Memory Increment Address
30 -bit 11-12 : Peripheral data size
32 0x1: STM32_DMA_PERIPH_16BITS: Half-word (16 bits)
33 0x2: STM32_DMA_PERIPH_32BITS: Word (32 bits)
35 -bit 13-14 : Memory data size
37 0x1: STM32_DMA_MEM_16BITS: Half-word (16 bits)
38 0x2: STM32_DMA_MEM_32BITS: Word (32 bits)
40 -bit 15: Peripheral Increment Offset Size
41 0x0: STM32_DMA_OFFSET_LINKED_BUS: offset size is linked to the peripheral bus width
42 0x1: STM32_DMA_OFFSET_FIXED_4: offset size is fixed to 4 (32-bit alignment)
43 -bit 16-17 : Priority level
48 4. features: A 32bit bitfield value specifying DMA features
49 -bit 0-1: DMA FIFO threshold selection
60 dma2: dma-controller@40020400 {
61 compatible = "st,stm32-dma-v1";
64 dma-requests = <7>;
69 Tx using stream 5 on channel 3 (stream 2 on channel 2 is also possible)
70 Rx using stream 2 on channel 3 (stream 0 on channel 3 is also possible)
74 dma-names = "tx", "rx";
77 compatible: "st,stm32-dma-v1"
79 include: st,stm32-dma.yaml
82 "#dma-cells":
87 …rnel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/plain/Bindings/dma/st,stm32-d…
89 dma-cells:
90 - channel
91 - slot
92 - channel-config
93 - features